1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefixes=TONGA %s
3; RUN: llc < %s -march=amdgcn -mcpu=gfx810 -verify-machineinstrs | FileCheck -check-prefixes=GFX81 %s
4; RUN: llc < %s -march=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck -check-prefixes=GFX9 %s
5; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefixes=GFX10 %s
6
7define amdgpu_ps half @image_sample_2d_f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t) {
8; TONGA-LABEL: image_sample_2d_f16:
9; TONGA:       ; %bb.0: ; %main_body
10; TONGA-NEXT:    s_mov_b64 s[12:13], exec
11; TONGA-NEXT:    s_wqm_b64 exec, exec
12; TONGA-NEXT:    s_and_b64 exec, exec, s[12:13]
13; TONGA-NEXT:    image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16
14; TONGA-NEXT:    s_waitcnt vmcnt(0)
15; TONGA-NEXT:    ; return to shader part epilog
16;
17; GFX81-LABEL: image_sample_2d_f16:
18; GFX81:       ; %bb.0: ; %main_body
19; GFX81-NEXT:    s_mov_b64 s[12:13], exec
20; GFX81-NEXT:    s_wqm_b64 exec, exec
21; GFX81-NEXT:    s_and_b64 exec, exec, s[12:13]
22; GFX81-NEXT:    image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16
23; GFX81-NEXT:    s_waitcnt vmcnt(0)
24; GFX81-NEXT:    ; return to shader part epilog
25;
26; GFX9-LABEL: image_sample_2d_f16:
27; GFX9:       ; %bb.0: ; %main_body
28; GFX9-NEXT:    s_mov_b64 s[12:13], exec
29; GFX9-NEXT:    s_wqm_b64 exec, exec
30; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
31; GFX9-NEXT:    image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16
32; GFX9-NEXT:    s_waitcnt vmcnt(0)
33; GFX9-NEXT:    ; return to shader part epilog
34;
35; GFX10-LABEL: image_sample_2d_f16:
36; GFX10:       ; %bb.0: ; %main_body
37; GFX10-NEXT:    s_mov_b32 s12, exec_lo
38; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
39; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
40; GFX10-NEXT:    image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D d16
41; GFX10-NEXT:    ; implicit-def: $vcc_hi
42; GFX10-NEXT:    s_waitcnt vmcnt(0)
43; GFX10-NEXT:    ; return to shader part epilog
44main_body:
45  %tex = call half @llvm.amdgcn.image.sample.2d.f16.f32(i32 1, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
46  ret half %tex
47}
48
49define amdgpu_ps half @image_sample_2d_f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t, i32 addrspace(1)* inreg %out) {
50; TONGA-LABEL: image_sample_2d_f16_tfe:
51; TONGA:       ; %bb.0: ; %main_body
52; TONGA-NEXT:    s_mov_b64 s[14:15], exec
53; TONGA-NEXT:    s_wqm_b64 exec, exec
54; TONGA-NEXT:    v_mov_b32_e32 v2, 0
55; TONGA-NEXT:    v_mov_b32_e32 v3, v2
56; TONGA-NEXT:    s_and_b64 exec, exec, s[14:15]
57; TONGA-NEXT:    image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16
58; TONGA-NEXT:    v_mov_b32_e32 v0, s12
59; TONGA-NEXT:    v_mov_b32_e32 v1, s13
60; TONGA-NEXT:    s_waitcnt vmcnt(0)
61; TONGA-NEXT:    flat_store_dword v[0:1], v3
62; TONGA-NEXT:    v_mov_b32_e32 v0, v2
63; TONGA-NEXT:    s_waitcnt vmcnt(0)
64; TONGA-NEXT:    ; return to shader part epilog
65;
66; GFX81-LABEL: image_sample_2d_f16_tfe:
67; GFX81:       ; %bb.0: ; %main_body
68; GFX81-NEXT:    s_mov_b64 s[14:15], exec
69; GFX81-NEXT:    s_wqm_b64 exec, exec
70; GFX81-NEXT:    v_mov_b32_e32 v2, 0
71; GFX81-NEXT:    v_mov_b32_e32 v3, v2
72; GFX81-NEXT:    s_and_b64 exec, exec, s[14:15]
73; GFX81-NEXT:    image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16
74; GFX81-NEXT:    v_mov_b32_e32 v0, s12
75; GFX81-NEXT:    v_mov_b32_e32 v1, s13
76; GFX81-NEXT:    s_waitcnt vmcnt(0)
77; GFX81-NEXT:    flat_store_dword v[0:1], v3
78; GFX81-NEXT:    v_mov_b32_e32 v0, v2
79; GFX81-NEXT:    s_waitcnt vmcnt(0)
80; GFX81-NEXT:    ; return to shader part epilog
81;
82; GFX9-LABEL: image_sample_2d_f16_tfe:
83; GFX9:       ; %bb.0: ; %main_body
84; GFX9-NEXT:    s_mov_b64 s[14:15], exec
85; GFX9-NEXT:    s_wqm_b64 exec, exec
86; GFX9-NEXT:    v_mov_b32_e32 v4, 0
87; GFX9-NEXT:    v_mov_b32_e32 v5, v4
88; GFX9-NEXT:    v_mov_b32_e32 v2, v4
89; GFX9-NEXT:    v_mov_b32_e32 v3, v5
90; GFX9-NEXT:    s_and_b64 exec, exec, s[14:15]
91; GFX9-NEXT:    image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16
92; GFX9-NEXT:    s_waitcnt vmcnt(0)
93; GFX9-NEXT:    v_mov_b32_e32 v0, v2
94; GFX9-NEXT:    global_store_dword v4, v3, s[12:13]
95; GFX9-NEXT:    s_waitcnt vmcnt(0)
96; GFX9-NEXT:    ; return to shader part epilog
97;
98; GFX10-LABEL: image_sample_2d_f16_tfe:
99; GFX10:       ; %bb.0: ; %main_body
100; GFX10-NEXT:    s_mov_b32 s28, exec_lo
101; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
102; GFX10-NEXT:    v_mov_b32_e32 v4, 0
103; GFX10-NEXT:    v_mov_b32_e32 v5, v4
104; GFX10-NEXT:    v_mov_b32_e32 v2, v4
105; GFX10-NEXT:    v_mov_b32_e32 v3, v5
106; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s28
107; GFX10-NEXT:    image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D tfe d16
108; GFX10-NEXT:    ; implicit-def: $vcc_hi
109; GFX10-NEXT:    s_waitcnt vmcnt(0)
110; GFX10-NEXT:    v_mov_b32_e32 v0, v2
111; GFX10-NEXT:    global_store_dword v4, v3, s[12:13]
112; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
113; GFX10-NEXT:    ; return to shader part epilog
114main_body:
115  %tex = call {half,i32} @llvm.amdgcn.image.sample.2d.f16i32.f32(i32 1, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
116  %tex.vec = extractvalue {half, i32} %tex, 0
117  %tex.err = extractvalue {half, i32} %tex, 1
118  store i32 %tex.err, i32 addrspace(1)* %out, align 4
119  ret half %tex.vec
120}
121
122define amdgpu_ps float @image_sample_c_d_1d_v2f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, float %dsdh, float %dsdv, float %s) {
123; TONGA-LABEL: image_sample_c_d_1d_v2f16:
124; TONGA:       ; %bb.0: ; %main_body
125; TONGA-NEXT:    image_sample_c_d v[0:1], v[0:3], s[0:7], s[8:11] dmask:0x3 d16
126; TONGA-NEXT:    s_waitcnt vmcnt(0)
127; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
128; TONGA-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
129; TONGA-NEXT:    ; return to shader part epilog
130;
131; GFX81-LABEL: image_sample_c_d_1d_v2f16:
132; GFX81:       ; %bb.0: ; %main_body
133; GFX81-NEXT:    image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 d16
134; GFX81-NEXT:    s_waitcnt vmcnt(0)
135; GFX81-NEXT:    ; return to shader part epilog
136;
137; GFX9-LABEL: image_sample_c_d_1d_v2f16:
138; GFX9:       ; %bb.0: ; %main_body
139; GFX9-NEXT:    image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 d16
140; GFX9-NEXT:    s_waitcnt vmcnt(0)
141; GFX9-NEXT:    ; return to shader part epilog
142;
143; GFX10-LABEL: image_sample_c_d_1d_v2f16:
144; GFX10:       ; %bb.0: ; %main_body
145; GFX10-NEXT:    image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D d16
146; GFX10-NEXT:    ; implicit-def: $vcc_hi
147; GFX10-NEXT:    s_waitcnt vmcnt(0)
148; GFX10-NEXT:    ; return to shader part epilog
149main_body:
150  %tex = call <2 x half> @llvm.amdgcn.image.sample.c.d.1d.v2f16.f32.f32(i32 3, float %zcompare, float %dsdh, float %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
151  %r = bitcast <2 x half> %tex to float
152  ret float %r
153}
154
155define amdgpu_ps <2 x float> @image_sample_c_d_1d_v2f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, float %dsdh, float %dsdv, float %s) {
156; TONGA-LABEL: image_sample_c_d_1d_v2f16_tfe:
157; TONGA:       ; %bb.0: ; %main_body
158; TONGA-NEXT:    v_mov_b32_e32 v4, 0
159; TONGA-NEXT:    v_mov_b32_e32 v5, v4
160; TONGA-NEXT:    v_mov_b32_e32 v6, v4
161; TONGA-NEXT:    image_sample_c_d v[4:6], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16
162; TONGA-NEXT:    s_waitcnt vmcnt(0)
163; TONGA-NEXT:    v_lshlrev_b32_e32 v0, 16, v5
164; TONGA-NEXT:    v_or_b32_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
165; TONGA-NEXT:    v_mov_b32_e32 v1, v6
166; TONGA-NEXT:    ; return to shader part epilog
167;
168; GFX81-LABEL: image_sample_c_d_1d_v2f16_tfe:
169; GFX81:       ; %bb.0: ; %main_body
170; GFX81-NEXT:    v_mov_b32_e32 v4, 0
171; GFX81-NEXT:    v_mov_b32_e32 v5, v4
172; GFX81-NEXT:    image_sample_c_d v[4:5], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16
173; GFX81-NEXT:    s_waitcnt vmcnt(0)
174; GFX81-NEXT:    v_mov_b32_e32 v0, v4
175; GFX81-NEXT:    v_mov_b32_e32 v1, v5
176; GFX81-NEXT:    ; return to shader part epilog
177;
178; GFX9-LABEL: image_sample_c_d_1d_v2f16_tfe:
179; GFX9:       ; %bb.0: ; %main_body
180; GFX9-NEXT:    v_mov_b32_e32 v4, 0
181; GFX9-NEXT:    v_mov_b32_e32 v5, v4
182; GFX9-NEXT:    image_sample_c_d v[4:5], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16
183; GFX9-NEXT:    s_waitcnt vmcnt(0)
184; GFX9-NEXT:    v_mov_b32_e32 v0, v4
185; GFX9-NEXT:    v_mov_b32_e32 v1, v5
186; GFX9-NEXT:    ; return to shader part epilog
187;
188; GFX10-LABEL: image_sample_c_d_1d_v2f16_tfe:
189; GFX10:       ; %bb.0: ; %main_body
190; GFX10-NEXT:    v_mov_b32_e32 v5, v0
191; GFX10-NEXT:    v_mov_b32_e32 v0, 0
192; GFX10-NEXT:    v_mov_b32_e32 v4, v1
193; GFX10-NEXT:    ; implicit-def: $vcc_hi
194; GFX10-NEXT:    v_mov_b32_e32 v1, v0
195; GFX10-NEXT:    image_sample_c_d v[0:1], [v5, v4, v2, v3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe d16
196; GFX10-NEXT:    s_waitcnt vmcnt(0)
197; GFX10-NEXT:    ; return to shader part epilog
198main_body:
199  %tex = call {<2 x half>,i32} @llvm.amdgcn.image.sample.c.d.1d.v2f16i32.f32.f32(i32 3, float %zcompare, float %dsdh, float %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
200  %tex.vec = extractvalue {<2 x half>, i32} %tex, 0
201  %tex.err = extractvalue {<2 x half>, i32} %tex, 1
202  %tex.vecf = bitcast <2 x half> %tex.vec to float
203  %r.0 = insertelement <2 x float> undef, float %tex.vecf, i32 0
204  %tex.errf = bitcast i32 %tex.err to float
205  %r = insertelement <2 x float> %r.0, float %tex.errf, i32 1
206  ret <2 x float> %r
207}
208
209define amdgpu_ps <2 x float> @image_sample_b_2d_v3f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
210; TONGA-LABEL: image_sample_b_2d_v3f16:
211; TONGA:       ; %bb.0: ; %main_body
212; TONGA-NEXT:    s_mov_b64 s[12:13], exec
213; TONGA-NEXT:    s_wqm_b64 exec, exec
214; TONGA-NEXT:    s_and_b64 exec, exec, s[12:13]
215; TONGA-NEXT:    image_sample_b v[0:2], v[0:2], s[0:7], s[8:11] dmask:0x7 d16
216; TONGA-NEXT:    s_waitcnt vmcnt(0)
217; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
218; TONGA-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
219; TONGA-NEXT:    v_mov_b32_e32 v1, v2
220; TONGA-NEXT:    ; return to shader part epilog
221;
222; GFX81-LABEL: image_sample_b_2d_v3f16:
223; GFX81:       ; %bb.0: ; %main_body
224; GFX81-NEXT:    s_mov_b64 s[12:13], exec
225; GFX81-NEXT:    s_wqm_b64 exec, exec
226; GFX81-NEXT:    s_and_b64 exec, exec, s[12:13]
227; GFX81-NEXT:    image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 d16
228; GFX81-NEXT:    s_waitcnt vmcnt(0)
229; GFX81-NEXT:    ; return to shader part epilog
230;
231; GFX9-LABEL: image_sample_b_2d_v3f16:
232; GFX9:       ; %bb.0: ; %main_body
233; GFX9-NEXT:    s_mov_b64 s[12:13], exec
234; GFX9-NEXT:    s_wqm_b64 exec, exec
235; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
236; GFX9-NEXT:    image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 d16
237; GFX9-NEXT:    s_waitcnt vmcnt(0)
238; GFX9-NEXT:    ; return to shader part epilog
239;
240; GFX10-LABEL: image_sample_b_2d_v3f16:
241; GFX10:       ; %bb.0: ; %main_body
242; GFX10-NEXT:    s_mov_b32 s12, exec_lo
243; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
244; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
245; GFX10-NEXT:    image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D d16
246; GFX10-NEXT:    ; implicit-def: $vcc_hi
247; GFX10-NEXT:    s_waitcnt vmcnt(0)
248; GFX10-NEXT:    ; return to shader part epilog
249main_body:
250  %tex = call <3 x half> @llvm.amdgcn.image.sample.b.2d.v3f16.f32.f32(i32 7, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
251  %tex_wide = shufflevector <3 x half> %tex, <3 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
252  %r = bitcast <4 x half> %tex_wide to <2 x float>
253  ret <2 x float> %r
254}
255
256define amdgpu_ps <4 x float> @image_sample_b_2d_v3f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
257; TONGA-LABEL: image_sample_b_2d_v3f16_tfe:
258; TONGA:       ; %bb.0: ; %main_body
259; TONGA-NEXT:    s_mov_b64 s[12:13], exec
260; TONGA-NEXT:    s_wqm_b64 exec, exec
261; TONGA-NEXT:    v_mov_b32_e32 v3, 0
262; TONGA-NEXT:    v_mov_b32_e32 v4, v3
263; TONGA-NEXT:    v_mov_b32_e32 v5, v3
264; TONGA-NEXT:    v_mov_b32_e32 v6, v3
265; TONGA-NEXT:    s_and_b64 exec, exec, s[12:13]
266; TONGA-NEXT:    image_sample_b v[3:6], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16
267; TONGA-NEXT:    s_waitcnt vmcnt(0)
268; TONGA-NEXT:    v_lshlrev_b32_e32 v0, 16, v4
269; TONGA-NEXT:    v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
270; TONGA-NEXT:    v_mov_b32_e32 v1, v5
271; TONGA-NEXT:    v_mov_b32_e32 v2, v6
272; TONGA-NEXT:    ; return to shader part epilog
273;
274; GFX81-LABEL: image_sample_b_2d_v3f16_tfe:
275; GFX81:       ; %bb.0: ; %main_body
276; GFX81-NEXT:    s_mov_b64 s[12:13], exec
277; GFX81-NEXT:    s_wqm_b64 exec, exec
278; GFX81-NEXT:    v_mov_b32_e32 v3, 0
279; GFX81-NEXT:    v_mov_b32_e32 v4, v3
280; GFX81-NEXT:    v_mov_b32_e32 v5, v3
281; GFX81-NEXT:    s_and_b64 exec, exec, s[12:13]
282; GFX81-NEXT:    image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16
283; GFX81-NEXT:    s_waitcnt vmcnt(0)
284; GFX81-NEXT:    v_mov_b32_e32 v0, v3
285; GFX81-NEXT:    v_mov_b32_e32 v1, v4
286; GFX81-NEXT:    v_mov_b32_e32 v2, v5
287; GFX81-NEXT:    ; return to shader part epilog
288;
289; GFX9-LABEL: image_sample_b_2d_v3f16_tfe:
290; GFX9:       ; %bb.0: ; %main_body
291; GFX9-NEXT:    s_mov_b64 s[12:13], exec
292; GFX9-NEXT:    s_wqm_b64 exec, exec
293; GFX9-NEXT:    v_mov_b32_e32 v3, 0
294; GFX9-NEXT:    v_mov_b32_e32 v4, v3
295; GFX9-NEXT:    v_mov_b32_e32 v5, v3
296; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
297; GFX9-NEXT:    image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16
298; GFX9-NEXT:    s_waitcnt vmcnt(0)
299; GFX9-NEXT:    v_mov_b32_e32 v0, v3
300; GFX9-NEXT:    v_mov_b32_e32 v1, v4
301; GFX9-NEXT:    v_mov_b32_e32 v2, v5
302; GFX9-NEXT:    ; return to shader part epilog
303;
304; GFX10-LABEL: image_sample_b_2d_v3f16_tfe:
305; GFX10:       ; %bb.0: ; %main_body
306; GFX10-NEXT:    s_mov_b32 s12, exec_lo
307; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
308; GFX10-NEXT:    v_mov_b32_e32 v3, v0
309; GFX10-NEXT:    v_mov_b32_e32 v0, 0
310; GFX10-NEXT:    v_mov_b32_e32 v5, v2
311; GFX10-NEXT:    v_mov_b32_e32 v4, v1
312; GFX10-NEXT:    v_mov_b32_e32 v1, v0
313; GFX10-NEXT:    v_mov_b32_e32 v2, v0
314; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
315; GFX10-NEXT:    image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D tfe d16
316; GFX10-NEXT:    ; implicit-def: $vcc_hi
317; GFX10-NEXT:    s_waitcnt vmcnt(0)
318; GFX10-NEXT:    ; return to shader part epilog
319main_body:
320  %tex = call {<3 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v3f16i32.f32.f32(i32 7, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
321  %tex.vec = extractvalue {<3 x half>, i32} %tex, 0
322  %tex.vec_wide = shufflevector <3 x half> %tex.vec, <3 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
323  %tex.err = extractvalue {<3 x half>, i32} %tex, 1
324  %tex.vecf = bitcast <4 x half> %tex.vec_wide to <2 x float>
325  %tex.vecf.0 = extractelement <2 x float> %tex.vecf, i32 0
326  %tex.vecf.1 = extractelement <2 x float> %tex.vecf, i32 1
327  %r.0 = insertelement <4 x float> undef, float %tex.vecf.0, i32 0
328  %r.1 = insertelement <4 x float> %r.0, float %tex.vecf.1, i32 1
329  %tex.errf = bitcast i32 %tex.err to float
330  %r = insertelement <4 x float> %r.1, float %tex.errf, i32 2
331  ret <4 x float> %r
332}
333
334define amdgpu_ps <2 x float> @image_sample_b_2d_v4f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
335; TONGA-LABEL: image_sample_b_2d_v4f16:
336; TONGA:       ; %bb.0: ; %main_body
337; TONGA-NEXT:    s_mov_b64 s[12:13], exec
338; TONGA-NEXT:    s_wqm_b64 exec, exec
339; TONGA-NEXT:    s_and_b64 exec, exec, s[12:13]
340; TONGA-NEXT:    image_sample_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf d16
341; TONGA-NEXT:    s_waitcnt vmcnt(0)
342; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
343; TONGA-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
344; TONGA-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
345; TONGA-NEXT:    v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
346; TONGA-NEXT:    ; return to shader part epilog
347;
348; GFX81-LABEL: image_sample_b_2d_v4f16:
349; GFX81:       ; %bb.0: ; %main_body
350; GFX81-NEXT:    s_mov_b64 s[12:13], exec
351; GFX81-NEXT:    s_wqm_b64 exec, exec
352; GFX81-NEXT:    s_and_b64 exec, exec, s[12:13]
353; GFX81-NEXT:    image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf d16
354; GFX81-NEXT:    s_waitcnt vmcnt(0)
355; GFX81-NEXT:    ; return to shader part epilog
356;
357; GFX9-LABEL: image_sample_b_2d_v4f16:
358; GFX9:       ; %bb.0: ; %main_body
359; GFX9-NEXT:    s_mov_b64 s[12:13], exec
360; GFX9-NEXT:    s_wqm_b64 exec, exec
361; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
362; GFX9-NEXT:    image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf d16
363; GFX9-NEXT:    s_waitcnt vmcnt(0)
364; GFX9-NEXT:    ; return to shader part epilog
365;
366; GFX10-LABEL: image_sample_b_2d_v4f16:
367; GFX10:       ; %bb.0: ; %main_body
368; GFX10-NEXT:    s_mov_b32 s12, exec_lo
369; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
370; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
371; GFX10-NEXT:    image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D d16
372; GFX10-NEXT:    ; implicit-def: $vcc_hi
373; GFX10-NEXT:    s_waitcnt vmcnt(0)
374; GFX10-NEXT:    ; return to shader part epilog
375main_body:
376  %tex = call <4 x half> @llvm.amdgcn.image.sample.b.2d.v4f16.f32.f32(i32 15, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)
377  %r = bitcast <4 x half> %tex to <2 x float>
378  ret <2 x float> %r
379}
380
381define amdgpu_ps <4 x float> @image_sample_b_2d_v4f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) {
382; TONGA-LABEL: image_sample_b_2d_v4f16_tfe:
383; TONGA:       ; %bb.0: ; %main_body
384; TONGA-NEXT:    s_mov_b64 s[12:13], exec
385; TONGA-NEXT:    s_wqm_b64 exec, exec
386; TONGA-NEXT:    v_mov_b32_e32 v3, 0
387; TONGA-NEXT:    v_mov_b32_e32 v4, v3
388; TONGA-NEXT:    v_mov_b32_e32 v5, v3
389; TONGA-NEXT:    v_mov_b32_e32 v6, v3
390; TONGA-NEXT:    v_mov_b32_e32 v7, v3
391; TONGA-NEXT:    s_and_b64 exec, exec, s[12:13]
392; TONGA-NEXT:    image_sample_b v[3:7], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16
393; TONGA-NEXT:    s_waitcnt vmcnt(0)
394; TONGA-NEXT:    v_lshlrev_b32_e32 v0, 16, v4
395; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v6
396; TONGA-NEXT:    v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
397; TONGA-NEXT:    v_or_b32_sdwa v1, v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
398; TONGA-NEXT:    v_mov_b32_e32 v2, v7
399; TONGA-NEXT:    ; return to shader part epilog
400;
401; GFX81-LABEL: image_sample_b_2d_v4f16_tfe:
402; GFX81:       ; %bb.0: ; %main_body
403; GFX81-NEXT:    s_mov_b64 s[12:13], exec
404; GFX81-NEXT:    s_wqm_b64 exec, exec
405; GFX81-NEXT:    v_mov_b32_e32 v3, 0
406; GFX81-NEXT:    v_mov_b32_e32 v4, v3
407; GFX81-NEXT:    v_mov_b32_e32 v5, v3
408; GFX81-NEXT:    s_and_b64 exec, exec, s[12:13]
409; GFX81-NEXT:    image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16
410; GFX81-NEXT:    s_waitcnt vmcnt(0)
411; GFX81-NEXT:    v_mov_b32_e32 v0, v3
412; GFX81-NEXT:    v_mov_b32_e32 v1, v4
413; GFX81-NEXT:    v_mov_b32_e32 v2, v5
414; GFX81-NEXT:    ; return to shader part epilog
415;
416; GFX9-LABEL: image_sample_b_2d_v4f16_tfe:
417; GFX9:       ; %bb.0: ; %main_body
418; GFX9-NEXT:    s_mov_b64 s[12:13], exec
419; GFX9-NEXT:    s_wqm_b64 exec, exec
420; GFX9-NEXT:    v_mov_b32_e32 v3, 0
421; GFX9-NEXT:    v_mov_b32_e32 v4, v3
422; GFX9-NEXT:    v_mov_b32_e32 v5, v3
423; GFX9-NEXT:    s_and_b64 exec, exec, s[12:13]
424; GFX9-NEXT:    image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16
425; GFX9-NEXT:    s_waitcnt vmcnt(0)
426; GFX9-NEXT:    v_mov_b32_e32 v0, v3
427; GFX9-NEXT:    v_mov_b32_e32 v1, v4
428; GFX9-NEXT:    v_mov_b32_e32 v2, v5
429; GFX9-NEXT:    ; return to shader part epilog
430;
431; GFX10-LABEL: image_sample_b_2d_v4f16_tfe:
432; GFX10:       ; %bb.0: ; %main_body
433; GFX10-NEXT:    s_mov_b32 s12, exec_lo
434; GFX10-NEXT:    s_wqm_b32 exec_lo, exec_lo
435; GFX10-NEXT:    v_mov_b32_e32 v3, v0
436; GFX10-NEXT:    v_mov_b32_e32 v0, 0
437; GFX10-NEXT:    v_mov_b32_e32 v5, v2
438; GFX10-NEXT:    v_mov_b32_e32 v4, v1
439; GFX10-NEXT:    v_mov_b32_e32 v1, v0
440; GFX10-NEXT:    v_mov_b32_e32 v2, v0
441; GFX10-NEXT:    s_and_b32 exec_lo, exec_lo, s12
442; GFX10-NEXT:    image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D tfe d16
443; GFX10-NEXT:    ; implicit-def: $vcc_hi
444; GFX10-NEXT:    s_waitcnt vmcnt(0)
445; GFX10-NEXT:    ; return to shader part epilog
446main_body:
447  %tex = call {<4 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v4f16i32.f32.f32(i32 15, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0)
448  %tex.vec = extractvalue {<4 x half>, i32} %tex, 0
449  %tex.err = extractvalue {<4 x half>, i32} %tex, 1
450  %tex.vecf = bitcast <4 x half> %tex.vec to <2 x float>
451  %tex.vecf.0 = extractelement <2 x float> %tex.vecf, i32 0
452  %tex.vecf.1 = extractelement <2 x float> %tex.vecf, i32 1
453  %r.0 = insertelement <4 x float> undef, float %tex.vecf.0, i32 0
454  %r.1 = insertelement <4 x float> %r.0, float %tex.vecf.1, i32 1
455  %tex.errf = bitcast i32 %tex.err to float
456  %r = insertelement <4 x float> %r.1, float %tex.errf, i32 2
457  ret <4 x float> %r
458}
459
460declare half @llvm.amdgcn.image.sample.2d.f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
461declare {half,i32} @llvm.amdgcn.image.sample.2d.f16i32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
462declare <3 x half> @llvm.amdgcn.image.sample.2d.v3f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
463declare <4 x half> @llvm.amdgcn.image.sample.2d.v4f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
464declare {<2 x half>,i32} @llvm.amdgcn.image.sample.2d.v2f16i32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
465declare <2 x half> @llvm.amdgcn.image.sample.c.d.1d.v2f16.f32.f32(i32, float, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
466declare {<2 x half>,i32} @llvm.amdgcn.image.sample.c.d.1d.v2f16i32.f32.f32(i32, float, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
467declare <3 x half> @llvm.amdgcn.image.sample.b.2d.v3f16.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
468declare {<3 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v3f16i32.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
469declare <4 x half> @llvm.amdgcn.image.sample.b.2d.v4f16.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
470declare {<4 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v4f16i32.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1
471
472attributes #0 = { nounwind }
473attributes #1 = { nounwind readonly }
474attributes #2 = { nounwind readnone }
475