1; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN %s
2
3; GCN-LABEL: {{^}}load.f32.1d:
4; GCN: image_load v0, v0, s[0:7] dmask:0x1 unorm a16
5define amdgpu_ps <4 x float> @load.f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
6main_body:
7  %x = extractelement <2 x i16> %coords, i32 0
8  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 1, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
9  ret <4 x float> %v
10}
11
12; GCN-LABEL: {{^}}load.v2f32.1d:
13; GCN: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm a16
14define amdgpu_ps <4 x float> @load.v2f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
15main_body:
16  %x = extractelement <2 x i16> %coords, i32 0
17  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 3, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
18  ret <4 x float> %v
19}
20
21; GCN-LABEL: {{^}}load.v3f32.1d:
22; GCN: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm a16
23define amdgpu_ps <4 x float> @load.v3f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
24main_body:
25  %x = extractelement <2 x i16> %coords, i32 0
26  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 7, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
27  ret <4 x float> %v
28}
29
30; GCN-LABEL: {{^}}load.v4f32.1d:
31; GCN: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16
32define amdgpu_ps <4 x float> @load.v4f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
33main_body:
34  %x = extractelement <2 x i16> %coords, i32 0
35  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
36  ret <4 x float> %v
37}
38
39; GCN-LABEL: {{^}}load.f32.2d:
40; GCN: image_load v0, v0, s[0:7] dmask:0x1 unorm a16
41define amdgpu_ps <4 x float> @load.f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
42main_body:
43  %x = extractelement <2 x i16> %coords, i32 0
44  %y = extractelement <2 x i16> %coords, i32 1
45  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 1, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
46  ret <4 x float> %v
47}
48
49; GCN-LABEL: {{^}}load.v2f32.2d:
50; GCN: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm a16
51define amdgpu_ps <4 x float> @load.v2f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
52main_body:
53  %x = extractelement <2 x i16> %coords, i32 0
54  %y = extractelement <2 x i16> %coords, i32 1
55  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 3, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
56  ret <4 x float> %v
57}
58
59; GCN-LABEL: {{^}}load.v3f32.2d:
60; GCN: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm a16
61define amdgpu_ps <4 x float> @load.v3f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
62main_body:
63  %x = extractelement <2 x i16> %coords, i32 0
64  %y = extractelement <2 x i16> %coords, i32 1
65  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 7, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
66  ret <4 x float> %v
67}
68
69; GCN-LABEL: {{^}}load.v4f32.2d:
70; GCN: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16
71define amdgpu_ps <4 x float> @load.v4f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
72main_body:
73  %x = extractelement <2 x i16> %coords, i32 0
74  %y = extractelement <2 x i16> %coords, i32 1
75  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 15, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
76  ret <4 x float> %v
77}
78
79; GCN-LABEL: {{^}}load.f32.3d:
80; GCN: image_load v0, v[0:1], s[0:7] dmask:0x1 unorm a16
81define amdgpu_ps <4 x float> @load.f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
82main_body:
83  %x = extractelement <2 x i16> %coords_lo, i32 0
84  %y = extractelement <2 x i16> %coords_lo, i32 1
85  %z = extractelement <2 x i16> %coords_hi, i32 0
86  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 1, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
87  ret <4 x float> %v
88}
89
90; GCN-LABEL: {{^}}load.v2f32.3d:
91; GCN: image_load v[0:1], v[0:1], s[0:7] dmask:0x3 unorm a16
92define amdgpu_ps <4 x float> @load.v2f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
93main_body:
94  %x = extractelement <2 x i16> %coords_lo, i32 0
95  %y = extractelement <2 x i16> %coords_lo, i32 1
96  %z = extractelement <2 x i16> %coords_hi, i32 0
97  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 3, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
98  ret <4 x float> %v
99}
100
101; GCN-LABEL: {{^}}load.v3f32.3d:
102; GCN: image_load v[0:2], v[0:1], s[0:7] dmask:0x7 unorm a16
103define amdgpu_ps <4 x float> @load.v3f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
104main_body:
105  %x = extractelement <2 x i16> %coords_lo, i32 0
106  %y = extractelement <2 x i16> %coords_lo, i32 1
107  %z = extractelement <2 x i16> %coords_hi, i32 0
108  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 7, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
109  ret <4 x float> %v
110}
111
112; GCN-LABEL: {{^}}load.v4f32.3d:
113; GCN: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16
114define amdgpu_ps <4 x float> @load.v4f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
115main_body:
116  %x = extractelement <2 x i16> %coords_lo, i32 0
117  %y = extractelement <2 x i16> %coords_lo, i32 1
118  %z = extractelement <2 x i16> %coords_hi, i32 0
119  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
120  ret <4 x float> %v
121}
122
123declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
124declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #2
125declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #2
126
127attributes #0 = { nounwind }
128attributes #1 = { nounwind readonly }
129