1; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s
2; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
3; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
4
5; GCN-LABEL: {{^}}load.f32.1d:
6; GFX9: image_load v0, v0, s[0:7] dmask:0x1 unorm a16
7; GFX10: image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm a16
8define amdgpu_ps <4 x float> @load.f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
9main_body:
10  %x = extractelement <2 x i16> %coords, i32 0
11  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 1, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
12  ret <4 x float> %v
13}
14
15; GCN-LABEL: {{^}}load.v2f32.1d:
16; GFX9: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm a16
17; GFX10: image_load v[0:1], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm a16
18define amdgpu_ps <4 x float> @load.v2f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
19main_body:
20  %x = extractelement <2 x i16> %coords, i32 0
21  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 3, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
22  ret <4 x float> %v
23}
24
25; GCN-LABEL: {{^}}load.v3f32.1d:
26; GFX9: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm a16
27; GFX10: image_load v[0:2], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm a16
28define amdgpu_ps <4 x float> @load.v3f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
29main_body:
30  %x = extractelement <2 x i16> %coords, i32 0
31  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 7, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
32  ret <4 x float> %v
33}
34
35; GCN-LABEL: {{^}}load.v4f32.1d:
36; GFX9: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16
37; GFX10: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
38define amdgpu_ps <4 x float> @load.v4f32.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
39main_body:
40  %x = extractelement <2 x i16> %coords, i32 0
41  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %x, <8 x i32> %rsrc, i32 0, i32 0)
42  ret <4 x float> %v
43}
44
45; GCN-LABEL: {{^}}load.f32.2d:
46; GFX9: image_load v0, v0, s[0:7] dmask:0x1 unorm a16
47; GFX10: image_load v0, v0, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm a16
48define amdgpu_ps <4 x float> @load.f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
49main_body:
50  %x = extractelement <2 x i16> %coords, i32 0
51  %y = extractelement <2 x i16> %coords, i32 1
52  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 1, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
53  ret <4 x float> %v
54}
55
56; GCN-LABEL: {{^}}load.v2f32.2d:
57; GFX9: image_load v[0:1], v0, s[0:7] dmask:0x3 unorm a16
58; GFX10: image_load v[0:1], v0, s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm a16
59define amdgpu_ps <4 x float> @load.v2f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
60main_body:
61  %x = extractelement <2 x i16> %coords, i32 0
62  %y = extractelement <2 x i16> %coords, i32 1
63  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 3, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
64  ret <4 x float> %v
65}
66
67; GCN-LABEL: {{^}}load.v3f32.2d:
68; GFX9: image_load v[0:2], v0, s[0:7] dmask:0x7 unorm a16
69; GFX10: image_load v[0:2], v0, s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D unorm a16
70define amdgpu_ps <4 x float> @load.v3f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
71main_body:
72  %x = extractelement <2 x i16> %coords, i32 0
73  %y = extractelement <2 x i16> %coords, i32 1
74  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 7, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
75  ret <4 x float> %v
76}
77
78; GCN-LABEL: {{^}}load.v4f32.2d:
79; GFX9: image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16
80; GFX10: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
81define amdgpu_ps <4 x float> @load.v4f32.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
82main_body:
83  %x = extractelement <2 x i16> %coords, i32 0
84  %y = extractelement <2 x i16> %coords, i32 1
85  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 15, i16 %x, i16 %y, <8 x i32> %rsrc, i32 0, i32 0)
86  ret <4 x float> %v
87}
88
89; GCN-LABEL: {{^}}load.f32.3d:
90; GFX9: image_load v0, v[0:1], s[0:7] dmask:0x1 unorm a16
91; GFX10: image_load v0, v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_3D unorm a16
92define amdgpu_ps <4 x float> @load.f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
93main_body:
94  %x = extractelement <2 x i16> %coords_lo, i32 0
95  %y = extractelement <2 x i16> %coords_lo, i32 1
96  %z = extractelement <2 x i16> %coords_hi, i32 0
97  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 1, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
98  ret <4 x float> %v
99}
100
101; GCN-LABEL: {{^}}load.v2f32.3d:
102; GFX9: image_load v[0:1], v[0:1], s[0:7] dmask:0x3 unorm a16
103; GFX10: image_load v[0:1], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_3D unorm a16
104define amdgpu_ps <4 x float> @load.v2f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
105main_body:
106  %x = extractelement <2 x i16> %coords_lo, i32 0
107  %y = extractelement <2 x i16> %coords_lo, i32 1
108  %z = extractelement <2 x i16> %coords_hi, i32 0
109  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 3, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
110  ret <4 x float> %v
111}
112
113; GCN-LABEL: {{^}}load.v3f32.3d:
114; GFX9: image_load v[0:2], v[0:1], s[0:7] dmask:0x7 unorm a16
115; GFX10: image_load v[0:2], v[0:1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_3D unorm a16
116define amdgpu_ps <4 x float> @load.v3f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
117main_body:
118  %x = extractelement <2 x i16> %coords_lo, i32 0
119  %y = extractelement <2 x i16> %coords_lo, i32 1
120  %z = extractelement <2 x i16> %coords_hi, i32 0
121  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 7, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
122  ret <4 x float> %v
123}
124
125; GCN-LABEL: {{^}}load.v4f32.3d:
126; GFX9: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16
127; GFX10: image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
128define amdgpu_ps <4 x float> @load.v4f32.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
129main_body:
130  %x = extractelement <2 x i16> %coords_lo, i32 0
131  %y = extractelement <2 x i16> %coords_lo, i32 1
132  %z = extractelement <2 x i16> %coords_hi, i32 0
133  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %x, i16 %y, i16 %z, <8 x i32> %rsrc, i32 0, i32 0)
134  ret <4 x float> %v
135}
136
137declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
138declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #2
139declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #2
140
141attributes #0 = { nounwind }
142attributes #1 = { nounwind readonly }
143