1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s
3
4declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1) #0
5declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #0
6
7; GCN-LABEL: {{^}}test_export_compr_zeroes_v2f16:
8; GCN: exp mrt0 off, off, off, off compr{{$}}
9; GCN: exp mrt0 off, off, off, off done compr{{$}}
10define void @test_export_compr_zeroes_v2f16() #0 {
11  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroinitializer, i1 false, i1 false)
12  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroinitializer, i1 true, i1 false)
13  ret void
14}
15
16; GCN-LABEL: {{^}}test_export_compr_en_src0_v2f16:
17; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
18; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
19; GCN: exp mrt0 [[SRC0]], [[SRC0]], off, off done compr{{$}}
20define void @test_export_compr_en_src0_v2f16() #0 {
21  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 3, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false)
22  ret void
23}
24
25; GCN-LABEL: {{^}}test_export_compr_en_src1_v2f16:
26; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
27; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
28; GCN: exp mrt0 off, off, [[SRC1]], [[SRC1]] done compr{{$}}
29define void @test_export_compr_en_src1_v2f16() #0 {
30  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 12, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false)
31  ret void
32}
33
34; GCN-LABEL: {{^}}test_export_compr_en_src0_src1_v2f16:
35; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
36; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
37; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}}
38define void @test_export_compr_en_src0_src1_v2f16() #0 {
39  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false)
40  ret void
41}
42
43; GCN-LABEL: {{^}}test_export_compr_en_invalid2_v2f16:
44; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
45; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
46; GCN: exp mrt0 off, [[SRC0]], off, off done compr{{$}}
47define void @test_export_compr_en_invalid2_v2f16() #0 {
48  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 2, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false)
49  ret void
50}
51
52; GCN-LABEL: {{^}}test_export_compr_en_invalid10_v2f16:
53; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
54; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
55; GCN: exp mrt0 off, [[SRC0]], off, [[SRC1]] done compr{{$}}
56define void @test_export_compr_en_invalid10_v2f16() #0 {
57  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 10, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false)
58  ret void
59}
60
61; GCN-LABEL: {{^}}test_export_compr_mrt7_v2f16:
62; GCN-DAG: v_mov_b32_e32 [[VHALF:v[0-9]+]], 0x38003800
63; GCN: exp mrt7 [[VHALF]], [[VHALF]], [[VHALF]], [[VHALF]] compr{{$}}
64; GCN: exp mrt7 [[VHALF]], [[VHALF]], [[VHALF]], [[VHALF]] done compr{{$}}
65define void @test_export_compr_mrt7_v2f16() #0 {
66  call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> <half 0.5, half 0.5>, i1 false, i1 false)
67  call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> <half 0.5, half 0.5>, i1 true, i1 false)
68  ret void
69}
70
71; GCN-LABEL: {{^}}test_export_compr_z_v2f16:
72; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
73; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
74; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr{{$}}
75; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}}
76define void @test_export_compr_z_v2f16() #0 {
77  call void @llvm.amdgcn.exp.compr.v2f16(i32 8, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 false, i1 false)
78  call void @llvm.amdgcn.exp.compr.v2f16(i32 8, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false)
79  ret void
80}
81
82; GCN-LABEL: {{^}}test_export_compr_vm_v2f16:
83; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00
84; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800
85; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr vm{{$}}
86; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr vm{{$}}
87define void @test_export_compr_vm_v2f16() #0 {
88  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 false, i1 true)
89  call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 true)
90  ret void
91}
92
93; GCN-LABEL: {{^}}test_export_compr_zeroes_v2i16:
94; GCN: exp mrt0 off, off, off, off compr{{$}}
95; GCN: exp mrt0 off, off, off, off done compr{{$}}
96define void @test_export_compr_zeroes_v2i16() #0 {
97  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 0, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 false, i1 false)
98  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 0, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 true, i1 false)
99  ret void
100}
101
102; GCN-LABEL: {{^}}test_export_compr_en_src0_v2i16:
103; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001
104; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005
105; GCN: exp mrt0 [[SRC0]], off, off, off done compr{{$}}
106define void @test_export_compr_en_src0_v2i16() #0 {
107  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 1, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false)
108  ret void
109}
110
111; GCN-LABEL: {{^}}test_export_compr_en_src1_v2i16:
112; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001
113; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005
114; GCN: exp mrt0 off, off, [[SRC1]], [[SRC1]] done compr{{$}}
115define void @test_export_compr_en_src1_v2i16() #0 {
116  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 12, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false)
117  ret void
118}
119
120; GCN-LABEL: {{^}}test_export_compr_en_src0_src1_v2i16:
121; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001
122; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005
123; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}}
124define void @test_export_compr_en_src0_src1_v2i16() #0 {
125  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false)
126  ret void
127}
128
129; GCN-LABEL: {{^}}test_export_compr_mrt7_v2i16:
130; GCN-DAG: v_mov_b32_e32 [[VI16:v[0-9]+]], 0x50005
131; GCN: exp mrt7 [[VI16]], [[VI16]], [[VI16]], [[VI16]] compr{{$}}
132; GCN: exp mrt7 [[VI16]], [[VI16]], [[VI16]], [[VI16]] done compr{{$}}
133define void @test_export_compr_mrt7_v2i16() #0 {
134  call void @llvm.amdgcn.exp.compr.v2i16(i32 7, i32 15, <2 x i16> <i16 5, i16 5>, <2 x i16> <i16 5, i16 5>, i1 false, i1 false)
135  call void @llvm.amdgcn.exp.compr.v2i16(i32 7, i32 15, <2 x i16> <i16 5, i16 5>, <2 x i16> <i16 5, i16 5>, i1 true, i1 false)
136  ret void
137}
138
139; GCN-LABEL: {{^}}test_export_compr_z_v2i16:
140; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001
141; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005
142; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr{{$}}
143; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}}
144define void @test_export_compr_z_v2i16() #0 {
145  call void @llvm.amdgcn.exp.compr.v2i16(i32 8, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 false, i1 false)
146  call void @llvm.amdgcn.exp.compr.v2i16(i32 8, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false)
147  ret void
148}
149
150; GCN-LABEL: {{^}}test_export_compr_vm_v2i16:
151; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001
152; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005
153; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr vm{{$}}
154; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr vm{{$}}
155define void @test_export_compr_vm_v2i16() #0 {
156  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 false, i1 true)
157  call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 true)
158  ret void
159}
160
161attributes #0 = { nounwind }
162