1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s 3; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s 4; RUN: not llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s 2>&1 | FileCheck -strict-whitespace -check-prefix=ERR %s 5 6; ERR: error: <unknown>:0:0: in function test_export_compr_zeroes_v2f16 void (): intrinsic not supported on subtarget 7 8declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1) #0 9declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #0 10 11; GCN-LABEL: {{^}}test_export_compr_zeroes_v2f16: 12; GCN: exp mrt0 off, off, off, off compr{{$}} 13; GCN: exp mrt0 off, off, off, off done compr{{$}} 14define amdgpu_kernel void @test_export_compr_zeroes_v2f16() #0 { 15 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroinitializer, i1 false, i1 false) 16 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroinitializer, i1 true, i1 false) 17 ret void 18} 19 20; GCN-LABEL: {{^}}test_export_compr_en_src0_v2f16: 21; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 22; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 23; GCN: exp mrt0 [[SRC0]], [[SRC0]], off, off done compr{{$}} 24define amdgpu_kernel void @test_export_compr_en_src0_v2f16() #0 { 25 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 3, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 26 ret void 27} 28 29; GCN-LABEL: {{^}}test_export_compr_en_src1_v2f16: 30; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 31; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 32; GCN: exp mrt0 off, off, [[SRC1]], [[SRC1]] done compr{{$}} 33define amdgpu_kernel void @test_export_compr_en_src1_v2f16() #0 { 34 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 12, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 35 ret void 36} 37 38; GCN-LABEL: {{^}}test_export_compr_en_src0_src1_v2f16: 39; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 40; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 41; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 42define amdgpu_kernel void @test_export_compr_en_src0_src1_v2f16() #0 { 43 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 44 ret void 45} 46 47; GCN-LABEL: {{^}}test_export_compr_en_invalid2_v2f16: 48; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 49; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 50; GCN: exp mrt0 off, [[SRC0]], off, off done compr{{$}} 51define amdgpu_kernel void @test_export_compr_en_invalid2_v2f16() #0 { 52 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 2, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 53 ret void 54} 55 56; GCN-LABEL: {{^}}test_export_compr_en_invalid10_v2f16: 57; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 58; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 59; GCN: exp mrt0 off, [[SRC0]], off, [[SRC1]] done compr{{$}} 60define amdgpu_kernel void @test_export_compr_en_invalid10_v2f16() #0 { 61 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 10, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 62 ret void 63} 64 65; GCN-LABEL: {{^}}test_export_compr_mrt7_v2f16: 66; GCN-DAG: v_mov_b32_e32 [[VHALF:v[0-9]+]], 0x38003800 67; GCN: exp mrt7 [[VHALF]], [[VHALF]], [[VHALF]], [[VHALF]] compr{{$}} 68; GCN: exp mrt7 [[VHALF]], [[VHALF]], [[VHALF]], [[VHALF]] done compr{{$}} 69define amdgpu_kernel void @test_export_compr_mrt7_v2f16() #0 { 70 call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> <half 0.5, half 0.5>, i1 false, i1 false) 71 call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> <half 0.5, half 0.5>, i1 true, i1 false) 72 ret void 73} 74 75; GCN-LABEL: {{^}}test_export_compr_z_v2f16: 76; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 77; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 78; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr{{$}} 79; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 80define amdgpu_kernel void @test_export_compr_z_v2f16() #0 { 81 call void @llvm.amdgcn.exp.compr.v2f16(i32 8, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 false, i1 false) 82 call void @llvm.amdgcn.exp.compr.v2f16(i32 8, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 83 ret void 84} 85 86; GCN-LABEL: {{^}}test_export_compr_vm_v2f16: 87; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 88; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 89; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr vm{{$}} 90; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr vm{{$}} 91define amdgpu_kernel void @test_export_compr_vm_v2f16() #0 { 92 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 false, i1 true) 93 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 true) 94 ret void 95} 96 97; GCN-LABEL: {{^}}test_export_compr_zeroes_v2i16: 98; GCN: exp mrt0 off, off, off, off compr{{$}} 99; GCN: exp mrt0 off, off, off, off done compr{{$}} 100define amdgpu_kernel void @test_export_compr_zeroes_v2i16() #0 { 101 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 0, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 false, i1 false) 102 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 0, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 true, i1 false) 103 ret void 104} 105 106; GCN-LABEL: {{^}}test_export_compr_en_src0_v2i16: 107; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 108; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 109; GCN: exp mrt0 [[SRC0]], off, off, off done compr{{$}} 110define amdgpu_kernel void @test_export_compr_en_src0_v2i16() #0 { 111 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 1, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 112 ret void 113} 114 115; GCN-LABEL: {{^}}test_export_compr_en_src1_v2i16: 116; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 117; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 118; GCN: exp mrt0 off, off, [[SRC1]], [[SRC1]] done compr{{$}} 119define amdgpu_kernel void @test_export_compr_en_src1_v2i16() #0 { 120 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 12, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 121 ret void 122} 123 124; GCN-LABEL: {{^}}test_export_compr_en_src0_src1_v2i16: 125; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 126; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 127; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 128define amdgpu_kernel void @test_export_compr_en_src0_src1_v2i16() #0 { 129 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 130 ret void 131} 132 133; GCN-LABEL: {{^}}test_export_compr_mrt7_v2i16: 134; GCN-DAG: v_mov_b32_e32 [[VI16:v[0-9]+]], 0x50005 135; GCN: exp mrt7 [[VI16]], [[VI16]], [[VI16]], [[VI16]] compr{{$}} 136; GCN: exp mrt7 [[VI16]], [[VI16]], [[VI16]], [[VI16]] done compr{{$}} 137define amdgpu_kernel void @test_export_compr_mrt7_v2i16() #0 { 138 call void @llvm.amdgcn.exp.compr.v2i16(i32 7, i32 15, <2 x i16> <i16 5, i16 5>, <2 x i16> <i16 5, i16 5>, i1 false, i1 false) 139 call void @llvm.amdgcn.exp.compr.v2i16(i32 7, i32 15, <2 x i16> <i16 5, i16 5>, <2 x i16> <i16 5, i16 5>, i1 true, i1 false) 140 ret void 141} 142 143; GCN-LABEL: {{^}}test_export_compr_z_v2i16: 144; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 145; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 146; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr{{$}} 147; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 148define amdgpu_kernel void @test_export_compr_z_v2i16() #0 { 149 call void @llvm.amdgcn.exp.compr.v2i16(i32 8, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 false, i1 false) 150 call void @llvm.amdgcn.exp.compr.v2i16(i32 8, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 151 ret void 152} 153 154; GCN-LABEL: {{^}}test_export_compr_vm_v2i16: 155; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 156; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 157; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr vm{{$}} 158; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr vm{{$}} 159define amdgpu_kernel void @test_export_compr_vm_v2i16() #0 { 160 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 false, i1 true) 161 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 true) 162 ret void 163} 164 165attributes #0 = { nounwind } 166