1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck --check-prefix=DOORBELL %s
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=4 < %s | FileCheck --check-prefix=DOORBELL %s
3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=3 < %s | FileCheck --check-prefix=HSA %s
4
5declare void @llvm.trap() #0
6
7; HSA:      .amdhsa_kernel trap
8; HSA-NEXT:     .amdhsa_group_segment_fixed_size 0
9; HSA-NEXT:     .amdhsa_private_segment_fixed_size 0
10; HSA-NEXT:     .amdhsa_kernarg_size 8
11; HSA-NEXT:     .amdhsa_user_sgpr_count 8
12; HSA-NEXT:     .amdhsa_user_sgpr_private_segment_buffer 1
13; HSA:      .end_amdhsa_kernel
14
15; DOORBELL:      .amdhsa_kernel trap
16; DOORBELL-NEXT:     .amdhsa_group_segment_fixed_size 0
17; DOORBELL-NEXT:     .amdhsa_private_segment_fixed_size 0
18; DOORBELL-NEXT:     .amdhsa_kernarg_size 8
19; DOORBELL-NEXT:     .amdhsa_user_sgpr_count 6
20; DOORBELL-NEXT:     .amdhsa_user_sgpr_private_segment_buffer 1
21; DOORBELL:      .end_amdhsa_kernel
22
23define amdgpu_kernel void @trap(i32 addrspace(1)* nocapture readonly %arg0) {
24  store volatile i32 1, i32 addrspace(1)* %arg0
25  call void @llvm.trap()
26  unreachable
27  store volatile i32 2, i32 addrspace(1)* %arg0
28  ret void
29}
30