1; RUN: not llc < %s -march=amdgcn -mcpu=bonaire -verify-machineinstrs | FileCheck --check-prefix=GCN %s 2; RUN: not llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN --check-prefix=VI %s 3 4; RUN: not llc < %s -march=amdgcn -mcpu=bonaire -verify-machineinstrs 2>&1 | FileCheck --check-prefix=NOGCN --check-prefix=NOSI %s 5; RUN: not llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs 2>&1 | FileCheck --check-prefix=NOGCN %s 6 7; GCN-LABEL: {{^}}inline_reg_constraints: 8; GCN: flat_load_dword v{{[0-9]+}}, v[{{[0-9]+:[0-9]+}}] 9; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 10; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 11; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 12; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] 13; GCN: s_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}] 14; GCN: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 15; GCN: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 16; GCN: s_load_dwordx4 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 17; GCN: s_load_dwordx4 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 18; GCN: s_load_dwordx8 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] 19 20define amdgpu_kernel void @inline_reg_constraints(i32 addrspace(1)* %ptr) { 21entry: 22 %v32 = tail call i32 asm sideeffect "flat_load_dword $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 23 %v2_32 = tail call <2 x i32> asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 24 %v64 = tail call i64 asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 25 %v4_32 = tail call <4 x i32> asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 26 %v128 = tail call i128 asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(i32 addrspace(1)* %ptr) 27 %s32 = tail call i32 asm sideeffect "s_load_dword $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 28 %s32_2 = tail call <2 x i32> asm sideeffect "s_load_dwordx2 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 29 %s64 = tail call i64 asm sideeffect "s_load_dwordx2 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 30 %s4_32 = tail call <4 x i32> asm sideeffect "s_load_dwordx4 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 31 %s128 = tail call i128 asm sideeffect "s_load_dwordx4 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 32 %s256 = tail call <8 x i32> asm sideeffect "s_load_dwordx8 $0, $1", "=s,s"(i32 addrspace(1)* %ptr) 33 ret void 34} 35 36; GCN-LABEL: {{^}}inline_sreg_constraint_m0: 37; GCN: s_mov_b32 m0, -1 38; GCN-NOT: m0 39; GCN: ; use m0 40define amdgpu_kernel void @inline_sreg_constraint_m0() { 41 %m0 = tail call i32 asm sideeffect "s_mov_b32 m0, -1", "={m0}"() 42 tail call void asm sideeffect "; use $0", "s"(i32 %m0) 43 ret void 44} 45 46; GCN-LABEL: {{^}}inline_sreg_constraint_imm_i32: 47; GCN: s_mov_b32 [[REG:s[0-9]+]], 32 48; GCN: ; use [[REG]] 49define amdgpu_kernel void @inline_sreg_constraint_imm_i32() { 50 tail call void asm sideeffect "; use $0", "s"(i32 32) 51 ret void 52} 53 54; GCN-LABEL: {{^}}inline_sreg_constraint_imm_f32: 55; GCN: s_mov_b32 [[REG:s[0-9]+]], 1.0 56; GCN: ; use [[REG]] 57define amdgpu_kernel void @inline_sreg_constraint_imm_f32() { 58 tail call void asm sideeffect "; use $0", "s"(float 1.0) 59 ret void 60} 61 62; GCN-LABEL: {{^}}inline_sreg_constraint_imm_i64: 63; GCN: s_mov_b64 [[REG:s\[[0-9:]+\]]], -4{{$}} 64; GCN: ; use [[REG]] 65define amdgpu_kernel void @inline_sreg_constraint_imm_i64() { 66 tail call void asm sideeffect "; use $0", "s"(i64 -4) 67 ret void 68} 69 70; GCN-LABEL: {{^}}inline_sreg_constraint_imm_f64: 71; GCN: s_mov_b64 [[REG:s\[[0-9:]+\]]], 1.0{{$}} 72; GCN: ; use [[REG]] 73define amdgpu_kernel void @inline_sreg_constraint_imm_f64() { 74 tail call void asm sideeffect "; use $0", "s"(double 1.0) 75 ret void 76} 77 78;============================================================================== 79; 'A' constraint, 16-bit operand 80;============================================================================== 81 82; NOSI: error: invalid operand for inline asm constraint 'A' 83; VI-LABEL: {{^}}inline_A_constraint_H0: 84; VI: v_mov_b32 {{v[0-9]+}}, 64 85define i32 @inline_A_constraint_H0() { 86 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 64) 87 ret i32 %v0 88} 89 90; NOSI: error: invalid operand for inline asm constraint 'A' 91; VI-LABEL: {{^}}inline_A_constraint_H1: 92; VI: v_mov_b32 {{v[0-9]+}}, -16 93define i32 @inline_A_constraint_H1() { 94 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 -16) 95 ret i32 %v0 96} 97 98; NOSI: error: invalid operand for inline asm constraint 'A' 99; VI-LABEL: {{^}}inline_A_constraint_H2: 100; VI: v_mov_b32 {{v[0-9]+}}, 0x3c00 101define i32 @inline_A_constraint_H2() { 102 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 1.0 to i16)) 103 ret i32 %v0 104} 105 106; NOSI: error: invalid operand for inline asm constraint 'A' 107; VI-LABEL: {{^}}inline_A_constraint_H3: 108; VI: v_mov_b32 {{v[0-9]+}}, 0xbc00 109define i32 @inline_A_constraint_H3() { 110 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half -1.0 to i16)) 111 ret i32 %v0 112} 113 114; NOSI: error: invalid operand for inline asm constraint 'A' 115; VI-LABEL: {{^}}inline_A_constraint_H4: 116; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 117define i32 @inline_A_constraint_H4() { 118 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(half 0xH3118) 119 ret i32 %v0 120} 121 122; NOSI: error: invalid operand for inline asm constraint 'A' 123; VI-LABEL: {{^}}inline_A_constraint_H5: 124; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 125define i32 @inline_A_constraint_H5() { 126 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3118 to i16)) 127 ret i32 %v0 128} 129 130; NOSI: error: invalid operand for inline asm constraint 'A' 131; VI-LABEL: {{^}}inline_A_constraint_H6: 132; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 133define i32 @inline_A_constraint_H6() { 134 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(half -0.5) 135 ret i32 %v0 136} 137 138; NOGCN: error: invalid operand for inline asm constraint 'A' 139define i32 @inline_A_constraint_H7() { 140 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3119 to i16)) 141 ret i32 %v0 142} 143 144; NOGCN: error: invalid operand for inline asm constraint 'A' 145define i32 @inline_A_constraint_H8() { 146 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3117 to i16)) 147 ret i32 %v0 148} 149 150; NOGCN: error: invalid operand for inline asm constraint 'A' 151define i32 @inline_A_constraint_H9() { 152 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 65) 153 ret i32 %v0 154} 155 156;============================================================================== 157; 'A' constraint, 32-bit operand 158;============================================================================== 159 160; GCN-LABEL: {{^}}inline_A_constraint_F0: 161; GCN: v_mov_b32 {{v[0-9]+}}, -16 162define i32 @inline_A_constraint_F0() { 163 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 -16) 164 ret i32 %v0 165} 166 167; GCN-LABEL: {{^}}inline_A_constraint_F1: 168; GCN: v_mov_b32 {{v[0-9]+}}, 1 169define i32 @inline_A_constraint_F1() { 170 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1) 171 ret i32 %v0 172} 173 174; GCN-LABEL: {{^}}inline_A_constraint_F2: 175; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000 176define i32 @inline_A_constraint_F2() { 177 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 bitcast (float -0.5 to i32)) 178 ret i32 %v0 179} 180 181; GCN-LABEL: {{^}}inline_A_constraint_F3: 182; GCN: v_mov_b32 {{v[0-9]+}}, 0x40000000 183define i32 @inline_A_constraint_F3() { 184 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 bitcast (float 2.0 to i32)) 185 ret i32 %v0 186} 187 188; GCN-LABEL: {{^}}inline_A_constraint_F4: 189; GCN: v_mov_b32 {{v[0-9]+}}, 0xc0800000 190define i32 @inline_A_constraint_F4() { 191 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(float -4.0) 192 ret i32 %v0 193} 194 195; NOSI: error: invalid operand for inline asm constraint 'A' 196; VI-LABEL: {{^}}inline_A_constraint_F5: 197; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f983 198define i32 @inline_A_constraint_F5() { 199 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1042479491) 200 ret i32 %v0 201} 202 203; GCN-LABEL: {{^}}inline_A_constraint_F6: 204; GCN: v_mov_b32 {{v[0-9]+}}, 0x3f000000 205define i32 @inline_A_constraint_F6() { 206 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(float 0.5) 207 ret i32 %v0 208} 209 210; NOGCN: error: invalid operand for inline asm constraint 'A' 211define i32 @inline_A_constraint_F7() { 212 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1042479490) 213 ret i32 %v0 214} 215 216; NOGCN: error: invalid operand for inline asm constraint 'A' 217define i32 @inline_A_constraint_F8() { 218 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 -17) 219 ret i32 %v0 220} 221 222;============================================================================== 223; 'A' constraint, 64-bit operand 224;============================================================================== 225 226; GCN-LABEL: {{^}}inline_A_constraint_D0: 227; GCN: v_mov_b32 {{v[0-9]+}}, -16 228define i32 @inline_A_constraint_D0() { 229 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i64 -16) 230 ret i32 %v0 231} 232 233; GCN-LABEL: {{^}}inline_A_constraint_D1: 234; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0xc000000000000000 235define i32 @inline_A_constraint_D1() { 236 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double -2.0 to i64)) 237 ret i32 %v0 238} 239 240; GCN-LABEL: {{^}}inline_A_constraint_D2: 241; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fe0000000000000 242define i32 @inline_A_constraint_D2() { 243 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 0.5) 244 ret i32 %v0 245} 246 247; NOSI: error: invalid operand for inline asm constraint 'A' 248; VI-LABEL: {{^}}inline_A_constraint_D3: 249; VI: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fc45f306dc9c882 250define i32 @inline_A_constraint_D3() { 251 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 0.15915494309189532) 252 ret i32 %v0 253} 254 255; NOSI: error: invalid operand for inline asm constraint 'A' 256; VI-LABEL: {{^}}inline_A_constraint_D4: 257; VI: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fc45f306dc9c882 258define i32 @inline_A_constraint_D4() { 259 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double 0.15915494309189532 to i64)) 260 ret i32 %v0 261} 262 263; GCN-LABEL: {{^}}inline_A_constraint_D5: 264; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0xc000000000000000 265define i32 @inline_A_constraint_D5() { 266 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double -2.0) 267 ret i32 %v0 268} 269 270; NOGCN: error: invalid operand for inline asm constraint 'A' 271define i32 @inline_A_constraint_D8() { 272 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 1.1) 273 ret i32 %v0 274} 275 276; NOGCN: error: invalid operand for inline asm constraint 'A' 277define i32 @inline_A_constraint_D9() { 278 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double 0.1 to i64)) 279 ret i32 %v0 280} 281 282;============================================================================== 283; 'A' constraint, v2x16 operand 284;============================================================================== 285 286; NOSI: error: invalid operand for inline asm constraint 'A' 287; VI-LABEL: {{^}}inline_A_constraint_V0: 288; VI: v_mov_b32 {{v[0-9]+}}, -4 289define i32 @inline_A_constraint_V0() { 290 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 -4, i16 -4>) 291 ret i32 %v0 292} 293 294; NOSI: error: invalid operand for inline asm constraint 'A' 295; VI-LABEL: {{^}}inline_A_constraint_V1: 296; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 297define i32 @inline_A_constraint_V1() { 298 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x half> <half -0.5, half -0.5>) 299 ret i32 %v0 300} 301 302; NOGCN: error: invalid operand for inline asm constraint 'A' 303define i32 @inline_A_constraint_V2() { 304 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 -4, i16 undef>) 305 ret i32 %v0 306} 307 308; NOGCN: error: invalid operand for inline asm constraint 'A' 309define i32 @inline_A_constraint_V3() { 310 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x half> <half undef, half -0.5>) 311 ret i32 %v0 312} 313 314; NOGCN: error: invalid operand for inline asm constraint 'A' 315define i32 @inline_A_constraint_V4() { 316 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 1, i16 2>) 317 ret i32 %v0 318} 319 320; NOGCN: error: invalid operand for inline asm constraint 'A' 321define i32 @inline_A_constraint_V5() { 322 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<4 x i16> <i16 0, i16 0, i16 0, i16 0>) 323 ret i32 %v0 324} 325 326; NOGCN: error: invalid operand for inline asm constraint 'A' 327define i32 @inline_A_constraint_V6() { 328 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i32> <i32 0, i32 0>) 329 ret i32 %v0 330} 331 332;============================================================================== 333; 'A' constraint, type errors 334;============================================================================== 335 336; NOGCN: error: invalid operand for inline asm constraint 'A' 337define i32 @inline_A_constraint_E1(i32 %x) { 338 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 %x) 339 ret i32 %v0 340} 341 342; NOGCN: error: invalid operand for inline asm constraint 'A' 343define i32 @inline_A_constraint_E2() { 344 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i128 100000000000000000000) 345 ret i32 %v0 346} 347 348;============================================================================== 349; 'I' constraint, 16-bit operand 350;============================================================================== 351 352; NOSI: error: invalid operand for inline asm constraint 'I' 353; VI-LABEL: {{^}}inline_I_constraint_H0: 354; VI: v_mov_b32 {{v[0-9]+}}, 64 355define i32 @inline_I_constraint_H0() { 356 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 64) 357 ret i32 %v0 358} 359 360; NOSI: error: invalid operand for inline asm constraint 'I' 361; VI-LABEL: {{^}}inline_I_constraint_H1: 362; VI: v_mov_b32 {{v[0-9]+}}, -16 363define i32 @inline_I_constraint_H1() { 364 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(half bitcast (i16 -16 to half)) 365 ret i32 %v0 366} 367 368; NOGCN: error: invalid operand for inline asm constraint 'I' 369define i32 @inline_I_constraint_H6() { 370 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(half 1.0) 371 ret i32 %v0 372} 373 374; NOGCN: error: invalid operand for inline asm constraint 'I' 375define i32 @inline_I_constraint_H7() { 376 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 bitcast (half -1.0 to i16)) 377 ret i32 %v0 378} 379 380; NOGCN: error: invalid operand for inline asm constraint 'I' 381define i32 @inline_I_constraint_H8() { 382 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 -17) 383 ret i32 %v0 384} 385 386; NOGCN: error: invalid operand for inline asm constraint 'I' 387define i32 @inline_I_constraint_H9() { 388 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 65) 389 ret i32 %v0 390} 391 392;============================================================================== 393; 'I' constraint, 32-bit operand 394;============================================================================== 395 396; GCN-LABEL: {{^}}inline_I_constraint_F0: 397; GCN: v_mov_b32 {{v[0-9]+}}, -16 398define i32 @inline_I_constraint_F0() { 399 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 -16) 400 ret i32 %v0 401} 402 403; GCN-LABEL: {{^}}inline_I_constraint_F1: 404; GCN: v_mov_b32 {{v[0-9]+}}, -1 405define i32 @inline_I_constraint_F1() { 406 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(float bitcast (i32 -1 to float)) 407 ret i32 %v0 408} 409 410; NOGCN: error: invalid operand for inline asm constraint 'I' 411define i32 @inline_I_constraint_F8() { 412 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(float -4.0) 413 ret i32 %v0 414} 415 416; NOGCN: error: invalid operand for inline asm constraint 'I' 417define i32 @inline_I_constraint_F9() { 418 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 -17) 419 ret i32 %v0 420} 421 422;============================================================================== 423; 'I' constraint, 64-bit operand 424;============================================================================== 425 426; GCN-LABEL: {{^}}inline_I_constraint_D0: 427; GCN: v_mov_b32 {{v[0-9]+}}, -16 428define i32 @inline_I_constraint_D0() { 429 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i64 -16) 430 ret i32 %v0 431} 432 433; NOGCN: error: invalid operand for inline asm constraint 'I' 434define i32 @inline_I_constraint_D8() { 435 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,I"(double 0.5) 436 ret i32 %v0 437} 438 439; NOGCN: error: invalid operand for inline asm constraint 'I' 440define i32 @inline_I_constraint_D9() { 441 %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,I"(i64 65) 442 ret i32 %v0 443} 444 445;============================================================================== 446; 'I' constraint, v2x16 operand 447;============================================================================== 448 449; NOSI: error: invalid operand for inline asm constraint 'I' 450; VI-LABEL: {{^}}inline_I_constraint_V0: 451; VI: v_mov_b32 {{v[0-9]+}}, -4 452define i32 @inline_I_constraint_V0() { 453 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 -4, i16 -4>) 454 ret i32 %v0 455} 456 457; NOGCN: error: invalid operand for inline asm constraint 'I' 458define i32 @inline_I_constraint_V1() { 459 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x half> <half -0.5, half -0.5>) 460 ret i32 %v0 461} 462 463; NOGCN: error: invalid operand for inline asm constraint 'I' 464define i32 @inline_I_constraint_V2() { 465 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 -4, i16 undef>) 466 ret i32 %v0 467} 468 469; NOGCN: error: invalid operand for inline asm constraint 'I' 470define i32 @inline_I_constraint_V3() { 471 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 1, i16 2>) 472 ret i32 %v0 473} 474 475; NOGCN: error: invalid operand for inline asm constraint 'I' 476define i32 @inline_I_constraint_V4() { 477 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<4 x i16> <i16 0, i16 0, i16 0, i16 0>) 478 ret i32 %v0 479} 480 481; NOGCN: error: invalid operand for inline asm constraint 'I' 482define i32 @inline_I_constraint_V5() { 483 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i32> <i32 0, i32 0>) 484 ret i32 %v0 485} 486 487;============================================================================== 488; 'I' constraint, type errors 489;============================================================================== 490 491; NOGCN: error: invalid operand for inline asm constraint 'I' 492define i32 @inline_I_constraint_E1(i32 %x) { 493 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 %x) 494 ret i32 %v0 495} 496 497; NOGCN: error: invalid operand for inline asm constraint 'I' 498define i32 @inline_I_constraint_E2() { 499 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i128 100000000000000000000) 500 ret i32 %v0 501} 502 503;============================================================================== 504; 'J' constraint, 16-bit operand 505;============================================================================== 506 507; NOSI: error: invalid operand for inline asm constraint 'J' 508; VI-LABEL: {{^}}inline_J_constraint_H0: 509; VI: v_mov_b32 {{v[0-9]+}}, -1 510define i32 @inline_J_constraint_H0() { 511 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 65535) 512 ret i32 %v0 513} 514 515; NOSI: error: invalid operand for inline asm constraint 'J' 516; VI-LABEL: {{^}}inline_J_constraint_H1: 517; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 518define i32 @inline_J_constraint_H1() { 519 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 32767) 520 ret i32 %v0 521} 522 523; NOSI: error: invalid operand for inline asm constraint 'J' 524; VI-LABEL: {{^}}inline_J_constraint_H2: 525; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 526define i32 @inline_J_constraint_H2() { 527 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 -32768) 528 ret i32 %v0 529} 530 531; NOSI: error: invalid operand for inline asm constraint 'J' 532; VI-LABEL: {{^}}inline_J_constraint_H3: 533; VI: v_mov_b32 {{v[0-9]+}}, 0x4800 534define i32 @inline_J_constraint_H3() { 535 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(half 8.0) 536 ret i32 %v0 537} 538 539; NOSI: error: invalid operand for inline asm constraint 'J' 540; VI-LABEL: {{^}}inline_J_constraint_H4: 541; VI: v_mov_b32 {{v[0-9]+}}, -16 542define i32 @inline_J_constraint_H4() { 543 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(half bitcast (i16 -16 to half)) 544 ret i32 %v0 545} 546 547;============================================================================== 548; 'J' constraint, 32-bit operand 549;============================================================================== 550 551; GCN-LABEL: {{^}}inline_J_constraint_F0: 552; GCN: v_mov_b32 {{v[0-9]+}}, -1 553define i32 @inline_J_constraint_F0() { 554 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -1) 555 ret i32 %v0 556} 557 558; GCN-LABEL: {{^}}inline_J_constraint_F1: 559; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff 560define i32 @inline_J_constraint_F1() { 561 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 32767) 562 ret i32 %v0 563} 564 565; GCN-LABEL: {{^}}inline_J_constraint_F2: 566; GCN: v_mov_b32 {{v[0-9]+}}, 0xffff8000 567define i32 @inline_J_constraint_F2() { 568 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -32768) 569 ret i32 %v0 570} 571 572; NOGCN: error: invalid operand for inline asm constraint 'J' 573define i32 @inline_J_constraint_F6() { 574 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 32768) 575 ret i32 %v0 576} 577 578; NOGCN: error: invalid operand for inline asm constraint 'J' 579define i32 @inline_J_constraint_F7() { 580 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -32769) 581 ret i32 %v0 582} 583 584; NOGCN: error: invalid operand for inline asm constraint 'J' 585define i32 @inline_J_constraint_F8() { 586 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(float -4.0) 587 ret i32 %v0 588} 589 590;============================================================================== 591; 'J' constraint, 64-bit operand 592;============================================================================== 593 594; GCN-LABEL: {{^}}inline_J_constraint_D0: 595; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff 596define i32 @inline_J_constraint_D0() { 597 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 32767) 598 ret i32 %v0 599} 600 601; GCN-LABEL: {{^}}inline_J_constraint_D1: 602; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffffffff8000 603define i32 @inline_J_constraint_D1() { 604 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 -32768) 605 ret i32 %v0 606} 607 608; NOGCN: error: invalid operand for inline asm constraint 'J' 609define i32 @inline_J_constraint_D8() { 610 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 32768) 611 ret i32 %v0 612} 613 614; NOGCN: error: invalid operand for inline asm constraint 'J' 615define i32 @inline_J_constraint_D9() { 616 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 -32769) 617 ret i32 %v0 618} 619 620;============================================================================== 621; 'J' constraint, v2x16 operand 622;============================================================================== 623 624; NOSI: error: invalid operand for inline asm constraint 'J' 625; VI-LABEL: {{^}}inline_J_constraint_V0: 626; VI: v_mov_b32 {{v[0-9]+}}, -4 627define i32 @inline_J_constraint_V0() { 628 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 -4, i16 -4>) 629 ret i32 %v0 630} 631 632; NOSI: error: invalid operand for inline asm constraint 'J' 633; VI-LABEL: {{^}}inline_J_constraint_V1: 634; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 635define i32 @inline_J_constraint_V1() { 636 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 32767, i16 32767>) 637 ret i32 %v0 638} 639 640; NOSI: error: invalid operand for inline asm constraint 'J' 641; VI-LABEL: {{^}}inline_J_constraint_V2: 642; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 643define i32 @inline_J_constraint_V2() { 644 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 -32768, i16 -32768>) 645 ret i32 %v0 646} 647 648; NOSI: error: invalid operand for inline asm constraint 'J' 649; VI-LABEL: {{^}}inline_J_constraint_V3: 650; VI: v_mov_b32 {{v[0-9]+}}, 0x4c00 651define i32 @inline_J_constraint_V3() { 652 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x half> <half 16.0, half 16.0>) 653 ret i32 %v0 654} 655 656;============================================================================== 657; 'J' constraint, type errors 658;============================================================================== 659 660; NOGCN: error: invalid operand for inline asm constraint 'J' 661define i32 @inline_J_constraint_E1(i32 %x) { 662 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 %x) 663 ret i32 %v0 664} 665 666; NOGCN: error: invalid operand for inline asm constraint 'J' 667define i32 @inline_J_constraint_E2() { 668 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i128 100000000000000000000) 669 ret i32 %v0 670} 671 672;============================================================================== 673; 'B' constraint, 16-bit operand 674;============================================================================== 675 676; NOSI: error: invalid operand for inline asm constraint 'B' 677; VI-LABEL: {{^}}inline_B_constraint_H0: 678; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 679define i32 @inline_B_constraint_H0() { 680 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 32767) 681 ret i32 %v0 682} 683 684; NOSI: error: invalid operand for inline asm constraint 'B' 685; VI-LABEL: {{^}}inline_B_constraint_H1: 686; VI: v_mov_b32 {{v[0-9]+}}, -1 687define i32 @inline_B_constraint_H1() { 688 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 65535) 689 ret i32 %v0 690} 691 692; NOSI: error: invalid operand for inline asm constraint 'B' 693; VI-LABEL: {{^}}inline_B_constraint_H3: 694; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 695define i32 @inline_B_constraint_H3() { 696 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 -32768) 697 ret i32 %v0 698} 699 700; NOSI: error: invalid operand for inline asm constraint 'B' 701; VI-LABEL: {{^}}inline_B_constraint_H4: 702; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80 703define i32 @inline_B_constraint_H4() { 704 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(half 13.0) 705 ret i32 %v0 706} 707 708;============================================================================== 709; 'B' constraint, 32-bit operand 710;============================================================================== 711 712; GCN-LABEL: {{^}}inline_B_constraint_F0: 713; GCN: v_mov_b32 {{v[0-9]+}}, -1 714define i32 @inline_B_constraint_F0() { 715 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i32 4294967295) 716 ret i32 %v0 717} 718 719; GCN-LABEL: {{^}}inline_B_constraint_F1: 720; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 721define i32 @inline_B_constraint_F1() { 722 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i32 2147483648) 723 ret i32 %v0 724} 725 726; GCN-LABEL: {{^}}inline_B_constraint_F2: 727; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000 728define i32 @inline_B_constraint_F2() { 729 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(float 32.0) 730 ret i32 %v0 731} 732 733;============================================================================== 734; 'B' constraint, 64-bit operand 735;============================================================================== 736 737; GCN-LABEL: {{^}}inline_B_constraint_D0: 738; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fffffff 739define i32 @inline_B_constraint_D0() { 740 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 2147483647) 741 ret i32 %v0 742} 743 744; GCN-LABEL: {{^}}inline_B_constraint_D1: 745; GCN: v_mov_b32 {{v[0-9]+}}, -1 746define i32 @inline_B_constraint_D1() { 747 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -1) 748 ret i32 %v0 749} 750 751; GCN-LABEL: {{^}}inline_B_constraint_D2: 752; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffff80000000 753define i32 @inline_B_constraint_D2() { 754 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -2147483648) 755 ret i32 %v0 756} 757 758; NOGCN: error: invalid operand for inline asm constraint 'B' 759define i32 @inline_B_constraint_D7() { 760 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -2147483649) 761 ret i32 %v0 762} 763 764; NOGCN: error: invalid operand for inline asm constraint 'B' 765define i32 @inline_B_constraint_D8() { 766 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 4294967295) 767 ret i32 %v0 768} 769 770; NOGCN: error: invalid operand for inline asm constraint 'B' 771define i32 @inline_B_constraint_D9() { 772 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 2147483648) 773 ret i32 %v0 774} 775 776;============================================================================== 777; 'B' constraint, v2x16 operand 778;============================================================================== 779 780; NOSI: error: invalid operand for inline asm constraint 'B' 781; VI-LABEL: {{^}}inline_B_constraint_V0: 782; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 783define i32 @inline_B_constraint_V0() { 784 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 32767, i16 32767>) 785 ret i32 %v0 786} 787 788; NOSI: error: invalid operand for inline asm constraint 'B' 789; VI-LABEL: {{^}}inline_B_constraint_V1: 790; VI: v_mov_b32 {{v[0-9]+}}, -1 791define i32 @inline_B_constraint_V1() { 792 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 -1, i16 -1>) 793 ret i32 %v0 794} 795 796; NOSI: error: invalid operand for inline asm constraint 'B' 797; VI-LABEL: {{^}}inline_B_constraint_V2: 798; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 799define i32 @inline_B_constraint_V2() { 800 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 -32768, i16 -32768>) 801 ret i32 %v0 802} 803 804;============================================================================== 805; 'C' constraint, 16-bit operand 806;============================================================================== 807 808; NOSI: error: invalid operand for inline asm constraint 'C' 809; VI-LABEL: {{^}}inline_C_constraint_H0: 810; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 811define i32 @inline_C_constraint_H0() { 812 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 32767) 813 ret i32 %v0 814} 815 816; NOSI: error: invalid operand for inline asm constraint 'C' 817; VI-LABEL: {{^}}inline_C_constraint_H1: 818; VI: v_mov_b32 {{v[0-9]+}}, -1 819define i32 @inline_C_constraint_H1() { 820 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 65535) 821 ret i32 %v0 822} 823 824; NOSI: error: invalid operand for inline asm constraint 'C' 825; VI-LABEL: {{^}}inline_C_constraint_H3: 826; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 827define i32 @inline_C_constraint_H3() { 828 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 -32768) 829 ret i32 %v0 830} 831 832; NOSI: error: invalid operand for inline asm constraint 'C' 833; VI-LABEL: {{^}}inline_C_constraint_H4: 834; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80 835define i32 @inline_C_constraint_H4() { 836 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(half 13.0) 837 ret i32 %v0 838} 839 840;============================================================================== 841; 'C' constraint, 32-bit operand 842;============================================================================== 843 844; GCN-LABEL: {{^}}inline_C_constraint_F0: 845; GCN: v_mov_b32 {{v[0-9]+}}, -1 846define i32 @inline_C_constraint_F0() { 847 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 4294967295) 848 ret i32 %v0 849} 850 851; GCN-LABEL: {{^}}inline_C_constraint_F1: 852; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 853define i32 @inline_C_constraint_F1() { 854 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 2147483648) 855 ret i32 %v0 856} 857 858; GCN-LABEL: {{^}}inline_C_constraint_F2: 859; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fffffff 860define i32 @inline_C_constraint_F2() { 861 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 2147483647) 862 ret i32 %v0 863} 864 865; GCN-LABEL: {{^}}inline_C_constraint_F3: 866; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000 867define i32 @inline_C_constraint_F3() { 868 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(float 32.0) 869 ret i32 %v0 870} 871 872; GCN-LABEL: {{^}}inline_C_constraint_F4: 873; GCN: v_mov_b32 {{v[0-9]+}}, -16 874define i32 @inline_C_constraint_F4() { 875 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 -16) 876 ret i32 %v0 877} 878 879; GCN-LABEL: {{^}}inline_C_constraint_F5: 880; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffef 881define i32 @inline_C_constraint_F5() { 882 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 -17) 883 ret i32 %v0 884} 885 886;============================================================================== 887; 'C' constraint, 64-bit operand 888;============================================================================== 889 890; GCN-LABEL: {{^}}inline_C_constraint_D0: 891; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffff 892define i32 @inline_C_constraint_D0() { 893 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 4294967295) 894 ret i32 %v0 895} 896 897; GCN-LABEL: {{^}}inline_C_constraint_D1: 898; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 899define i32 @inline_C_constraint_D1() { 900 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 2147483648) 901 ret i32 %v0 902} 903 904; GCN-LABEL: {{^}}inline_C_constraint_D2: 905; GCN: v_mov_b32 {{v[0-9]+}}, -16 906define i32 @inline_C_constraint_D2() { 907 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 -16) 908 ret i32 %v0 909} 910 911; NOGCN: error: invalid operand for inline asm constraint 'C' 912define i32 @inline_C_constraint_D8() { 913 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 -17) 914 ret i32 %v0 915} 916 917; NOGCN: error: invalid operand for inline asm constraint 'C' 918define i32 @inline_C_constraint_D9() { 919 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 4294967296) 920 ret i32 %v0 921} 922 923;============================================================================== 924; 'C' constraint, v2x16 operand 925;============================================================================== 926 927; NOSI: error: invalid operand for inline asm constraint 'C' 928; VI-LABEL: {{^}}inline_C_constraint_V0: 929; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 930define i32 @inline_C_constraint_V0() { 931 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 32767, i16 32767>) 932 ret i32 %v0 933} 934 935; NOSI: error: invalid operand for inline asm constraint 'C' 936; VI-LABEL: {{^}}inline_C_constraint_V1: 937; VI: v_mov_b32 {{v[0-9]+}}, -1 938define i32 @inline_C_constraint_V1() { 939 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 -1, i16 -1>) 940 ret i32 %v0 941} 942 943; NOSI: error: invalid operand for inline asm constraint 'C' 944; VI-LABEL: {{^}}inline_C_constraint_V2: 945; VI: v_mov_b32 {{v[0-9]+}}, 0x8000 946define i32 @inline_C_constraint_V2() { 947 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 -32768, i16 -32768>) 948 ret i32 %v0 949} 950 951;============================================================================== 952; 'DA' constraint, 16-bit operand 953;============================================================================== 954 955; NOSI: error: invalid operand for inline asm constraint 'DA' 956; VI-LABEL: {{^}}inline_DA_constraint_H0: 957; VI: v_mov_b32 {{v[0-9]+}}, 64 958define i32 @inline_DA_constraint_H0() { 959 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 64) 960 ret i32 %v0 961} 962 963; NOSI: error: invalid operand for inline asm constraint 'DA' 964; VI-LABEL: {{^}}inline_DA_constraint_H1: 965; VI: v_mov_b32 {{v[0-9]+}}, -16 966define i32 @inline_DA_constraint_H1() { 967 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 -16) 968 ret i32 %v0 969} 970 971; NOSI: error: invalid operand for inline asm constraint 'DA' 972; VI-LABEL: {{^}}inline_DA_constraint_H2: 973; VI: v_mov_b32 {{v[0-9]+}}, 0x3c00 974define i32 @inline_DA_constraint_H2() { 975 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 1.0 to i16)) 976 ret i32 %v0 977} 978 979; NOSI: error: invalid operand for inline asm constraint 'DA' 980; VI-LABEL: {{^}}inline_DA_constraint_H3: 981; VI: v_mov_b32 {{v[0-9]+}}, 0xbc00 982define i32 @inline_DA_constraint_H3() { 983 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half -1.0 to i16)) 984 ret i32 %v0 985} 986 987; NOSI: error: invalid operand for inline asm constraint 'DA' 988; VI-LABEL: {{^}}inline_DA_constraint_H4: 989; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 990define i32 @inline_DA_constraint_H4() { 991 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(half 0xH3118) 992 ret i32 %v0 993} 994 995; NOSI: error: invalid operand for inline asm constraint 'DA' 996; VI-LABEL: {{^}}inline_DA_constraint_H5: 997; VI: v_mov_b32 {{v[0-9]+}}, 0x3118 998define i32 @inline_DA_constraint_H5() { 999 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 0xH3118 to i16)) 1000 ret i32 %v0 1001} 1002 1003; NOSI: error: invalid operand for inline asm constraint 'DA' 1004; VI-LABEL: {{^}}inline_DA_constraint_H6: 1005; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 1006define i32 @inline_DA_constraint_H6() { 1007 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(half -0.5) 1008 ret i32 %v0 1009} 1010 1011; NOGCN: error: invalid operand for inline asm constraint 'DA' 1012define i32 @inline_DA_constraint_H7() { 1013 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 0xH3119 to i16)) 1014 ret i32 %v0 1015} 1016 1017; NOGCN: error: invalid operand for inline asm constraint 'DA' 1018define i32 @inline_DA_constraint_H8() { 1019 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 -17) 1020 ret i32 %v0 1021} 1022 1023; NOGCN: error: invalid operand for inline asm constraint 'DA' 1024define i32 @inline_DA_constraint_H9() { 1025 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 65) 1026 ret i32 %v0 1027} 1028 1029;============================================================================== 1030; 'DA' constraint, 32-bit operand 1031;============================================================================== 1032 1033; GCN-LABEL: {{^}}inline_DA_constraint_F0: 1034; GCN: v_mov_b32 {{v[0-9]+}}, -16 1035define i32 @inline_DA_constraint_F0() { 1036 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 -16) 1037 ret i32 %v0 1038} 1039 1040; GCN-LABEL: {{^}}inline_DA_constraint_F1: 1041; GCN: v_mov_b32 {{v[0-9]+}}, 1 1042define i32 @inline_DA_constraint_F1() { 1043 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 1) 1044 ret i32 %v0 1045} 1046 1047; GCN-LABEL: {{^}}inline_DA_constraint_F2: 1048; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000 1049define i32 @inline_DA_constraint_F2() { 1050 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 bitcast (float -0.5 to i32)) 1051 ret i32 %v0 1052} 1053 1054; GCN-LABEL: {{^}}inline_DA_constraint_F3: 1055; GCN: v_mov_b32 {{v[0-9]+}}, 0x40000000 1056define i32 @inline_DA_constraint_F3() { 1057 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 bitcast (float 2.0 to i32)) 1058 ret i32 %v0 1059} 1060 1061; GCN-LABEL: {{^}}inline_DA_constraint_F4: 1062; GCN: v_mov_b32 {{v[0-9]+}}, 0xc0800000 1063define i32 @inline_DA_constraint_F4() { 1064 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(float -4.0) 1065 ret i32 %v0 1066} 1067 1068; NOSI: error: invalid operand for inline asm constraint 'DA' 1069; VI-LABEL: {{^}}inline_DA_constraint_F5: 1070; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f983 1071define i32 @inline_DA_constraint_F5() { 1072 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 1042479491) 1073 ret i32 %v0 1074} 1075 1076; GCN-LABEL: {{^}}inline_DA_constraint_F6: 1077; GCN: v_mov_b32 {{v[0-9]+}}, 0x3f000000 1078define i32 @inline_DA_constraint_F6() { 1079 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(float 0.5) 1080 ret i32 %v0 1081} 1082 1083; NOGCN: error: invalid operand for inline asm constraint 'DA' 1084define i32 @inline_DA_constraint_F7() { 1085 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 65) 1086 ret i32 %v0 1087} 1088 1089; NOGCN: error: invalid operand for inline asm constraint 'DA' 1090define i32 @inline_DA_constraint_F8() { 1091 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 -17) 1092 ret i32 %v0 1093} 1094 1095;============================================================================== 1096; 'DA' constraint, 64-bit operand 1097;============================================================================== 1098 1099; GCN-LABEL: {{^}}inline_DA_constraint_D0: 1100; GCN: v_mov_b32 {{v[0-9]+}}, 0x40fffffff0 1101define i32 @inline_DA_constraint_D0() { 1102 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x40fffffff0 to i64)) 1103 ret i32 %v0 1104} 1105 1106; GCN-LABEL: {{^}}inline_DA_constraint_D1: 1107; GCN: v_mov_b32 {{v[0-9]+}}, 0xfffffff000000040 1108define i32 @inline_DA_constraint_D1() { 1109 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0xfffffff000000040 to i64)) 1110 ret i32 %v0 1111} 1112 1113; GCN-LABEL: {{^}}inline_DA_constraint_D2: 1114; GCN: v_mov_b32 {{v[0-9]+}}, -1 1115define i32 @inline_DA_constraint_D2() { 1116 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 -1) 1117 ret i32 %v0 1118} 1119 1120; GCN-LABEL: {{^}}inline_DA_constraint_D3: 1121; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000c0800000 1122define i32 @inline_DA_constraint_D3() { 1123 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0xbf000000c0800000 to i64)) 1124 ret i32 %v0 1125} 1126 1127; NOSI: error: invalid operand for inline asm constraint 'DA' 1128; VI-LABEL: {{^}}inline_DA_constraint_D4: 1129; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f9833e22f983 1130define i32 @inline_DA_constraint_D4() { 1131 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x3e22f9833e22f983 to i64)) 1132 ret i32 %v0 1133} 1134 1135; NOGCN: error: invalid operand for inline asm constraint 'DA' 1136define i32 @inline_DA_constraint_D5() { 1137 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x0000004000000041 to i64)) 1138 ret i32 %v0 1139} 1140 1141; NOGCN: error: invalid operand for inline asm constraint 'DA' 1142define i32 @inline_DA_constraint_D8() { 1143 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x0000004100000040 to i64)) 1144 ret i32 %v0 1145} 1146 1147; NOGCN: error: invalid operand for inline asm constraint 'DA' 1148define i32 @inline_DA_constraint_D9() { 1149 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(double 100.0) 1150 ret i32 %v0 1151} 1152 1153;============================================================================== 1154; 'DA' constraint, v2x16 operand 1155;============================================================================== 1156 1157; NOSI: error: invalid operand for inline asm constraint 'DA' 1158; VI-LABEL: {{^}}inline_DA_constraint_V0: 1159; VI: v_mov_b32 {{v[0-9]+}}, -4 1160define i32 @inline_DA_constraint_V0() { 1161 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i16> <i16 -4, i16 -4>) 1162 ret i32 %v0 1163} 1164 1165; NOSI: error: invalid operand for inline asm constraint 'DA' 1166; VI-LABEL: {{^}}inline_DA_constraint_V1: 1167; VI: v_mov_b32 {{v[0-9]+}}, 0xb800 1168define i32 @inline_DA_constraint_V1() { 1169 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x half> <half -0.5, half -0.5>) 1170 ret i32 %v0 1171} 1172 1173; NOGCN: error: invalid operand for inline asm constraint 'DA' 1174define i32 @inline_DA_constraint_V2() { 1175 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i16> <i16 -4, i16 undef>) 1176 ret i32 %v0 1177} 1178 1179; NOGCN: error: invalid operand for inline asm constraint 'DA' 1180define i32 @inline_DA_constraint_V6() { 1181 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i32> <i32 0, i32 0>) 1182 ret i32 %v0 1183} 1184 1185;============================================================================== 1186; 'DA' constraint, type errors 1187;============================================================================== 1188 1189; NOGCN: error: invalid operand for inline asm constraint 'DA' 1190define i32 @inline_DA_constraint_E1(i32 %x) { 1191 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 %x) 1192 ret i32 %v0 1193} 1194 1195; NOGCN: error: invalid operand for inline asm constraint 'DA' 1196define i32 @inline_DA_constraint_E2() { 1197 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i128 100000000000000000000) 1198 ret i32 %v0 1199} 1200 1201;============================================================================== 1202; 'DB' constraint, 16-bit operand 1203;============================================================================== 1204 1205; NOSI: error: invalid operand for inline asm constraint 'DB' 1206; VI-LABEL: {{^}}inline_DB_constraint_H0: 1207; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 1208define i32 @inline_DB_constraint_H0() { 1209 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i16 32767) 1210 ret i32 %v0 1211} 1212 1213; NOSI: error: invalid operand for inline asm constraint 'DB' 1214; VI-LABEL: {{^}}inline_DB_constraint_H1: 1215; VI: v_mov_b32 {{v[0-9]+}}, -1 1216define i32 @inline_DB_constraint_H1() { 1217 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i16 65535) 1218 ret i32 %v0 1219} 1220 1221; NOSI: error: invalid operand for inline asm constraint 'DB' 1222; VI-LABEL: {{^}}inline_DB_constraint_H2: 1223; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80 1224define i32 @inline_DB_constraint_H2() { 1225 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(half 13.0) 1226 ret i32 %v0 1227} 1228 1229;============================================================================== 1230; 'DB' constraint, 32-bit operand 1231;============================================================================== 1232 1233; GCN-LABEL: {{^}}inline_DB_constraint_F0: 1234; GCN: v_mov_b32 {{v[0-9]+}}, -1 1235define i32 @inline_DB_constraint_F0() { 1236 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 4294967295) 1237 ret i32 %v0 1238} 1239 1240; GCN-LABEL: {{^}}inline_DB_constraint_F1: 1241; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000 1242define i32 @inline_DB_constraint_F1() { 1243 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 2147483648) 1244 ret i32 %v0 1245} 1246 1247; GCN-LABEL: {{^}}inline_DB_constraint_F2: 1248; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000 1249define i32 @inline_DB_constraint_F2() { 1250 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(float 32.0) 1251 ret i32 %v0 1252} 1253 1254;============================================================================== 1255; 'DB' constraint, 64-bit operand 1256;============================================================================== 1257 1258; GCN-LABEL: {{^}}inline_DB_constraint_D0: 1259; GCN: v_mov_b32 {{v[0-9]+}}, -1 1260define i32 @inline_DB_constraint_D0() { 1261 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DB"(i64 -1) 1262 ret i32 %v0 1263} 1264 1265; GCN-LABEL: {{^}}inline_DB_constraint_D1: 1266; GCN: v_mov_b32 {{v[0-9]+}}, 0x1234567890abcdef 1267define i32 @inline_DB_constraint_D1() { 1268 %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DB"(i64 bitcast (double 0x1234567890abcdef to i64)) 1269 ret i32 %v0 1270} 1271 1272;============================================================================== 1273; 'DB' constraint, v2x16 operand 1274;============================================================================== 1275 1276; NOSI: error: invalid operand for inline asm constraint 'DB' 1277; VI-LABEL: {{^}}inline_DB_constraint_V0: 1278; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff 1279define i32 @inline_DB_constraint_V0() { 1280 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x i16> <i16 32767, i16 32767>) 1281 ret i32 %v0 1282} 1283 1284; NOSI: error: invalid operand for inline asm constraint 'DB' 1285; VI-LABEL: {{^}}inline_DB_constraint_V1: 1286; VI: v_mov_b32 {{v[0-9]+}}, -1 1287define i32 @inline_DB_constraint_V1() { 1288 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x i16> <i16 65535, i16 65535>) 1289 ret i32 %v0 1290} 1291 1292; NOSI: error: invalid operand for inline asm constraint 'DB' 1293; VI-LABEL: {{^}}inline_DB_constraint_V2: 1294; VI: v_mov_b32 {{v[0-9]+}}, 0xd640 1295define i32 @inline_DB_constraint_V2() { 1296 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x half> <half -100.0, half -100.0>) 1297 ret i32 %v0 1298} 1299 1300;============================================================================== 1301; 'DB' constraint, type errors 1302;============================================================================== 1303 1304; NOGCN: error: invalid operand for inline asm constraint 'DB' 1305define i32 @inline_DB_constraint_E1(i32 %x) { 1306 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 %x) 1307 ret i32 %v0 1308} 1309 1310; NOGCN: error: invalid operand for inline asm constraint 'DB' 1311define i32 @inline_DB_constraint_E2() { 1312 %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i128 100000000000000000000) 1313 ret i32 %v0 1314} 1315