1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 --amdhsa-code-object-version=2 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX700 %s 2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=2 -mattr=-xnack -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX803 %s 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=2 -mattr=-xnack -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX900 %s 4 5@var = addrspace(1) global float 0.0 6 7; CHECK: --- 8; CHECK: Version: [ 1, 0 ] 9; CHECK: Kernels: 10 11; CHECK-LABEL: - Name: test 12; CHECK: SymbolName: 'test@kd' 13; CHECK: CodeProps: 14; CHECK: KernargSegmentSize: 24 15; CHECK: GroupSegmentFixedSize: 0 16; CHECK: PrivateSegmentFixedSize: 0 17; CHECK: KernargSegmentAlign: 8 18; CHECK: WavefrontSize: 64 19; CHECK: NumSGPRs: 6 20; CHECK: NumVGPRs: {{3|6}} 21; CHECK: MaxFlatWorkGroupSize: 1024 22define amdgpu_kernel void @test( 23 half addrspace(1)* %r, 24 half addrspace(1)* %a, 25 half addrspace(1)* %b) { 26entry: 27 %a.val = load half, half addrspace(1)* %a 28 %b.val = load half, half addrspace(1)* %b 29 %r.val = fadd half %a.val, %b.val 30 store half %r.val, half addrspace(1)* %r 31 ret void 32} 33 34; CHECK-LABEL: - Name: test_max_flat_workgroup_size 35; CHECK: SymbolName: 'test_max_flat_workgroup_size@kd' 36; CHECK: CodeProps: 37; CHECK: KernargSegmentSize: 24 38; CHECK: GroupSegmentFixedSize: 0 39; CHECK: PrivateSegmentFixedSize: 0 40; CHECK: KernargSegmentAlign: 8 41; CHECK: WavefrontSize: 64 42; CHECK: NumSGPRs: 6 43; CHECK: NumVGPRs: {{3|6}} 44; CHECK: MaxFlatWorkGroupSize: 256 45define amdgpu_kernel void @test_max_flat_workgroup_size( 46 half addrspace(1)* %r, 47 half addrspace(1)* %a, 48 half addrspace(1)* %b) #2 { 49entry: 50 %a.val = load half, half addrspace(1)* %a 51 %b.val = load half, half addrspace(1)* %b 52 %r.val = fadd half %a.val, %b.val 53 store half %r.val, half addrspace(1)* %r 54 ret void 55} 56 57; CHECK-LABEL: - Name: num_spilled_sgprs 58; CHECK: SymbolName: 'num_spilled_sgprs@kd' 59; CHECK: CodeProps: 60; GFX700: NumSpilledSGPRs: 38 61; GFX803: NumSpilledSGPRs: 22 62; GFX900: NumSpilledSGPRs: {{22|48}} 63define amdgpu_kernel void @num_spilled_sgprs( 64 i32 addrspace(1)* %out0, i32 addrspace(1)* %out1, [8 x i32], 65 i32 addrspace(1)* %out2, i32 addrspace(1)* %out3, [8 x i32], 66 i32 addrspace(1)* %out4, i32 addrspace(1)* %out5, [8 x i32], 67 i32 addrspace(1)* %out6, i32 addrspace(1)* %out7, [8 x i32], 68 i32 addrspace(1)* %out8, i32 addrspace(1)* %out9, [8 x i32], 69 i32 addrspace(1)* %outa, i32 addrspace(1)* %outb, [8 x i32], 70 i32 addrspace(1)* %outc, i32 addrspace(1)* %outd, [8 x i32], 71 i32 addrspace(1)* %oute, i32 addrspace(1)* %outf, [8 x i32], 72 i32 %in0, i32 %in1, i32 %in2, i32 %in3, [8 x i32], 73 i32 %in4, i32 %in5, i32 %in6, i32 %in7, [8 x i32], 74 i32 %in8, i32 %in9, i32 %ina, i32 %inb, [8 x i32], 75 i32 %inc, i32 %ind, i32 %ine, i32 %inf) #0 { 76entry: 77 store i32 %in0, i32 addrspace(1)* %out0 78 store i32 %in1, i32 addrspace(1)* %out1 79 store i32 %in2, i32 addrspace(1)* %out2 80 store i32 %in3, i32 addrspace(1)* %out3 81 store i32 %in4, i32 addrspace(1)* %out4 82 store i32 %in5, i32 addrspace(1)* %out5 83 store i32 %in6, i32 addrspace(1)* %out6 84 store i32 %in7, i32 addrspace(1)* %out7 85 store i32 %in8, i32 addrspace(1)* %out8 86 store i32 %in9, i32 addrspace(1)* %out9 87 store i32 %ina, i32 addrspace(1)* %outa 88 store i32 %inb, i32 addrspace(1)* %outb 89 store i32 %inc, i32 addrspace(1)* %outc 90 store i32 %ind, i32 addrspace(1)* %outd 91 store i32 %ine, i32 addrspace(1)* %oute 92 store i32 %inf, i32 addrspace(1)* %outf 93 ret void 94} 95 96; CHECK-LABEL: - Name: num_spilled_vgprs 97; CHECK: SymbolName: 'num_spilled_vgprs@kd' 98; CHECK: CodeProps: 99; CHECK: NumSpilledVGPRs: {{13|14}} 100define amdgpu_kernel void @num_spilled_vgprs() #1 { 101 %val0 = load volatile float, float addrspace(1)* @var 102 %val1 = load volatile float, float addrspace(1)* @var 103 %val2 = load volatile float, float addrspace(1)* @var 104 %val3 = load volatile float, float addrspace(1)* @var 105 %val4 = load volatile float, float addrspace(1)* @var 106 %val5 = load volatile float, float addrspace(1)* @var 107 %val6 = load volatile float, float addrspace(1)* @var 108 %val7 = load volatile float, float addrspace(1)* @var 109 %val8 = load volatile float, float addrspace(1)* @var 110 %val9 = load volatile float, float addrspace(1)* @var 111 %val10 = load volatile float, float addrspace(1)* @var 112 %val11 = load volatile float, float addrspace(1)* @var 113 %val12 = load volatile float, float addrspace(1)* @var 114 %val13 = load volatile float, float addrspace(1)* @var 115 %val14 = load volatile float, float addrspace(1)* @var 116 %val15 = load volatile float, float addrspace(1)* @var 117 %val16 = load volatile float, float addrspace(1)* @var 118 %val17 = load volatile float, float addrspace(1)* @var 119 %val18 = load volatile float, float addrspace(1)* @var 120 %val19 = load volatile float, float addrspace(1)* @var 121 %val20 = load volatile float, float addrspace(1)* @var 122 %val21 = load volatile float, float addrspace(1)* @var 123 %val22 = load volatile float, float addrspace(1)* @var 124 %val23 = load volatile float, float addrspace(1)* @var 125 %val24 = load volatile float, float addrspace(1)* @var 126 %val25 = load volatile float, float addrspace(1)* @var 127 %val26 = load volatile float, float addrspace(1)* @var 128 %val27 = load volatile float, float addrspace(1)* @var 129 %val28 = load volatile float, float addrspace(1)* @var 130 %val29 = load volatile float, float addrspace(1)* @var 131 %val30 = load volatile float, float addrspace(1)* @var 132 133 store volatile float %val0, float addrspace(1)* @var 134 store volatile float %val1, float addrspace(1)* @var 135 store volatile float %val2, float addrspace(1)* @var 136 store volatile float %val3, float addrspace(1)* @var 137 store volatile float %val4, float addrspace(1)* @var 138 store volatile float %val5, float addrspace(1)* @var 139 store volatile float %val6, float addrspace(1)* @var 140 store volatile float %val7, float addrspace(1)* @var 141 store volatile float %val8, float addrspace(1)* @var 142 store volatile float %val9, float addrspace(1)* @var 143 store volatile float %val10, float addrspace(1)* @var 144 store volatile float %val11, float addrspace(1)* @var 145 store volatile float %val12, float addrspace(1)* @var 146 store volatile float %val13, float addrspace(1)* @var 147 store volatile float %val14, float addrspace(1)* @var 148 store volatile float %val15, float addrspace(1)* @var 149 store volatile float %val16, float addrspace(1)* @var 150 store volatile float %val17, float addrspace(1)* @var 151 store volatile float %val18, float addrspace(1)* @var 152 store volatile float %val19, float addrspace(1)* @var 153 store volatile float %val20, float addrspace(1)* @var 154 store volatile float %val21, float addrspace(1)* @var 155 store volatile float %val22, float addrspace(1)* @var 156 store volatile float %val23, float addrspace(1)* @var 157 store volatile float %val24, float addrspace(1)* @var 158 store volatile float %val25, float addrspace(1)* @var 159 store volatile float %val26, float addrspace(1)* @var 160 store volatile float %val27, float addrspace(1)* @var 161 store volatile float %val28, float addrspace(1)* @var 162 store volatile float %val29, float addrspace(1)* @var 163 store volatile float %val30, float addrspace(1)* @var 164 165 ret void 166} 167 168attributes #0 = { "amdgpu-num-sgpr"="14" } 169attributes #1 = { "amdgpu-num-vgpr"="20" } 170attributes #2 = { "amdgpu-flat-work-group-size"="1,256" } 171