1; RUN:  llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s
2; RUN:  llc -march=amdgcn -mcpu=gfx900 -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900 %s
3
4; FUNC-LABEL: {{^}}v_abs_i32:
5; GCN: S_ABS_I32
6define amdgpu_kernel void @s_abs_i32(i32 addrspace(1)* %out, i32 %val) nounwind {
7  %neg = sub i32 0, %val
8  %cond = icmp sgt i32 %val, %neg
9  %res = select i1 %cond, i32 %val, i32 %neg
10  %res2 = add i32 %res, 2
11  store i32 %res2, i32 addrspace(1)* %out, align 4
12  ret void
13}
14
15; FUNC-LABEL: {{^}}v_abs_i32:
16; SI:  V_SUB_CO_U32_e64
17; GFX900: V_SUB_U32_e64
18; GCN: V_MAX_I32_e64
19define amdgpu_kernel void @v_abs_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
20  %tid = call i32 @llvm.amdgcn.workitem.id.x()
21  %gep.in = getelementptr inbounds i32, i32 addrspace(1)* %src, i32 %tid
22  %val = load i32, i32 addrspace(1)* %gep.in, align 4
23  %neg = sub i32 0, %val
24  %cond = icmp sgt i32 %val, %neg
25  %res = select i1 %cond, i32 %val, i32 %neg
26  %res2 = add i32 %res, 2
27  store i32 %res2, i32 addrspace(1)* %out, align 4
28  ret void
29}
30
31; FUNC-LABEL: {{^}}s_abs_v2i32:
32; GCN: S_ABS_I32
33; GCN: S_ABS_I32
34define amdgpu_kernel void @s_abs_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %val) nounwind {
35  %z0 = insertelement <2 x i32> undef, i32 0, i32 0
36  %z1 = insertelement <2 x i32> %z0, i32 0, i32 1
37  %t0 = insertelement <2 x i32> undef, i32 2, i32 0
38  %t1 = insertelement <2 x i32> %t0, i32 2, i32 1
39  %neg = sub <2 x i32> %z1, %val
40  %cond = icmp sgt <2 x i32> %val, %neg
41  %res = select <2 x i1> %cond, <2 x i32> %val, <2 x i32> %neg
42  %res2 = add <2 x i32> %res, %t1
43  store <2 x i32> %res2, <2 x i32> addrspace(1)* %out, align 4
44  ret void
45}
46
47; FUNC-LABEL: {{^}}v_abs_v2i32:
48; SI:  V_SUB_CO_U32_e64
49; GFX900: V_SUB_U32_e64
50; GCN: V_MAX_I32_e64
51; GCN: V_MAX_I32_e64
52define amdgpu_kernel void @v_abs_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %src) nounwind {
53  %z0 = insertelement <2 x i32> undef, i32 0, i32 0
54  %z1 = insertelement <2 x i32> %z0, i32 0, i32 1
55  %t0 = insertelement <2 x i32> undef, i32 2, i32 0
56  %t1 = insertelement <2 x i32> %t0, i32 2, i32 1
57  %tid = call i32 @llvm.amdgcn.workitem.id.x()
58  %gep.in = getelementptr inbounds <2 x i32>, <2 x i32> addrspace(1)* %src, i32 %tid
59  %val = load <2 x i32>, <2 x i32> addrspace(1)* %gep.in, align 4
60  %neg = sub <2 x i32> %z1, %val
61  %cond = icmp sgt <2 x i32> %val, %neg
62  %res = select <2 x i1> %cond, <2 x i32> %val, <2 x i32> %neg
63  %res2 = add <2 x i32> %res, %t1
64  store <2 x i32> %res2, <2 x i32> addrspace(1)* %out, align 4
65  ret void
66}
67
68declare i32 @llvm.amdgcn.workitem.id.x() #0
69
70attributes #0 = { nounwind readnone }
71attributes #1 = { nounwind }
72