1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra %s -o - | FileCheck -check-prefix=GCN %s 3 4# Make sure dbg_value doesn't change codeegn when collapsing end_cf 5--- 6name: simple_nested_if_dbg_value 7tracksRegLiveness: true 8liveins: 9 - { reg: '$vgpr0', virtual-reg: '%0' } 10 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 11machineFunctionInfo: 12 isEntryFunction: true 13body: | 14 ; GCN-LABEL: name: simple_nested_if_dbg_value 15 ; GCN: bb.0: 16 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 17 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 18 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 19 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 20 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 21 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 22 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 23 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 24 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 25 ; GCN: S_BRANCH %bb.1 26 ; GCN: bb.1: 27 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 28 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 29 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 30 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 31 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 32 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 33 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 34 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 35 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 36 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 37 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 38 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 39 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 40 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 41 ; GCN: S_BRANCH %bb.2 42 ; GCN: bb.2: 43 ; GCN: successors: %bb.3(0x80000000) 44 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 45 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 46 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 47 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 48 ; GCN: bb.3: 49 ; GCN: successors: %bb.4(0x80000000) 50 ; GCN: DBG_VALUE 51 ; GCN: bb.4: 52 ; GCN: successors: %bb.5(0x80000000) 53 ; GCN: DBG_VALUE 54 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 55 ; GCN: bb.5: 56 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 57 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 58 ; GCN: $m0 = S_MOV_B32 -1 59 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 60 ; GCN: S_ENDPGM 0 61 bb.0: 62 successors: %bb.1, %bb.4 63 liveins: $vgpr0, $sgpr0_sgpr1 64 65 %1:sgpr_64 = COPY $sgpr0_sgpr1 66 %0:vgpr_32 = COPY $vgpr0 67 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 68 %3:sreg_64 = COPY $exec, implicit-def $exec 69 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 70 $exec = S_MOV_B64_term %4 71 SI_MASK_BRANCH %bb.4, implicit $exec 72 S_BRANCH %bb.1 73 74 bb.1: 75 successors: %bb.2, %bb.3 76 77 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 78 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 79 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 80 %7:vgpr_32 = COPY %5.sub1 81 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 82 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 83 %5.sub3:sgpr_128 = S_MOV_B32 61440 84 %5.sub2:sgpr_128 = S_MOV_B32 0 85 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 86 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 87 %12:sreg_64 = COPY $exec, implicit-def $exec 88 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 89 $exec = S_MOV_B64_term %13 90 SI_MASK_BRANCH %bb.3, implicit $exec 91 S_BRANCH %bb.2 92 93 bb.2: 94 %5.sub0:sgpr_128 = COPY %5.sub2 95 %5.sub1:sgpr_128 = COPY %5.sub2 96 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 97 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 98 99 bb.3: 100 DBG_VALUE 101 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 102 103 bb.4: 104 DBG_VALUE 105 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 106 107 bb.5: 108 %15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 109 %16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 110 $m0 = S_MOV_B32 -1 111 DS_WRITE_B32 %16, %15, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 112 S_ENDPGM 0 113 114... 115 116# Empty block separates the collapsable s_or_b64 117--- 118name: simple_nested_if_empty_block_between 119tracksRegLiveness: true 120liveins: 121 - { reg: '$vgpr0', virtual-reg: '%0' } 122 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 123machineFunctionInfo: 124 isEntryFunction: true 125body: | 126 ; GCN-LABEL: name: simple_nested_if_empty_block_between 127 ; GCN: bb.0: 128 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 129 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 130 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 131 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 132 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 133 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 134 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 135 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 136 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 137 ; GCN: S_BRANCH %bb.1 138 ; GCN: bb.1: 139 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 140 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 141 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 142 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 143 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 144 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 145 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 146 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 147 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 148 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 149 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 150 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 151 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 152 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 153 ; GCN: S_BRANCH %bb.2 154 ; GCN: bb.2: 155 ; GCN: successors: %bb.3(0x80000000) 156 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 157 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 158 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 159 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 160 ; GCN: bb.3: 161 ; GCN: successors: %bb.4(0x80000000) 162 ; GCN: bb.4: 163 ; GCN: successors: %bb.5(0x80000000) 164 ; GCN: bb.5: 165 ; GCN: successors: %bb.6(0x80000000) 166 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 167 ; GCN: bb.6: 168 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 169 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 170 ; GCN: $m0 = S_MOV_B32 -1 171 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 172 ; GCN: S_ENDPGM 0 173 bb.0: 174 successors: %bb.1, %bb.4 175 liveins: $vgpr0, $sgpr0_sgpr1 176 177 %1:sgpr_64 = COPY $sgpr0_sgpr1 178 %0:vgpr_32 = COPY $vgpr0 179 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 180 %3:sreg_64 = COPY $exec, implicit-def $exec 181 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 182 $exec = S_MOV_B64_term %4 183 SI_MASK_BRANCH %bb.4, implicit $exec 184 S_BRANCH %bb.1 185 186 bb.1: 187 successors: %bb.2, %bb.3 188 189 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 190 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 191 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 192 %7:vgpr_32 = COPY %5.sub1 193 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 194 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 195 %5.sub3:sgpr_128 = S_MOV_B32 61440 196 %5.sub2:sgpr_128 = S_MOV_B32 0 197 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 198 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 199 %12:sreg_64 = COPY $exec, implicit-def $exec 200 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 201 $exec = S_MOV_B64_term %13 202 SI_MASK_BRANCH %bb.3, implicit $exec 203 S_BRANCH %bb.2 204 205 bb.2: 206 %5.sub0:sgpr_128 = COPY %5.sub2 207 %5.sub1:sgpr_128 = COPY %5.sub2 208 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 209 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 210 211 bb.3: 212 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 213 214 bb.4: 215 216 bb.5: 217 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 218 219 bb.6: 220 %15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 221 %16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 222 $m0 = S_MOV_B32 -1 223 DS_WRITE_B32 %16, %15, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 224 S_ENDPGM 0 225 226... 227 228# Effectively empty block separates the collapsable s_or_b64 229--- 230name: simple_nested_if_empty_block_dbg_between 231tracksRegLiveness: true 232liveins: 233 - { reg: '$vgpr0', virtual-reg: '%0' } 234 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 235machineFunctionInfo: 236 isEntryFunction: true 237body: | 238 ; GCN-LABEL: name: simple_nested_if_empty_block_dbg_between 239 ; GCN: bb.0: 240 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 241 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 242 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 243 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 244 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 245 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 246 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 247 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 248 ; GCN: SI_MASK_BRANCH %bb.5, implicit $exec 249 ; GCN: S_BRANCH %bb.1 250 ; GCN: bb.1: 251 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 252 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 253 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 254 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 255 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 256 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 257 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 258 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 259 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 260 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 261 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 262 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 263 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 264 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 265 ; GCN: S_BRANCH %bb.2 266 ; GCN: bb.2: 267 ; GCN: successors: %bb.3(0x80000000) 268 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 269 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 270 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 271 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 272 ; GCN: bb.3: 273 ; GCN: successors: %bb.4(0x80000000) 274 ; GCN: bb.4: 275 ; GCN: successors: %bb.5(0x80000000) 276 ; GCN: DBG_VALUE 277 ; GCN: bb.5: 278 ; GCN: successors: %bb.6(0x80000000) 279 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 280 ; GCN: bb.6: 281 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 282 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 283 ; GCN: $m0 = S_MOV_B32 -1 284 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 285 ; GCN: S_ENDPGM 0 286 bb.0: 287 successors: %bb.1, %bb.4 288 liveins: $vgpr0, $sgpr0_sgpr1 289 290 %1:sgpr_64 = COPY $sgpr0_sgpr1 291 %0:vgpr_32 = COPY $vgpr0 292 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 293 %3:sreg_64 = COPY $exec, implicit-def $exec 294 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 295 $exec = S_MOV_B64_term %4 296 SI_MASK_BRANCH %bb.5, implicit $exec 297 S_BRANCH %bb.1 298 299 bb.1: 300 successors: %bb.2, %bb.3 301 302 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 303 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 304 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 305 %7:vgpr_32 = COPY %5.sub1 306 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 307 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 308 %5.sub3:sgpr_128 = S_MOV_B32 61440 309 %5.sub2:sgpr_128 = S_MOV_B32 0 310 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 311 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 312 %12:sreg_64 = COPY $exec, implicit-def $exec 313 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 314 $exec = S_MOV_B64_term %13 315 SI_MASK_BRANCH %bb.3, implicit $exec 316 S_BRANCH %bb.2 317 318 bb.2: 319 %5.sub0:sgpr_128 = COPY %5.sub2 320 %5.sub1:sgpr_128 = COPY %5.sub2 321 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 322 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 323 324 bb.3: 325 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 326 327 bb.4: 328 DBG_VALUE 329 330 bb.5: 331 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 332 333 bb.6: 334 %15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 335 %16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 336 $m0 = S_MOV_B32 -1 337 DS_WRITE_B32 %16, %15, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 338 S_ENDPGM 0 339 340... 341 342--- 343name: skip_salu_and_meta_insts_find_first 344tracksRegLiveness: true 345liveins: 346 - { reg: '$vgpr0', virtual-reg: '%0' } 347 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 348machineFunctionInfo: 349 isEntryFunction: true 350body: | 351 ; GCN-LABEL: name: skip_salu_and_meta_insts_find_first 352 ; GCN: bb.0: 353 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 354 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 355 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 356 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 357 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 358 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 359 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 360 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 361 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 362 ; GCN: S_BRANCH %bb.1 363 ; GCN: bb.1: 364 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 365 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 366 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 367 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 368 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 369 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 370 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 371 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 372 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 373 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 374 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 375 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 376 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 377 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 378 ; GCN: S_BRANCH %bb.2 379 ; GCN: bb.2: 380 ; GCN: successors: %bb.3(0x80000000) 381 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 382 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 383 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 384 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 385 ; GCN: bb.3: 386 ; GCN: successors: %bb.4(0x80000000) 387 ; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF 388 ; GCN: dead %16:sgpr_32 = S_BREV_B32 [[DEF]] 389 ; GCN: KILL [[DEF]] 390 ; GCN: bb.4: 391 ; GCN: successors: %bb.5(0x80000000) 392 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 393 ; GCN: bb.5: 394 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 395 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 396 ; GCN: $m0 = S_MOV_B32 -1 397 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 398 ; GCN: S_ENDPGM 0 399 bb.0: 400 successors: %bb.1, %bb.4 401 liveins: $vgpr0, $sgpr0_sgpr1 402 403 %1:sgpr_64 = COPY $sgpr0_sgpr1 404 %0:vgpr_32 = COPY $vgpr0 405 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 406 %3:sreg_64 = COPY $exec, implicit-def $exec 407 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 408 $exec = S_MOV_B64_term %4 409 SI_MASK_BRANCH %bb.4, implicit $exec 410 S_BRANCH %bb.1 411 412 bb.1: 413 successors: %bb.2, %bb.3 414 415 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 416 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 417 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 418 %7:vgpr_32 = COPY %5.sub1 419 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 420 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 421 %5.sub3:sgpr_128 = S_MOV_B32 61440 422 %5.sub2:sgpr_128 = S_MOV_B32 0 423 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 424 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 425 %12:sreg_64 = COPY $exec, implicit-def $exec 426 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 427 $exec = S_MOV_B64_term %13 428 SI_MASK_BRANCH %bb.3, implicit $exec 429 S_BRANCH %bb.2 430 431 bb.2: 432 %5.sub0:sgpr_128 = COPY %5.sub2 433 %5.sub1:sgpr_128 = COPY %5.sub2 434 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 435 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 436 437 bb.3: 438 %15:sgpr_32 = IMPLICIT_DEF 439 %16:sgpr_32 = S_BREV_B32 %15 440 KILL %15 441 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 442 443 bb.4: 444 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 445 446 bb.5: 447 %17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 448 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 449 $m0 = S_MOV_B32 -1 450 DS_WRITE_B32 %18, %17, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 451 S_ENDPGM 0 452 453... 454 455# Make sure SALU instructions, meta instructions, and SGPR->SGPR 456# copies are skipped. 457--- 458name: skip_salu_and_meta_insts_after 459tracksRegLiveness: true 460liveins: 461 - { reg: '$vgpr0', virtual-reg: '%0' } 462 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 463machineFunctionInfo: 464 isEntryFunction: true 465body: | 466 ; GCN-LABEL: name: skip_salu_and_meta_insts_after 467 ; GCN: bb.0: 468 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 469 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 470 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 471 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 472 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 473 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 474 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 475 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 476 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 477 ; GCN: S_BRANCH %bb.1 478 ; GCN: bb.1: 479 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 480 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 481 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 482 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 483 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 484 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 485 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 486 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 487 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 488 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 489 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 490 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 491 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 492 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 493 ; GCN: S_BRANCH %bb.2 494 ; GCN: bb.2: 495 ; GCN: successors: %bb.3(0x80000000) 496 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 497 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 498 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 499 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 500 ; GCN: bb.3: 501 ; GCN: successors: %bb.4(0x80000000) 502 ; GCN: bb.4: 503 ; GCN: successors: %bb.5(0x80000000) 504 ; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF 505 ; GCN: [[S_BREV_B32_:%[0-9]+]]:sgpr_32 = S_BREV_B32 [[DEF]] 506 ; GCN: KILL [[DEF]] 507 ; GCN: dead %17:sgpr_32 = COPY [[S_BREV_B32_]] 508 ; GCN: bb.5: 509 ; GCN: successors: %bb.6(0x80000000) 510 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 511 ; GCN: bb.6: 512 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 513 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 514 ; GCN: $m0 = S_MOV_B32 -1 515 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 516 ; GCN: S_ENDPGM 0 517 bb.0: 518 successors: %bb.1, %bb.4 519 liveins: $vgpr0, $sgpr0_sgpr1 520 521 %1:sgpr_64 = COPY $sgpr0_sgpr1 522 %0:vgpr_32 = COPY $vgpr0 523 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 524 %3:sreg_64 = COPY $exec, implicit-def $exec 525 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 526 $exec = S_MOV_B64_term %4 527 SI_MASK_BRANCH %bb.4, implicit $exec 528 S_BRANCH %bb.1 529 530 bb.1: 531 successors: %bb.2, %bb.3 532 533 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 534 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 535 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 536 %7:vgpr_32 = COPY %5.sub1 537 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 538 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 539 %5.sub3:sgpr_128 = S_MOV_B32 61440 540 %5.sub2:sgpr_128 = S_MOV_B32 0 541 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 542 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 543 %12:sreg_64 = COPY $exec, implicit-def $exec 544 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 545 $exec = S_MOV_B64_term %13 546 SI_MASK_BRANCH %bb.4, implicit $exec 547 S_BRANCH %bb.2 548 549 bb.2: 550 %5.sub0:sgpr_128 = COPY %5.sub2 551 %5.sub1:sgpr_128 = COPY %5.sub2 552 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 553 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 554 555 bb.3: 556 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 557 558 bb.4: 559 %15:sgpr_32 = IMPLICIT_DEF 560 %16:sgpr_32 = S_BREV_B32 %15 561 KILL %15 562 %19:sgpr_32 = COPY %16 563 564 bb.5: 565 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 566 567 bb.6: 568 %17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 569 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 570 $m0 = S_MOV_B32 -1 571 DS_WRITE_B32 %18, %17, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 572 S_ENDPGM 0 573 574... 575 576# SALU instruction depends on exec through a normal operand. 577--- 578name: salu_exec_dependency 579tracksRegLiveness: true 580liveins: 581 - { reg: '$vgpr0', virtual-reg: '%0' } 582 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 583machineFunctionInfo: 584 isEntryFunction: true 585body: | 586 ; GCN-LABEL: name: salu_exec_dependency 587 ; GCN: bb.0: 588 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 589 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 590 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 591 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 592 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 593 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 594 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 595 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 596 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 597 ; GCN: S_BRANCH %bb.1 598 ; GCN: bb.1: 599 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 600 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 601 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 602 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 603 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 604 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 605 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 606 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 607 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 608 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 609 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 610 ; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 611 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 612 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 613 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 614 ; GCN: S_BRANCH %bb.2 615 ; GCN: bb.2: 616 ; GCN: successors: %bb.3(0x80000000) 617 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 618 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 619 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 620 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 621 ; GCN: bb.3: 622 ; GCN: successors: %bb.4(0x80000000) 623 ; GCN: $exec = S_OR_B64_term $exec, [[COPY4]], implicit-def $scc 624 ; GCN: bb.4: 625 ; GCN: successors: %bb.5(0x80000000) 626 ; GCN: dead %15:sreg_64 = S_BREV_B64 $exec 627 ; GCN: bb.5: 628 ; GCN: successors: %bb.6(0x80000000) 629 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 630 ; GCN: bb.6: 631 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 632 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 633 ; GCN: $m0 = S_MOV_B32 -1 634 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 635 ; GCN: S_ENDPGM 0 636 bb.0: 637 successors: %bb.1, %bb.4 638 liveins: $vgpr0, $sgpr0_sgpr1 639 640 %1:sgpr_64 = COPY $sgpr0_sgpr1 641 %0:vgpr_32 = COPY $vgpr0 642 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 643 %3:sreg_64 = COPY $exec, implicit-def $exec 644 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 645 $exec = S_MOV_B64_term %4 646 SI_MASK_BRANCH %bb.4, implicit $exec 647 S_BRANCH %bb.1 648 649 bb.1: 650 successors: %bb.2, %bb.3 651 652 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 653 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 654 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 655 %7:vgpr_32 = COPY %5.sub1 656 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 657 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 658 %5.sub3:sgpr_128 = S_MOV_B32 61440 659 %5.sub2:sgpr_128 = S_MOV_B32 0 660 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 661 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 662 %12:sreg_64 = COPY $exec, implicit-def $exec 663 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 664 $exec = S_MOV_B64_term %13 665 SI_MASK_BRANCH %bb.3, implicit $exec 666 S_BRANCH %bb.2 667 668 bb.2: 669 %5.sub0:sgpr_128 = COPY %5.sub2 670 %5.sub1:sgpr_128 = COPY %5.sub2 671 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 672 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 673 674 bb.3: 675 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 676 677 bb.4: 678 %15:sreg_64 = S_BREV_B64 $exec 679 680 bb.5: 681 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 682 683 bb.6: 684 %17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 685 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 686 $m0 = S_MOV_B32 -1 687 DS_WRITE_B32 %18, %17, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 688 S_ENDPGM 0 689 690... 691 692# Copy to / from VGPR should be assumed to read exec 693--- 694name: copy_no_explicit_exec_dependency 695tracksRegLiveness: true 696liveins: 697 - { reg: '$vgpr0', virtual-reg: '%0' } 698 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 699machineFunctionInfo: 700 isEntryFunction: true 701body: | 702 ; GCN-LABEL: name: copy_no_explicit_exec_dependency 703 ; GCN: bb.0: 704 ; GCN: successors: %bb.1(0x40000000), %bb.5(0x40000000) 705 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 706 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 707 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 708 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 709 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 710 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 711 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 712 ; GCN: SI_MASK_BRANCH %bb.5, implicit $exec 713 ; GCN: S_BRANCH %bb.1 714 ; GCN: bb.1: 715 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 716 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 717 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 718 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 719 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 720 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 721 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 722 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 723 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 724 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 725 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 726 ; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 727 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 728 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 729 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 730 ; GCN: S_BRANCH %bb.2 731 ; GCN: bb.2: 732 ; GCN: successors: %bb.3(0x80000000) 733 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 734 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 735 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 736 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 737 ; GCN: bb.3: 738 ; GCN: successors: %bb.4(0x80000000) 739 ; GCN: $exec = S_OR_B64_term $exec, [[COPY4]], implicit-def $scc 740 ; GCN: bb.4: 741 ; GCN: successors: %bb.5(0x80000000) 742 ; GCN: dead %15:vgpr_32 = COPY %5.sub2 743 ; GCN: bb.5: 744 ; GCN: successors: %bb.6(0x80000000) 745 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 746 ; GCN: bb.6: 747 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 748 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 749 ; GCN: $m0 = S_MOV_B32 -1 750 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 751 ; GCN: S_ENDPGM 0 752 bb.0: 753 successors: %bb.1, %bb.5 754 liveins: $vgpr0, $sgpr0_sgpr1 755 756 %1:sgpr_64 = COPY $sgpr0_sgpr1 757 %0:vgpr_32 = COPY $vgpr0 758 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 759 %3:sreg_64 = COPY $exec, implicit-def $exec 760 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 761 $exec = S_MOV_B64_term %4 762 SI_MASK_BRANCH %bb.5, implicit $exec 763 S_BRANCH %bb.1 764 765 bb.1: 766 successors: %bb.2, %bb.3 767 768 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 769 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 770 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 771 %7:vgpr_32 = COPY %5.sub1 772 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 773 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 774 %5.sub3:sgpr_128 = S_MOV_B32 61440 775 %5.sub2:sgpr_128 = S_MOV_B32 0 776 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 777 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 778 %12:sreg_64 = COPY $exec, implicit-def $exec 779 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 780 $exec = S_MOV_B64_term %13 781 SI_MASK_BRANCH %bb.3, implicit $exec 782 S_BRANCH %bb.2 783 784 bb.2: 785 %5.sub0:sgpr_128 = COPY %5.sub2 786 %5.sub1:sgpr_128 = COPY %5.sub2 787 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 788 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 789 790 bb.3: 791 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 792 793 bb.4: 794 %15:vgpr_32 = COPY %5.sub2 795 796 bb.5: 797 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 798 799 bb.6: 800 %17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 801 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 802 $m0 = S_MOV_B32 -1 803 DS_WRITE_B32 %18, %17, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 804 S_ENDPGM 0 805 806... 807 808# There's no real reason this can't be handled, but isn't now. 809--- 810name: simple_nested_if_not_layout_successor 811tracksRegLiveness: true 812liveins: 813 - { reg: '$vgpr0', virtual-reg: '%0' } 814 - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' } 815machineFunctionInfo: 816 isEntryFunction: true 817body: | 818 ; GCN-LABEL: name: simple_nested_if_not_layout_successor 819 ; GCN: bb.0: 820 ; GCN: successors: %bb.1(0x40000000), %bb.4(0x40000000) 821 ; GCN: liveins: $vgpr0, $sgpr0_sgpr1 822 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1 823 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 824 ; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec 825 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 826 ; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc 827 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]] 828 ; GCN: SI_MASK_BRANCH %bb.4, implicit $exec 829 ; GCN: S_BRANCH %bb.1 830 ; GCN: bb.1: 831 ; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000) 832 ; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 833 ; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec 834 ; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 835 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1 836 ; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 837 ; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec 838 ; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440 839 ; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0 840 ; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 841 ; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec 842 ; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 843 ; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 844 ; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]] 845 ; GCN: SI_MASK_BRANCH %bb.3, implicit $exec 846 ; GCN: S_BRANCH %bb.2 847 ; GCN: bb.2: 848 ; GCN: successors: %bb.3(0x80000000) 849 ; GCN: %5.sub0:sgpr_128 = COPY %5.sub2 850 ; GCN: %5.sub1:sgpr_128 = COPY %5.sub2 851 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 852 ; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 853 ; GCN: bb.3: 854 ; GCN: successors: %bb.6(0x80000000) 855 ; GCN: $exec = S_OR_B64_term $exec, [[COPY4]], implicit-def $scc 856 ; GCN: S_BRANCH %bb.6 857 ; GCN: bb.4: 858 ; GCN: successors: %bb.5(0x80000000) 859 ; GCN: $exec = S_OR_B64_term $exec, [[COPY2]], implicit-def $scc 860 ; GCN: bb.5: 861 ; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 862 ; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 863 ; GCN: $m0 = S_MOV_B32 -1 864 ; GCN: DS_WRITE_B32 [[V_MOV_B32_e32_2]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 865 ; GCN: S_ENDPGM 0 866 ; GCN: bb.6: 867 ; GCN: successors: %bb.4(0x80000000) 868 ; GCN: S_BRANCH %bb.4 869 bb.0: 870 successors: %bb.1, %bb.4 871 liveins: $vgpr0, $sgpr0_sgpr1 872 873 %1:sgpr_64 = COPY $sgpr0_sgpr1 874 %0:vgpr_32 = COPY $vgpr0 875 %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec 876 %3:sreg_64 = COPY $exec, implicit-def $exec 877 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 878 $exec = S_MOV_B64_term %4 879 SI_MASK_BRANCH %bb.4, implicit $exec 880 S_BRANCH %bb.1 881 882 bb.1: 883 successors: %bb.2, %bb.3 884 885 undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1, 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4) 886 undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, %0, implicit $exec 887 %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 888 %7:vgpr_32 = COPY %5.sub1 889 undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec 890 %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, %7, %9, 0, implicit $exec 891 %5.sub3:sgpr_128 = S_MOV_B32 61440 892 %5.sub2:sgpr_128 = S_MOV_B32 0 893 BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 894 %11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec 895 %12:sreg_64 = COPY $exec, implicit-def $exec 896 %13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc 897 $exec = S_MOV_B64_term %13 898 SI_MASK_BRANCH %bb.3, implicit $exec 899 S_BRANCH %bb.2 900 901 bb.2: 902 %5.sub0:sgpr_128 = COPY %5.sub2 903 %5.sub1:sgpr_128 = COPY %5.sub2 904 %14:vgpr_32 = V_MOV_B32_e32 1, implicit $exec 905 BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1) 906 907 bb.3: 908 $exec = S_OR_B64_term $exec, %12, implicit-def $scc 909 S_BRANCH %bb.6 910 911 bb.4: 912 $exec = S_OR_B64_term $exec, %3, implicit-def $scc 913 914 bb.5: 915 %15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec 916 %16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 917 $m0 = S_MOV_B32 -1 918 DS_WRITE_B32 %16, %15, 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3) 919 S_ENDPGM 0 920 921 bb.6: 922 S_BRANCH %bb.4 923 924... 925