1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-lower-control-flow -amdgpu-remove-redundant-endcf %s -o - | FileCheck -check-prefix=GCN %s
3
4# Make sure dbg_value doesn't change codeegn when collapsing end_cf
5---
6name: simple_nested_if_dbg_value
7tracksRegLiveness: true
8machineFunctionInfo:
9  isEntryFunction: true
10body:             |
11  ; GCN-LABEL: name: simple_nested_if_dbg_value
12  ; GCN: bb.0:
13  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
14  ; GCN-NEXT: {{  $}}
15  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
16  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
17  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
18  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
19  ; GCN-NEXT: {{  $}}
20  ; GCN-NEXT: bb.1:
21  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
22  ; GCN-NEXT: {{  $}}
23  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
24  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
25  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
26  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
27  ; GCN-NEXT: {{  $}}
28  ; GCN-NEXT: bb.2:
29  ; GCN-NEXT:   successors: %bb.4(0x80000000)
30  ; GCN-NEXT: {{  $}}
31  ; GCN-NEXT: {{  $}}
32  ; GCN-NEXT: bb.4:
33  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
34  ; GCN-NEXT:   DBG_VALUE
35  ; GCN-NEXT:   S_ENDPGM 0
36  bb.0:
37    successors: %bb.1, %bb.4
38
39    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
40
41  bb.1:
42    successors: %bb.2, %bb.3
43
44    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
45
46  bb.2:
47
48  bb.3:
49    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
50    DBG_VALUE
51
52  bb.4:
53    DBG_VALUE
54    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
55    S_ENDPGM 0
56
57...
58
59# Empty block separates the collapsable s_or_b64
60---
61name: simple_nested_if_empty_block_between
62tracksRegLiveness: true
63machineFunctionInfo:
64  isEntryFunction: true
65body:             |
66  ; GCN-LABEL: name: simple_nested_if_empty_block_between
67  ; GCN: bb.0:
68  ; GCN-NEXT:   successors: %bb.5(0x40000000), %bb.1(0x40000000)
69  ; GCN-NEXT: {{  $}}
70  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
71  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
72  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
73  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.5, implicit $exec
74  ; GCN-NEXT: {{  $}}
75  ; GCN-NEXT: bb.1:
76  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
77  ; GCN-NEXT: {{  $}}
78  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
79  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
80  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
81  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
82  ; GCN-NEXT: {{  $}}
83  ; GCN-NEXT: bb.2:
84  ; GCN-NEXT:   successors: %bb.4(0x80000000)
85  ; GCN-NEXT: {{  $}}
86  ; GCN-NEXT: {{  $}}
87  ; GCN-NEXT: bb.4:
88  ; GCN-NEXT:   successors: %bb.5(0x80000000)
89  ; GCN-NEXT: {{  $}}
90  ; GCN-NEXT: {{  $}}
91  ; GCN-NEXT: bb.5:
92  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
93  ; GCN-NEXT:   S_ENDPGM 0
94  bb.0:
95    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
96
97  bb.1:
98    successors: %bb.2, %bb.3
99
100    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
101
102  bb.2:
103
104  bb.3:
105    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
106
107  bb.5:
108
109  bb.4:
110    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
111    S_ENDPGM 0
112
113...
114
115# Effectively empty block separates the collapsable s_or_b64
116---
117name: simple_nested_if_empty_block_dbg_between
118tracksRegLiveness: true
119machineFunctionInfo:
120  isEntryFunction: true
121body:             |
122  ; GCN-LABEL: name: simple_nested_if_empty_block_dbg_between
123  ; GCN: bb.0:
124  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.5(0x40000000)
125  ; GCN-NEXT: {{  $}}
126  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
127  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
128  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
129  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.5, implicit $exec
130  ; GCN-NEXT: {{  $}}
131  ; GCN-NEXT: bb.1:
132  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
133  ; GCN-NEXT: {{  $}}
134  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
135  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
136  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
137  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
138  ; GCN-NEXT: {{  $}}
139  ; GCN-NEXT: bb.2:
140  ; GCN-NEXT:   successors: %bb.4(0x80000000)
141  ; GCN-NEXT: {{  $}}
142  ; GCN-NEXT: {{  $}}
143  ; GCN-NEXT: bb.4:
144  ; GCN-NEXT:   successors: %bb.5(0x80000000)
145  ; GCN-NEXT: {{  $}}
146  ; GCN-NEXT:   DBG_VALUE
147  ; GCN-NEXT: {{  $}}
148  ; GCN-NEXT: bb.5:
149  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
150  ; GCN-NEXT:   S_ENDPGM 0
151  bb.0:
152    successors: %bb.1, %bb.4
153
154    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
155
156  bb.1:
157    successors: %bb.2, %bb.3
158
159    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
160
161  bb.2:
162
163  bb.3:
164    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
165
166  bb.5:
167    DBG_VALUE
168
169  bb.4:
170    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
171    S_ENDPGM 0
172
173...
174
175---
176name: skip_salu_and_meta_insts_find_first
177tracksRegLiveness: true
178machineFunctionInfo:
179  isEntryFunction: true
180body:             |
181  ; GCN-LABEL: name: skip_salu_and_meta_insts_find_first
182  ; GCN: bb.0:
183  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
184  ; GCN-NEXT:   liveins: $vgpr0, $sgpr0_sgpr1
185  ; GCN-NEXT: {{  $}}
186  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
187  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
188  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
189  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
190  ; GCN-NEXT: {{  $}}
191  ; GCN-NEXT: bb.1:
192  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
193  ; GCN-NEXT: {{  $}}
194  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
195  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
196  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
197  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
198  ; GCN-NEXT: {{  $}}
199  ; GCN-NEXT: bb.2:
200  ; GCN-NEXT:   successors: %bb.3(0x80000000)
201  ; GCN-NEXT: {{  $}}
202  ; GCN-NEXT: {{  $}}
203  ; GCN-NEXT: bb.3:
204  ; GCN-NEXT:   successors: %bb.4(0x80000000)
205  ; GCN-NEXT: {{  $}}
206  ; GCN-NEXT:   [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
207  ; GCN-NEXT:   [[S_BREV_B32_:%[0-9]+]]:sgpr_32 = S_BREV_B32 [[DEF]]
208  ; GCN-NEXT:   KILL [[DEF]]
209  ; GCN-NEXT: {{  $}}
210  ; GCN-NEXT: bb.4:
211  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
212  ; GCN-NEXT:   S_ENDPGM 0
213  bb.0:
214    successors: %bb.1, %bb.4
215    liveins: $vgpr0, $sgpr0_sgpr1
216
217    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
218
219  bb.1:
220    successors: %bb.2, %bb.3
221
222    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
223
224  bb.2:
225
226  bb.3:
227    %4:sgpr_32 = IMPLICIT_DEF
228    %5:sgpr_32 = S_BREV_B32 %4
229    KILL %4
230    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
231
232  bb.4:
233    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
234    S_ENDPGM 0
235
236...
237
238# Make sure SALU instructions, meta instructions, and SGPR->SGPR
239# copies are skipped.
240---
241name: skip_salu_and_meta_insts_after
242tracksRegLiveness: true
243machineFunctionInfo:
244  isEntryFunction: true
245body:             |
246  ; GCN-LABEL: name: skip_salu_and_meta_insts_after
247  ; GCN: bb.0:
248  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
249  ; GCN-NEXT: {{  $}}
250  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
251  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
252  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
253  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
254  ; GCN-NEXT: {{  $}}
255  ; GCN-NEXT: bb.1:
256  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
257  ; GCN-NEXT: {{  $}}
258  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
259  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
260  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
261  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
262  ; GCN-NEXT: {{  $}}
263  ; GCN-NEXT: bb.2:
264  ; GCN-NEXT:   successors: %bb.3(0x80000000)
265  ; GCN-NEXT: {{  $}}
266  ; GCN-NEXT: {{  $}}
267  ; GCN-NEXT: bb.3:
268  ; GCN-NEXT:   successors: %bb.4(0x80000000)
269  ; GCN-NEXT: {{  $}}
270  ; GCN-NEXT:   [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
271  ; GCN-NEXT:   [[S_BREV_B32_:%[0-9]+]]:sgpr_32 = S_BREV_B32 [[DEF]]
272  ; GCN-NEXT:   KILL [[DEF]]
273  ; GCN-NEXT:   [[COPY2:%[0-9]+]]:sgpr_32 = COPY [[S_BREV_B32_]]
274  ; GCN-NEXT: {{  $}}
275  ; GCN-NEXT: bb.4:
276  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
277  ; GCN-NEXT:   S_ENDPGM 0
278  bb.0:
279    successors: %bb.1, %bb.4
280
281    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
282
283  bb.1:
284    successors: %bb.2, %bb.3
285
286    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
287
288  bb.2:
289
290  bb.3:
291    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
292    %4:sgpr_32 = IMPLICIT_DEF
293    %5:sgpr_32 = S_BREV_B32 %4
294    KILL %4
295    %6:sgpr_32 = COPY %5
296
297  bb.4:
298    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
299    S_ENDPGM 0
300
301...
302
303# SALU instruction depends on exec through a normal operand.
304---
305name: salu_exec_dependency
306tracksRegLiveness: true
307machineFunctionInfo:
308  isEntryFunction: true
309body:             |
310  ; GCN-LABEL: name: salu_exec_dependency
311  ; GCN: bb.0:
312  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
313  ; GCN-NEXT: {{  $}}
314  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
315  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
316  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
317  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
318  ; GCN-NEXT: {{  $}}
319  ; GCN-NEXT: bb.1:
320  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
321  ; GCN-NEXT: {{  $}}
322  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
323  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
324  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
325  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
326  ; GCN-NEXT: {{  $}}
327  ; GCN-NEXT: bb.2:
328  ; GCN-NEXT:   successors: %bb.3(0x80000000)
329  ; GCN-NEXT: {{  $}}
330  ; GCN-NEXT: {{  $}}
331  ; GCN-NEXT: bb.3:
332  ; GCN-NEXT:   successors: %bb.4(0x80000000)
333  ; GCN-NEXT: {{  $}}
334  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY1]], implicit-def $scc
335  ; GCN-NEXT:   [[S_BREV_B64_:%[0-9]+]]:sreg_64 = S_BREV_B64 $exec
336  ; GCN-NEXT: {{  $}}
337  ; GCN-NEXT: bb.4:
338  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
339  ; GCN-NEXT:   S_ENDPGM 0
340  bb.0:
341    successors: %bb.1, %bb.4
342
343    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
344
345  bb.1:
346    successors: %bb.2, %bb.3
347
348    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
349
350  bb.2:
351
352  bb.3:
353    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
354    %4:sreg_64 = S_BREV_B64 $exec
355
356  bb.4:
357    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
358    S_ENDPGM 0
359
360...
361
362# Copy to / from VGPR should be assumed to read exec
363---
364name: copy_no_explicit_exec_dependency
365tracksRegLiveness: true
366machineFunctionInfo:
367  isEntryFunction: true
368body:             |
369  ; GCN-LABEL: name: copy_no_explicit_exec_dependency
370  ; GCN: bb.0:
371  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
372  ; GCN-NEXT: {{  $}}
373  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
374  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
375  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
376  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
377  ; GCN-NEXT: {{  $}}
378  ; GCN-NEXT: bb.1:
379  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
380  ; GCN-NEXT: {{  $}}
381  ; GCN-NEXT:   [[DEF:%[0-9]+]]:vreg_128 = IMPLICIT_DEF
382  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
383  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %4:sreg_64, implicit-def dead $scc
384  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
385  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
386  ; GCN-NEXT: {{  $}}
387  ; GCN-NEXT: bb.2:
388  ; GCN-NEXT:   successors: %bb.3(0x80000000)
389  ; GCN-NEXT: {{  $}}
390  ; GCN-NEXT: {{  $}}
391  ; GCN-NEXT: bb.3:
392  ; GCN-NEXT:   successors: %bb.4(0x80000000)
393  ; GCN-NEXT: {{  $}}
394  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY1]], implicit-def $scc
395  ; GCN-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub2
396  ; GCN-NEXT: {{  $}}
397  ; GCN-NEXT: bb.4:
398  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
399  ; GCN-NEXT:   S_ENDPGM 0
400  bb.0:
401    successors: %bb.1, %bb.4
402
403    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
404
405  bb.1:
406    successors: %bb.2, %bb.3
407
408    %2:vreg_128 = IMPLICIT_DEF
409    %3:sreg_64 = SI_IF undef %4:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
410
411  bb.2:
412
413  bb.3:
414    SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
415    %5:vgpr_32 = COPY %2.sub2
416
417  bb.4:
418    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
419    S_ENDPGM 0
420
421...
422
423---
424name: simple_nested_if_not_layout_successor
425tracksRegLiveness: true
426machineFunctionInfo:
427  isEntryFunction: true
428body:             |
429  ; GCN-LABEL: name: simple_nested_if_not_layout_successor
430  ; GCN: bb.0:
431  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
432  ; GCN-NEXT: {{  $}}
433  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
434  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
435  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
436  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
437  ; GCN-NEXT: {{  $}}
438  ; GCN-NEXT: bb.1:
439  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.5(0x40000000)
440  ; GCN-NEXT: {{  $}}
441  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
442  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
443  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
444  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.5, implicit $exec
445  ; GCN-NEXT: {{  $}}
446  ; GCN-NEXT: bb.2:
447  ; GCN-NEXT:   successors: %bb.5(0x80000000)
448  ; GCN-NEXT: {{  $}}
449  ; GCN-NEXT: {{  $}}
450  ; GCN-NEXT: bb.5:
451  ; GCN-NEXT:   successors: %bb.4(0x80000000)
452  ; GCN-NEXT: {{  $}}
453  ; GCN-NEXT:   S_BRANCH %bb.4
454  ; GCN-NEXT: {{  $}}
455  ; GCN-NEXT: bb.4:
456  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
457  ; GCN-NEXT:   S_ENDPGM 0
458  bb.0:
459    successors: %bb.1, %bb.4
460
461    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
462
463  bb.1:
464    successors: %bb.2, %bb.3
465
466    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
467
468  bb.2:
469
470  bb.3:
471    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
472    S_BRANCH %bb.5
473
474  bb.4:
475    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
476    S_ENDPGM 0
477
478  bb.5:
479    S_BRANCH %bb.4
480
481...
482
483# This should never happen, but check that we do not hang anyway
484
485---
486name: resursive_endcf
487tracksRegLiveness: true
488liveins:
489  - { reg: '$vgpr0', virtual-reg: '%0' }
490machineFunctionInfo:
491  isEntryFunction: true
492body:             |
493  ; GCN-LABEL: name: resursive_endcf
494  ; GCN: bb.0:
495  ; GCN-NEXT:   successors: %bb.1(0x80000000)
496  ; GCN-NEXT:   liveins: $vgpr0
497  ; GCN-NEXT: {{  $}}
498  ; GCN-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
499  ; GCN-NEXT:   [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY]], implicit $exec
500  ; GCN-NEXT: {{  $}}
501  ; GCN-NEXT: bb.1:
502  ; GCN-NEXT:   successors: %bb.1(0x80000000)
503  ; GCN-NEXT: {{  $}}
504  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[V_CMP_LT_U32_e64_]], implicit-def $scc
505  ; GCN-NEXT:   S_BRANCH %bb.1
506  bb.0:
507    successors: %bb.1
508    liveins: $vgpr0
509
510    %0:vgpr_32 = COPY $vgpr0
511    %2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
512
513  bb.1:
514    successors: %bb.1
515
516    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
517    S_BRANCH %bb.1
518
519...
520
521# Both s_or_b64 shall be preserved since the outer SI_END_CF belongs to SI_ELSE.
522
523---
524name: simple_outer_if_else
525tracksRegLiveness: true
526machineFunctionInfo:
527  isEntryFunction: true
528body:             |
529  ; GCN-LABEL: name: simple_outer_if_else
530  ; GCN: bb.0:
531  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
532  ; GCN-NEXT: {{  $}}
533  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
534  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
535  ; GCN-NEXT:   [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_]], [[COPY]], implicit-def dead $scc
536  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
537  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
538  ; GCN-NEXT: {{  $}}
539  ; GCN-NEXT: bb.1:
540  ; GCN-NEXT:   successors: %bb.2(0x80000000)
541  ; GCN-NEXT: {{  $}}
542  ; GCN-NEXT:   S_BRANCH %bb.2
543  ; GCN-NEXT: {{  $}}
544  ; GCN-NEXT: bb.2:
545  ; GCN-NEXT:   successors: %bb.3(0x40000000), %bb.6(0x40000000)
546  ; GCN-NEXT: {{  $}}
547  ; GCN-NEXT:   [[S_OR_SAVEEXEC_B64_:%[0-9]+]]:sreg_64 = S_OR_SAVEEXEC_B64 [[S_XOR_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec
548  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[S_OR_SAVEEXEC_B64_]], implicit-def $scc
549  ; GCN-NEXT:   $exec = S_XOR_B64_term $exec, [[S_AND_B64_1]], implicit-def $scc
550  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.6, implicit $exec
551  ; GCN-NEXT: {{  $}}
552  ; GCN-NEXT: bb.3:
553  ; GCN-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
554  ; GCN-NEXT: {{  $}}
555  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
556  ; GCN-NEXT:   [[S_AND_B64_2:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %4:sreg_64, implicit-def dead $scc
557  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_2]]
558  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
559  ; GCN-NEXT: {{  $}}
560  ; GCN-NEXT: bb.4:
561  ; GCN-NEXT:   successors: %bb.5(0x80000000)
562  ; GCN-NEXT: {{  $}}
563  ; GCN-NEXT: {{  $}}
564  ; GCN-NEXT: bb.5:
565  ; GCN-NEXT:   successors: %bb.6(0x80000000)
566  ; GCN-NEXT: {{  $}}
567  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY1]], implicit-def $scc
568  ; GCN-NEXT: {{  $}}
569  ; GCN-NEXT: bb.6:
570  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[S_AND_B64_1]], implicit-def $scc
571  ; GCN-NEXT:   S_ENDPGM 0
572  bb.0:
573    successors: %bb.1, %bb.2
574
575    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
576
577  bb.1:
578    successors: %bb.2
579    S_BRANCH %bb.2
580
581  bb.2:
582    successors: %bb.3, %bb.6
583    %2:sreg_64 = SI_ELSE %0:sreg_64, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
584
585  bb.3:
586    successors: %bb.3, %bb.4
587
588    %3:sreg_64 = SI_IF undef %4:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
589
590  bb.4:
591    successors: %bb.5
592
593  bb.5:
594    successors: %bb.6
595
596    SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
597
598  bb.6:
599    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
600    S_ENDPGM 0
601
602...
603
604---
605name: if_inside_loop
606tracksRegLiveness: true
607machineFunctionInfo:
608  isEntryFunction: true
609body:             |
610  ; GCN-LABEL: name: if_inside_loop
611  ; GCN: bb.0:
612  ; GCN-NEXT:   successors: %bb.6(0x80000000)
613  ; GCN-NEXT: {{  $}}
614  ; GCN-NEXT:   S_BRANCH %bb.6
615  ; GCN-NEXT: {{  $}}
616  ; GCN-NEXT: bb.1:
617  ; GCN-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
618  ; GCN-NEXT: {{  $}}
619  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
620  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
621  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
622  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.3, implicit $exec
623  ; GCN-NEXT: {{  $}}
624  ; GCN-NEXT: bb.2:
625  ; GCN-NEXT:   successors: %bb.6(0x80000000)
626  ; GCN-NEXT: {{  $}}
627  ; GCN-NEXT:   S_BRANCH %bb.6
628  ; GCN-NEXT: {{  $}}
629  ; GCN-NEXT: bb.3:
630  ; GCN-NEXT:   successors: %bb.4(0x80000000)
631  ; GCN-NEXT: {{  $}}
632  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
633  ; GCN-NEXT: {{  $}}
634  ; GCN-NEXT: bb.4:
635  ; GCN-NEXT:   successors: %bb.5(0x80000000)
636  ; GCN-NEXT: {{  $}}
637  ; GCN-NEXT:   $exec = S_OR_B64 $exec, %2, implicit-def $scc
638  ; GCN-NEXT: {{  $}}
639  ; GCN-NEXT: bb.5:
640  ; GCN-NEXT:   successors: %bb.6(0x80000000)
641  ; GCN-NEXT: {{  $}}
642  ; GCN-NEXT: {{  $}}
643  ; GCN-NEXT: bb.6:
644  ; GCN-NEXT:   successors: %bb.4(0x40000000), %bb.0(0x40000000)
645  ; GCN-NEXT: {{  $}}
646  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
647  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
648  ; GCN-NEXT:   [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_1]], [[COPY1]], implicit-def dead $scc
649  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
650  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
651  ; GCN-NEXT:   S_BRANCH %bb.0
652  ; GCN-NEXT:   S_ENDPGM 0
653  bb.0:
654    S_BRANCH %bb.6
655
656  bb.1:
657    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
658
659  bb.2:
660    S_BRANCH %bb.6
661
662  bb.3:
663    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
664
665  bb.4:
666    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
667
668  bb.5:
669
670  bb.6:
671    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
672    S_BRANCH %bb.0
673    S_ENDPGM 0
674
675...
676
677---
678# redundant MBB removal correctness test:
679# we can keep bb.2 fallthrough to the  new succ because after bb.3 gets removed
680# new succ (bb.4) becomes bb.2's layout successor
681name: removed_succ_fallthrough_but_layout_successor
682tracksRegLiveness: true
683machineFunctionInfo:
684  isEntryFunction: true
685body:             |
686  ; GCN-LABEL: name: removed_succ_fallthrough_but_layout_successor
687  ; GCN: bb.0:
688  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
689  ; GCN-NEXT: {{  $}}
690  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
691  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
692  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
693  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
694  ; GCN-NEXT: {{  $}}
695  ; GCN-NEXT: bb.1:
696  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
697  ; GCN-NEXT: {{  $}}
698  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
699  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
700  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
701  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
702  ; GCN-NEXT: {{  $}}
703  ; GCN-NEXT: bb.2:
704  ; GCN-NEXT:   successors: %bb.4(0x80000000)
705  ; GCN-NEXT: {{  $}}
706  ; GCN-NEXT: {{  $}}
707  ; GCN-NEXT: bb.4:
708  ; GCN-NEXT:   successors: %bb.5(0x80000000)
709  ; GCN-NEXT: {{  $}}
710  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
711  ; GCN-NEXT: {{  $}}
712  ; GCN-NEXT: bb.5:
713  ; GCN-NEXT:   S_ENDPGM 0
714  bb.0:
715    successors: %bb.1, %bb.4
716
717    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
718
719  bb.1:
720    successors: %bb.2, %bb.3
721
722    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
723
724  bb.2:
725
726  bb.3:
727    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
728
729
730  bb.4:
731    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
732
733  bb.5:
734    S_ENDPGM 0
735
736...
737
738---
739# redundant MBB removal correctness test:
740# If one of the remdundant block preds has a fallthrough path, but the only redundant block succ is not
741# going to be a layout successor to that pred after redundant block removal, we should not rearrange
742# blocks to keep pred's fallthrough path, if the succ has fallthrough path to one of it's succ too.
743
744name: deleted_succ_fallthrough_not_layout_successor
745tracksRegLiveness: true
746machineFunctionInfo:
747  isEntryFunction: true
748body:             |
749  ; GCN-LABEL: name: deleted_succ_fallthrough_not_layout_successor
750  ; GCN: bb.0:
751  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
752  ; GCN-NEXT: {{  $}}
753  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
754  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
755  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
756  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.4, implicit $exec
757  ; GCN-NEXT: {{  $}}
758  ; GCN-NEXT: bb.1:
759  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.5(0x40000000)
760  ; GCN-NEXT: {{  $}}
761  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
762  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], undef %3:sreg_64, implicit-def dead $scc
763  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
764  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.5, implicit $exec
765  ; GCN-NEXT: {{  $}}
766  ; GCN-NEXT: bb.2:
767  ; GCN-NEXT:   successors: %bb.5(0x80000000)
768  ; GCN-NEXT: {{  $}}
769  ; GCN-NEXT:   S_BRANCH %bb.5
770  ; GCN-NEXT: {{  $}}
771  ; GCN-NEXT: bb.4:
772  ; GCN-NEXT:   S_ENDPGM 0
773  ; GCN-NEXT: {{  $}}
774  ; GCN-NEXT: bb.5:
775  ; GCN-NEXT:   successors: %bb.6(0x80000000)
776  ; GCN-NEXT: {{  $}}
777  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
778  ; GCN-NEXT: {{  $}}
779  ; GCN-NEXT: bb.6:
780  ; GCN-NEXT:   successors: %bb.4(0x80000000)
781  ; GCN-NEXT: {{  $}}
782  ; GCN-NEXT:   S_BRANCH %bb.4
783  bb.0:
784    successors: %bb.1, %bb.4
785
786    %0:sreg_64 = SI_IF undef %1:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
787
788  bb.1:
789    successors: %bb.2, %bb.3
790
791    %2:sreg_64 = SI_IF undef %3:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
792
793  bb.2:
794
795  bb.3:
796    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
797    S_BRANCH %bb.5
798
799  bb.4:
800    S_ENDPGM 0
801
802
803  bb.5:
804    SI_END_CF %0:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
805
806  bb.6:
807    S_BRANCH %bb.4
808...
809
810---
811# While collapsing inner endcf, certain blocks ended up getting two S_BRANCH instructions.
812# It happens in the absence of BranchFolding (mostly at -O0) when the irregularly placed BBs are traversed
813# in the forward direction and the intervening block between a predecessor and its successor gets optimized
814# away in subsequent iterations, leaving 2 S_BRANCH instructions in the predecessor block.
815# The issue was fixed by iterating the blocks from bottom-up to ensure all endcf pseudos at the bottom of the
816# function are processed first.
817# This test ensures there are no multiple S_BRANCH instructions inserted in any block.
818
819name: no_multiple_unconditional_branches
820tracksRegLiveness: true
821body: |
822  ; GCN-LABEL: name: no_multiple_unconditional_branches
823  ; GCN: bb.0:
824  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.14(0x40000000)
825  ; GCN-NEXT: {{  $}}
826  ; GCN-NEXT:   [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
827  ; GCN-NEXT:   [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 0, killed [[DEF]], implicit $exec
828  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
829  ; GCN-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
830  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_]]
831  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.14, implicit $exec
832  ; GCN-NEXT:   S_BRANCH %bb.1
833  ; GCN-NEXT: {{  $}}
834  ; GCN-NEXT: bb.1:
835  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.14(0x40000000)
836  ; GCN-NEXT: {{  $}}
837  ; GCN-NEXT:   [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
838  ; GCN-NEXT:   [[V_CMP_EQ_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 0, killed [[DEF1]], implicit $exec
839  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
840  ; GCN-NEXT:   [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], killed [[V_CMP_EQ_U32_e64_1]], implicit-def dead $scc
841  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
842  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.14, implicit $exec
843  ; GCN-NEXT:   S_BRANCH %bb.2
844  ; GCN-NEXT: {{  $}}
845  ; GCN-NEXT: bb.2:
846  ; GCN-NEXT:   successors: %bb.3(0x40000000), %bb.7(0x40000000)
847  ; GCN-NEXT: {{  $}}
848  ; GCN-NEXT:   [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
849  ; GCN-NEXT:   [[V_CMP_EQ_U32_e64_2:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 0, killed [[DEF2]], implicit $exec
850  ; GCN-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
851  ; GCN-NEXT:   [[S_AND_B64_2:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], killed [[V_CMP_EQ_U32_e64_2]], implicit-def dead $scc
852  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_2]]
853  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.7, implicit $exec
854  ; GCN-NEXT:   S_BRANCH %bb.3
855  ; GCN-NEXT: {{  $}}
856  ; GCN-NEXT: bb.3:
857  ; GCN-NEXT:   successors: %bb.4(0x40000000), %bb.7(0x40000000)
858  ; GCN-NEXT: {{  $}}
859  ; GCN-NEXT:   [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
860  ; GCN-NEXT:   [[V_CMP_EQ_U32_e64_3:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 0, killed [[DEF3]], implicit $exec
861  ; GCN-NEXT:   [[COPY3:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
862  ; GCN-NEXT:   [[S_AND_B64_3:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY3]], killed [[V_CMP_EQ_U32_e64_3]], implicit-def dead $scc
863  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_3]]
864  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.7, implicit $exec
865  ; GCN-NEXT:   S_BRANCH %bb.4
866  ; GCN-NEXT: {{  $}}
867  ; GCN-NEXT: bb.4:
868  ; GCN-NEXT:   successors: %bb.7(0x80000000)
869  ; GCN-NEXT: {{  $}}
870  ; GCN-NEXT:   S_BRANCH %bb.7
871  ; GCN-NEXT: {{  $}}
872  ; GCN-NEXT: bb.7:
873  ; GCN-NEXT:   successors: %bb.8(0x80000000)
874  ; GCN-NEXT: {{  $}}
875  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
876  ; GCN-NEXT:   S_BRANCH %bb.8
877  ; GCN-NEXT: {{  $}}
878  ; GCN-NEXT: bb.8:
879  ; GCN-NEXT:   successors: %bb.9(0x80000000)
880  ; GCN-NEXT: {{  $}}
881  ; GCN-NEXT:   S_BRANCH %bb.9
882  ; GCN-NEXT: {{  $}}
883  ; GCN-NEXT: bb.9:
884  ; GCN-NEXT:   successors: %bb.11(0x40000000), %bb.12(0x40000000)
885  ; GCN-NEXT: {{  $}}
886  ; GCN-NEXT:   [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
887  ; GCN-NEXT:   [[V_CMP_EQ_U32_e64_4:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 0, killed [[DEF4]], implicit $exec
888  ; GCN-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
889  ; GCN-NEXT:   [[S_AND_B64_4:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], killed [[V_CMP_EQ_U32_e64_4]], implicit-def dead $scc
890  ; GCN-NEXT:   [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_4]], [[COPY4]], implicit-def dead $scc
891  ; GCN-NEXT:   $exec = S_MOV_B64_term killed [[S_AND_B64_4]]
892  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.12, implicit $exec
893  ; GCN-NEXT:   S_BRANCH %bb.11
894  ; GCN-NEXT: {{  $}}
895  ; GCN-NEXT: bb.10:
896  ; GCN-NEXT:   successors: %bb.14(0x80000000)
897  ; GCN-NEXT: {{  $}}
898  ; GCN-NEXT:   S_BRANCH %bb.14
899  ; GCN-NEXT: {{  $}}
900  ; GCN-NEXT: bb.11:
901  ; GCN-NEXT:   successors: %bb.12(0x80000000)
902  ; GCN-NEXT: {{  $}}
903  ; GCN-NEXT:   S_BRANCH %bb.12
904  ; GCN-NEXT: {{  $}}
905  ; GCN-NEXT: bb.12:
906  ; GCN-NEXT:   successors: %bb.10(0x40000000), %bb.14(0x40000000)
907  ; GCN-NEXT: {{  $}}
908  ; GCN-NEXT:   [[S_OR_SAVEEXEC_B64_:%[0-9]+]]:sreg_64 = S_OR_SAVEEXEC_B64 [[S_XOR_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec
909  ; GCN-NEXT:   [[S_AND_B64_5:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[S_OR_SAVEEXEC_B64_]], implicit-def $scc
910  ; GCN-NEXT:   $exec = S_XOR_B64_term $exec, [[S_AND_B64_5]], implicit-def $scc
911  ; GCN-NEXT:   S_CBRANCH_EXECZ %bb.14, implicit $exec
912  ; GCN-NEXT:   S_BRANCH %bb.10
913  ; GCN-NEXT: {{  $}}
914  ; GCN-NEXT: bb.14:
915  ; GCN-NEXT:   $exec = S_OR_B64 $exec, [[COPY]], implicit-def $scc
916  ; GCN-NEXT:   S_ENDPGM 0
917  bb.0:
918    successors: %bb.1, %bb.14
919
920    %0:vgpr_32 = IMPLICIT_DEF
921    %1:sreg_64 = V_CMP_EQ_U32_e64 0, killed %0:vgpr_32, implicit $exec
922    %2:sreg_64 = SI_IF %1:sreg_64, %bb.14, implicit-def $exec, implicit-def dead $scc, implicit $exec
923    S_BRANCH %bb.1
924
925  bb.1:
926  ; predecessors: %bb.0
927    successors: %bb.2, %bb.6
928
929    %3:vgpr_32 = IMPLICIT_DEF
930    %4:sreg_64 = V_CMP_EQ_U32_e64 0, killed %3:vgpr_32, implicit $exec
931    %5:sreg_64 = SI_IF killed %4:sreg_64, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
932    S_BRANCH %bb.2
933
934  bb.2:
935  ; predecessors: %bb.1
936    successors: %bb.3, %bb.7
937
938    %6:vgpr_32 = IMPLICIT_DEF
939    %7:sreg_64 = V_CMP_EQ_U32_e64 0, killed %6:vgpr_32, implicit $exec
940    %8:sreg_64 = SI_IF killed %7:sreg_64, %bb.7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
941    S_BRANCH %bb.3
942
943  bb.3:
944  ; predecessors: %bb.2
945    successors: %bb.4, %bb.5
946
947    %9:vgpr_32 = IMPLICIT_DEF
948    %10:sreg_64 = V_CMP_EQ_U32_e64 0, killed %9:vgpr_32, implicit $exec
949    %11:sreg_64 = SI_IF killed %10:sreg_64, %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
950    S_BRANCH %bb.4
951
952  bb.4:
953  ; predecessors: %bb.3
954    successors: %bb.5
955
956    S_BRANCH %bb.5
957
958  bb.5:
959  ; predecessors: %bb.3, %bb.4
960    successors: %bb.7
961
962    SI_END_CF %11:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
963    S_BRANCH %bb.7
964
965  bb.6:
966  ; predecessors: %bb.1, %bb.13
967    successors: %bb.14
968
969    SI_END_CF %5:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
970    S_BRANCH %bb.14
971
972  bb.7:
973  ; predecessors: %bb2, %bb.5
974    successors: %bb.8
975
976    SI_END_CF %8:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
977    S_BRANCH %bb.8
978
979  bb.8:
980  ; predecessors: %bb.7
981    successors: %bb.9
982
983    S_BRANCH %bb.9
984
985  bb.9:
986  ; predecessors: %bb.8
987    successors: %bb.11, %bb.12
988
989    %12:vgpr_32 = IMPLICIT_DEF
990    %13:sreg_64 = V_CMP_EQ_U32_e64 0, killed %12:vgpr_32, implicit $exec
991    %14:sreg_64 = SI_IF killed %13:sreg_64, %bb.12, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
992    S_BRANCH %bb.11
993
994  bb.10:
995  ; predecessors: %bb.12
996    successors: %bb.13
997
998    S_BRANCH %bb.13
999
1000  bb.11:
1001  ; predecessors: %bb.9
1002    successors: %bb.12
1003
1004    S_BRANCH %bb.12
1005
1006  bb.12:
1007  ; predecessors: %bb.9, %bb.11
1008    successors: %bb.10, %bb.13
1009
1010    %15:sreg_64 = SI_ELSE %14:sreg_64, %bb.13, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
1011    S_BRANCH %bb.10
1012
1013  bb.13:
1014  ; predecessors: %bb.10, %bb.12
1015    successors: %bb.6
1016
1017    SI_END_CF %15:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
1018    S_BRANCH %bb.6
1019
1020  bb.14:
1021  ; predecessors: %bb.0, %bb.6
1022
1023    SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
1024    S_ENDPGM 0
1025
1026...
1027