1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefixes=R600,ALL
2; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck %s --check-prefixes=GFX6,GFX678,ALL
3; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs | FileCheck %s --check-prefixes=GFX8,GFX678,ALL
4; RUN: llc < %s -mtriple=amdgcn-amd-amdpal -mcpu=gfx1030 -verify-machineinstrs | FileCheck %s --check-prefixes=GFX10,GFX1011,ALL
5; RUN: llc < %s -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -amdgpu-enable-vopd=0 -verify-machineinstrs | FileCheck %s --check-prefixes=GFX11,GFX1011,ALL
6
7; ALL-LABEL: {{^}}build_vector2:
8; R600: MOV
9; R600: MOV
10; R600-NOT: MOV
11; GFX678-DAG: v_mov_b32_e32 v[[X:[0-9]]], 5
12; GFX678-DAG: v_mov_b32_e32 v[[Y:[0-9]]], 6
13; GFX1011-DAG: v_mov_b32_e32 v[[X:[0-9]]], 5
14; GFX1011-DAG: v_mov_b32_e32 v[[Y:[0-9]]], 6
15; GFX678: buffer_store_dwordx2 v[[[X]]:[[Y]]]
16; GFX10: global_store_dwordx2 v2, v[0:1], s[0:1]
17; GFX11: global_store_b64 v2, v[0:1], s[0:1]
18define amdgpu_kernel void @build_vector2 (<2 x i32> addrspace(1)* %out) {
19entry:
20  store <2 x i32> <i32 5, i32 6>, <2 x i32> addrspace(1)* %out
21  ret void
22}
23
24; ALL-LABEL: {{^}}build_vector4:
25; R600: MOV
26; R600: MOV
27; R600: MOV
28; R600: MOV
29; R600-NOT: MOV
30; GFX678-DAG: v_mov_b32_e32 v[[X:[0-9]]], 5
31; GFX678-DAG: v_mov_b32_e32 v[[Y:[0-9]]], 6
32; GFX678-DAG: v_mov_b32_e32 v[[Z:[0-9]]], 7
33; GFX678-DAG: v_mov_b32_e32 v[[W:[0-9]]], 8
34; GFX1011-DAG: v_mov_b32_e32 v[[X:[0-9]]], 5
35; GFX1011-DAG: v_mov_b32_e32 v[[Y:[0-9]]], 6
36; GFX1011-DAG: v_mov_b32_e32 v[[Z:[0-9]]], 7
37; GFX1011-DAG: v_mov_b32_e32 v[[W:[0-9]]], 8
38; GFX678: buffer_store_dwordx4 v[[[X]]:[[W]]]
39; GFX10: global_store_dwordx4 v4, v[0:3], s[0:1]
40; GFX11: global_store_b128 v4, v[0:3], s[0:1]
41define amdgpu_kernel void @build_vector4 (<4 x i32> addrspace(1)* %out) {
42entry:
43  store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, <4 x i32> addrspace(1)* %out
44  ret void
45}
46
47
48; ALL-LABEL: {{^}}build_vector_v2i16:
49; R600: MOV
50; R600-NOT: MOV
51; GFX678: s_mov_b32 s3, 0xf000
52; GFX678: s_mov_b32 s2, -1
53; GFX678: v_mov_b32_e32 v0, 0x60005
54; GFX678: s_waitcnt lgkmcnt(0)
55; GFX678: buffer_store_dword v0, off, s[0:3], 0
56; GFX1011: v_mov_b32_e32 v0, 0
57; GFX1011: v_mov_b32_e32 v1, 0x60005
58; GFX1011: s_waitcnt lgkmcnt(0)
59; GFX10: global_store_dword v0, v1, s[0:1]
60; GFX11: global_store_b32 v0, v1, s[0:1]
61define amdgpu_kernel void @build_vector_v2i16 (<2 x i16> addrspace(1)* %out) {
62entry:
63  store <2 x i16> <i16 5, i16 6>, <2 x i16> addrspace(1)* %out
64  ret void
65}
66
67; ALL-LABEL: {{^}}build_vector_v2i16_trunc:
68; R600: LSHR
69; R600: OR_INT
70; R600: LSHR
71; R600-NOT: MOV
72; GFX6: s_mov_b32 s3, 0xf000
73; GFX6: s_waitcnt lgkmcnt(0)
74; GFX6: s_lshr_b32 s2, s2, 16
75; GFX6: s_or_b32 s4, s2, 0x50000
76; GFX6: s_mov_b32 s2, -1
77; GFX6: v_mov_b32_e32 v0, s4
78; GFX6: buffer_store_dword v0, off, s[0:3], 0
79; GFX8: s_mov_b32 s3, 0xf000
80; GFX8: s_mov_b32 s2, -1
81; GFX8: s_waitcnt lgkmcnt(0)
82; GFX8: s_lshr_b32 s4, s4, 16
83; GFX8: s_or_b32 s4, s4, 0x50000
84; GFX8: v_mov_b32_e32 v0, s4
85; GFX8: buffer_store_dword v0, off, s[0:3], 0
86; GFX1011: v_mov_b32_e32 v0, 0
87; GFX1011: s_waitcnt lgkmcnt(0)
88; GFX10: s_lshr_b32 s2, s2, 16
89; GFX10: s_pack_ll_b32_b16 s2, s2, 5
90; GFX11: s_pack_hl_b32_b16 s2, s2, 5
91; GFX1011: v_mov_b32_e32 v1, s2
92; GFX10: global_store_dword v0, v1, s[0:1]
93; GFX11: global_store_b32 v0, v1, s[0:1]
94define amdgpu_kernel void @build_vector_v2i16_trunc (<2 x i16> addrspace(1)* %out, i32 %a) {
95  %srl = lshr i32 %a, 16
96  %trunc = trunc i32 %srl to i16
97  %ins.0 = insertelement <2 x i16> undef, i16 %trunc, i32 0
98  %ins.1 = insertelement <2 x i16> %ins.0, i16 5, i32 1
99  store <2 x i16> %ins.1, <2 x i16> addrspace(1)* %out
100  ret void
101}
102