1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX9
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX10
4
5define amdgpu_kernel void @test0() {
6; GFX9-LABEL: test0:
7; GFX9:       ; %bb.0:
8; GFX9-NEXT:    s_endpgm
9;
10; GFX10-LABEL: test0:
11; GFX10:       ; %bb.0:
12; GFX10-NEXT:    s_endpgm
13  tail call void @llvm.amdgcn.endpgm()
14  unreachable
15}
16
17define void @test1() {
18; GFX9-LABEL: test1:
19; GFX9:       ; %bb.0:
20; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
21; GFX9-NEXT:    s_endpgm
22;
23; GFX10-LABEL: test1:
24; GFX10:       ; %bb.0:
25; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
27; GFX10-NEXT:    s_endpgm
28  tail call void @llvm.amdgcn.endpgm()
29  unreachable
30}
31
32define amdgpu_kernel void @test2(i32* %p, i32 %x) {
33; GFX9-LABEL: test2:
34; GFX9:       ; %bb.0:
35; GFX9-NEXT:    s_load_dword s2, s[0:1], 0x2c
36; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
37; GFX9-NEXT:    s_cmp_lt_i32 s2, 1
38; GFX9-NEXT:    s_cbranch_scc0 .LBB2_2
39; GFX9-NEXT:  ; %bb.1: ; %else
40; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
41; GFX9-NEXT:    v_mov_b32_e32 v2, s2
42; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
43; GFX9-NEXT:    v_mov_b32_e32 v0, s0
44; GFX9-NEXT:    v_mov_b32_e32 v1, s1
45; GFX9-NEXT:    flat_store_dword v[0:1], v2
46; GFX9-NEXT:    s_endpgm
47; GFX9-NEXT:  .LBB2_2: ; %then
48; GFX9-NEXT:    s_endpgm
49;
50; GFX10-LABEL: test2:
51; GFX10:       ; %bb.0:
52; GFX10-NEXT:    s_load_dword s2, s[0:1], 0x2c
53; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
54; GFX10-NEXT:    s_cmp_lt_i32 s2, 1
55; GFX10-NEXT:    s_cbranch_scc0 .LBB2_2
56; GFX10-NEXT:  ; %bb.1: ; %else
57; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
58; GFX10-NEXT:    v_mov_b32_e32 v2, s2
59; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
60; GFX10-NEXT:    v_mov_b32_e32 v0, s0
61; GFX10-NEXT:    v_mov_b32_e32 v1, s1
62; GFX10-NEXT:    flat_store_dword v[0:1], v2
63; GFX10-NEXT:    s_endpgm
64; GFX10-NEXT:  .LBB2_2: ; %then
65; GFX10-NEXT:    s_endpgm
66  %cond = icmp sgt i32 %x, 0
67  br i1 %cond, label %then, label %else
68
69then:
70  tail call void @llvm.amdgcn.endpgm()
71  unreachable
72
73else:
74  store i32 %x, i32* %p
75  ret void
76}
77
78declare void @llvm.amdgcn.endpgm()
79