1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX9
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX10
4; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s --check-prefix=GFX11
5
6define amdgpu_kernel void @test0() {
7; GFX9-LABEL: test0:
8; GFX9:       ; %bb.0:
9; GFX9-NEXT:    s_endpgm
10;
11; GFX10-LABEL: test0:
12; GFX10:       ; %bb.0:
13; GFX10-NEXT:    s_endpgm
14;
15; GFX11-LABEL: test0:
16; GFX11:       ; %bb.0:
17; GFX11-NEXT:    s_endpgm
18  tail call void @llvm.amdgcn.endpgm()
19  unreachable
20}
21
22define void @test1() {
23; GFX9-LABEL: test1:
24; GFX9:       ; %bb.0:
25; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
26; GFX9-NEXT:    s_endpgm
27;
28; GFX10-LABEL: test1:
29; GFX10:       ; %bb.0:
30; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
31; GFX10-NEXT:    s_waitcnt_vscnt null, 0x0
32; GFX10-NEXT:    s_endpgm
33;
34; GFX11-LABEL: test1:
35; GFX11:       ; %bb.0:
36; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
37; GFX11-NEXT:    s_waitcnt_vscnt null, 0x0
38; GFX11-NEXT:    s_endpgm
39  tail call void @llvm.amdgcn.endpgm()
40  unreachable
41}
42
43define amdgpu_kernel void @test2(i32* %p, i32 %x) {
44; GFX9-LABEL: test2:
45; GFX9:       ; %bb.0:
46; GFX9-NEXT:    s_load_dword s2, s[0:1], 0x2c
47; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
48; GFX9-NEXT:    s_cmp_lt_i32 s2, 1
49; GFX9-NEXT:    s_cbranch_scc0 .LBB2_2
50; GFX9-NEXT:  ; %bb.1: ; %else
51; GFX9-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
52; GFX9-NEXT:    v_mov_b32_e32 v2, s2
53; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
54; GFX9-NEXT:    v_mov_b32_e32 v0, s0
55; GFX9-NEXT:    v_mov_b32_e32 v1, s1
56; GFX9-NEXT:    flat_store_dword v[0:1], v2
57; GFX9-NEXT:    s_endpgm
58; GFX9-NEXT:  .LBB2_2: ; %then
59; GFX9-NEXT:    s_endpgm
60;
61; GFX10-LABEL: test2:
62; GFX10:       ; %bb.0:
63; GFX10-NEXT:    s_load_dword s2, s[0:1], 0x2c
64; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
65; GFX10-NEXT:    s_cmp_lt_i32 s2, 1
66; GFX10-NEXT:    s_cbranch_scc0 .LBB2_2
67; GFX10-NEXT:  ; %bb.1: ; %else
68; GFX10-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
69; GFX10-NEXT:    v_mov_b32_e32 v2, s2
70; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
71; GFX10-NEXT:    v_mov_b32_e32 v0, s0
72; GFX10-NEXT:    v_mov_b32_e32 v1, s1
73; GFX10-NEXT:    flat_store_dword v[0:1], v2
74; GFX10-NEXT:    s_endpgm
75; GFX10-NEXT:  .LBB2_2: ; %then
76; GFX10-NEXT:    s_endpgm
77;
78; GFX11-LABEL: test2:
79; GFX11:       ; %bb.0:
80; GFX11-NEXT:    s_load_b32 s2, s[0:1], 0x2c
81; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
82; GFX11-NEXT:    s_cmp_lt_i32 s2, 1
83; GFX11-NEXT:    s_cbranch_scc0 .LBB2_2
84; GFX11-NEXT:  ; %bb.1: ; %else
85; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
86; GFX11-NEXT:    v_mov_b32_e32 v2, s2
87; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
88; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
89; GFX11-NEXT:    flat_store_b32 v[0:1], v2
90; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
91; GFX11-NEXT:    s_endpgm
92; GFX11-NEXT:  .LBB2_2: ; %then
93; GFX11-NEXT:    s_endpgm
94  %cond = icmp sgt i32 %x, 0
95  br i1 %cond, label %then, label %else
96
97then:
98  tail call void @llvm.amdgcn.endpgm()
99  unreachable
100
101else:
102  store i32 %x, i32* %p
103  ret void
104}
105
106declare void @llvm.amdgcn.endpgm()
107