1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills %s -o - 2>&1 | FileCheck %s 3--- | 4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 5 target triple = "aarch64" 6 7 @A = external dso_local global [100 x i32], align 4 8 %struct.A = type { i32, i32, i32, i32, i32, i32 } 9 10 define void @cant_sink_adds_call_in_block(i8* nocapture readonly %input, %struct.A* %a) { 11 %1 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 1 12 %2 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 2 13 %3 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 3 14 %4 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 4 15 %5 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 5 16 %scevgep = getelementptr i8, i8* %input, i64 1 17 br label %.backedge 18 19 .backedge: ; preds = %.backedge.backedge, %0 20 %lsr.iv = phi i8* [ %scevgep1, %.backedge.backedge ], [ %scevgep, %0 ] 21 %6 = load i8, i8* %lsr.iv, align 1 22 %7 = zext i8 %6 to i32 23 switch i32 %7, label %.backedge.backedge [ 24 i32 0, label %8 25 i32 10, label %10 26 i32 20, label %11 27 i32 30, label %12 28 i32 40, label %13 29 i32 50, label %14 30 ] 31 32 8: ; preds = %.backedge 33 %9 = bitcast %struct.A* %a to i32* 34 tail call void @_Z6assignPj(i32* %9) 35 br label %.backedge.backedge 36 37 10: ; preds = %.backedge 38 tail call void @_Z6assignPj(i32* %1) 39 br label %.backedge.backedge 40 41 11: ; preds = %.backedge 42 tail call void @_Z6assignPj(i32* %2) 43 br label %.backedge.backedge 44 45 12: ; preds = %.backedge 46 tail call void @_Z6assignPj(i32* %3) 47 br label %.backedge.backedge 48 49 13: ; preds = %.backedge 50 tail call void @_Z6assignPj(i32* %4) 51 br label %.backedge.backedge 52 53 14: ; preds = %.backedge 54 tail call void @_Z6assignPj(i32* %5) 55 br label %.backedge.backedge 56 57 .backedge.backedge: ; preds = %14, %13, %12, %11, %10, %8, %.backedge 58 %scevgep1 = getelementptr i8, i8* %lsr.iv, i64 1 59 br label %.backedge 60 } 61 62 define i32 @load_not_safe_to_move_consecutive_call(i32 %n) { 63 entry: 64 %cmp63 = icmp sgt i32 %n, 0 65 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup 66 67 for.body.preheader: ; preds = %entry 68 %0 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0), align 4 69 %call0 = tail call i32 @use(i32 %n) 70 br label %for.body 71 72 for.cond.cleanup: ; preds = %for.body, %entry 73 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 74 ret i32 %sum.0.lcssa 75 76 for.body: ; preds = %for.body, %for.body.preheader 77 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 78 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 79 %div = sdiv i32 %sum.065, %0 80 %lsr.iv.next = add i32 %lsr.iv, -1 81 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 82 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 83 } 84 85 define i32 @load_not_safe_to_move_consecutive_call_use(i32 %n) { 86 entry: 87 %cmp63 = icmp sgt i32 %n, 0 88 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup 89 90 for.body.preheader: ; preds = %entry 91 %0 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0), align 4 92 %call0 = tail call i32 @use(i32 %0) 93 br label %for.body 94 95 for.cond.cleanup: ; preds = %for.body, %entry 96 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 97 ret i32 %sum.0.lcssa 98 99 for.body: ; preds = %for.body, %for.body.preheader 100 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 101 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 102 %div = sdiv i32 %sum.065, %0 103 %lsr.iv.next = add i32 %lsr.iv, -1 104 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 105 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 106 } 107 108 define i32 @cant_sink_use_outside_loop(i32 %n) { 109 entry: 110 %cmp63 = icmp sgt i32 %n, 0 111 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup 112 113 for.body.preheader: ; preds = %entry 114 %0 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0), align 4 115 br label %for.body 116 117 for.cond.cleanup: ; preds = %for.body, %entry 118 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 119 %use.outside.loop = phi i32 [ 0, %entry ], [ %0, %for.body ] 120 %call = tail call i32 @use(i32 %use.outside.loop) 121 ret i32 %sum.0.lcssa 122 123 for.body: ; preds = %for.body, %for.body.preheader 124 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 125 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 126 %div = sdiv i32 %sum.065, %sum.065 127 %lsr.iv.next = add i32 %lsr.iv, -1 128 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 129 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 130 } 131 132 define i32 @use_is_not_a_copy(i32 %n) { 133 entry: 134 %cmp63 = icmp sgt i32 %n, 0 135 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup 136 137 for.body.preheader: ; preds = %entry 138 %0 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0), align 4 139 br label %for.body 140 141 for.cond.cleanup: ; preds = %for.body, %entry 142 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 143 ret i32 %sum.0.lcssa 144 145 for.body: ; preds = %for.body, %for.body.preheader 146 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 147 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 148 %div = sdiv i32 %sum.065, %0 149 %lsr.iv.next = add i32 %lsr.iv, -1 150 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 151 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 152 } 153 154 define dso_local void @sink_add(i32* noalias nocapture readonly %read, i32* noalias nocapture %write, i32 %n) local_unnamed_addr #0 { 155 entry: 156 %0 = load i32, i32* %read, align 4, !tbaa !6 157 %cmp10 = icmp sgt i32 %n, 0 158 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup 159 160 for.body.preheader: ; preds = %entry 161 %1 = add i32 %0, 42 162 br label %for.body 163 164 for.cond.cleanup: ; preds = %for.body, %entry 165 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 166 store i32 %sum.0.lcssa, i32* %write, align 4, !tbaa !6 167 ret void 168 169 for.body: ; preds = %for.body.preheader, %for.body 170 %lsr.iv1 = phi i32 [ %1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ] 171 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 172 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 173 %div = sdiv i32 %sum.011, %lsr.iv1 174 %lsr.iv.next = add i32 %lsr.iv, -1 175 %lsr.iv.next2 = add i32 %lsr.iv1, 1 176 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 177 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 178 } 179 180 define dso_local void @store_after_add(i32* noalias nocapture readonly %read, i32* noalias nocapture %write, i32* nocapture %store, i32 %n) local_unnamed_addr #0 { 181 entry: 182 %0 = load i32, i32* %read, align 4, !tbaa !6 183 %cmp10 = icmp sgt i32 %n, 0 184 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup 185 186 for.body.preheader: ; preds = %entry 187 %1 = add i32 %0, 42 188 store i32 43, i32* %store, align 4, !tbaa !6 189 br label %for.body 190 191 for.cond.cleanup: ; preds = %for.body, %entry 192 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 193 store i32 %sum.0.lcssa, i32* %write, align 4, !tbaa !6 194 ret void 195 196 for.body: ; preds = %for.body.preheader, %for.body 197 %lsr.iv1 = phi i32 [ %1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ] 198 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 199 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 200 %div = sdiv i32 %sum.011, %lsr.iv1 201 %lsr.iv.next = add i32 %lsr.iv, -1 202 %lsr.iv.next2 = add i32 %lsr.iv1, 1 203 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 204 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !10 205 } 206 207 define dso_local void @aliased_store_after_add(i32* noalias nocapture readonly %read, i32* noalias nocapture %write, i32* nocapture %store, i32 %n) local_unnamed_addr #0 { 208 entry: 209 %0 = load i32, i32* %read, align 4, !tbaa !6 210 %cmp10 = icmp sgt i32 %n, 0 211 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup 212 213 for.body.preheader: ; preds = %entry 214 %1 = add i32 %0, 42 215 store i32 43, i32* %read, align 4, !tbaa !6 216 br label %for.body 217 218 for.cond.cleanup: ; preds = %for.body, %entry 219 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ] 220 store i32 %sum.0.lcssa, i32* %write, align 4, !tbaa !6 221 ret void 222 223 for.body: ; preds = %for.body.preheader, %for.body 224 %lsr.iv1 = phi i32 [ %1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ] 225 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ] 226 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ] 227 %div = sdiv i32 %sum.011, %lsr.iv1 228 %lsr.iv.next = add i32 %lsr.iv, -1 229 %lsr.iv.next2 = add i32 %lsr.iv1, 1 230 %exitcond.not = icmp eq i32 %lsr.iv.next, 0 231 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !10 232 } 233 234 235 declare i32 @use(i32) 236 declare void @_Z6assignPj(i32*) 237 238 !6 = !{!7, !7, i64 0} 239 !7 = !{!"int", !8, i64 0} 240 !8 = !{!"omnipotent char", !9, i64 0} 241 !9 = !{!"Simple C/C++ TBAA"} 242 !10 = distinct !{!10, !11} 243 !11 = !{!"llvm.loop.mustprogress"} 244 245... 246--- 247name: cant_sink_adds_call_in_block 248alignment: 4 249exposesReturnsTwice: false 250legalized: false 251regBankSelected: false 252selected: false 253failedISel: false 254tracksRegLiveness: true 255hasWinCFI: false 256registers: 257 - { id: 0, class: gpr64all, preferred-register: '' } 258 - { id: 1, class: gpr64all, preferred-register: '' } 259 - { id: 2, class: gpr64all, preferred-register: '' } 260 - { id: 3, class: gpr64all, preferred-register: '' } 261 - { id: 4, class: gpr64all, preferred-register: '' } 262 - { id: 5, class: gpr64all, preferred-register: '' } 263 - { id: 6, class: gpr64sp, preferred-register: '' } 264 - { id: 7, class: gpr64all, preferred-register: '' } 265 - { id: 8, class: gpr64common, preferred-register: '' } 266 - { id: 9, class: gpr64common, preferred-register: '' } 267 - { id: 10, class: gpr64sp, preferred-register: '' } 268 - { id: 11, class: gpr64sp, preferred-register: '' } 269 - { id: 12, class: gpr64sp, preferred-register: '' } 270 - { id: 13, class: gpr64sp, preferred-register: '' } 271 - { id: 14, class: gpr64sp, preferred-register: '' } 272 - { id: 15, class: gpr64sp, preferred-register: '' } 273 - { id: 16, class: gpr64, preferred-register: '' } 274 - { id: 17, class: gpr32, preferred-register: '' } 275 - { id: 18, class: gpr32sp, preferred-register: '' } 276 - { id: 19, class: gpr32, preferred-register: '' } 277 - { id: 20, class: gpr64common, preferred-register: '' } 278 - { id: 21, class: gpr64, preferred-register: '' } 279 - { id: 22, class: gpr64sp, preferred-register: '' } 280 - { id: 23, class: gpr64sp, preferred-register: '' } 281liveins: 282 - { reg: '$x0', virtual-reg: '%8' } 283 - { reg: '$x1', virtual-reg: '%9' } 284frameInfo: 285 isFrameAddressTaken: false 286 isReturnAddressTaken: false 287 hasStackMap: false 288 hasPatchPoint: false 289 stackSize: 0 290 offsetAdjustment: 0 291 maxAlignment: 1 292 adjustsStack: true 293 hasCalls: true 294 stackProtector: '' 295 maxCallFrameSize: 0 296 cvBytesOfCalleeSavedRegisters: 0 297 hasOpaqueSPAdjustment: false 298 hasVAStart: false 299 hasMustTailInVarArgFunc: false 300 localFrameSize: 0 301 savePoint: '' 302 restorePoint: '' 303fixedStack: [] 304stack: [] 305callSites: [] 306debugValueSubstitutions: [] 307constants: [] 308machineFunctionInfo: {} 309jumpTable: 310 kind: block-address 311 entries: 312 - id: 0 313 blocks: [ '%bb.2', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', 314 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.3', '%bb.8', 315 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', 316 '%bb.8', '%bb.8', '%bb.4', '%bb.8', '%bb.8', '%bb.8', 317 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', 318 '%bb.5', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', 319 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.6', '%bb.8', 320 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', 321 '%bb.8', '%bb.8', '%bb.7' ] 322body: | 323 ; CHECK-LABEL: name: cant_sink_adds_call_in_block 324 ; CHECK: bb.0 (%ir-block.0): 325 ; CHECK: successors: %bb.1(0x80000000) 326 ; CHECK: liveins: $x0, $x1 327 ; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $x1 328 ; CHECK: [[COPY1:%[0-9]+]]:gpr64common = COPY $x0 329 ; CHECK: [[ADDXri:%[0-9]+]]:gpr64sp = nuw ADDXri [[COPY]], 4, 0 330 ; CHECK: [[COPY2:%[0-9]+]]:gpr64all = COPY [[ADDXri]] 331 ; CHECK: [[ADDXri1:%[0-9]+]]:gpr64sp = nuw ADDXri [[COPY]], 8, 0 332 ; CHECK: [[COPY3:%[0-9]+]]:gpr64all = COPY [[ADDXri1]] 333 ; CHECK: [[ADDXri2:%[0-9]+]]:gpr64sp = nuw ADDXri [[COPY]], 12, 0 334 ; CHECK: [[COPY4:%[0-9]+]]:gpr64all = COPY [[ADDXri2]] 335 ; CHECK: [[ADDXri3:%[0-9]+]]:gpr64sp = nuw ADDXri [[COPY]], 16, 0 336 ; CHECK: [[COPY5:%[0-9]+]]:gpr64all = COPY [[ADDXri3]] 337 ; CHECK: [[ADDXri4:%[0-9]+]]:gpr64sp = nuw ADDXri [[COPY]], 20, 0 338 ; CHECK: [[COPY6:%[0-9]+]]:gpr64all = COPY [[ADDXri4]] 339 ; CHECK: [[ADDXri5:%[0-9]+]]:gpr64sp = ADDXri [[COPY1]], 1, 0 340 ; CHECK: [[COPY7:%[0-9]+]]:gpr64all = COPY [[ADDXri5]] 341 ; CHECK: [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0 342 ; CHECK: bb.1..backedge: 343 ; CHECK: successors: %bb.9(0x09249249), %bb.2(0x76db6db7) 344 ; CHECK: [[PHI:%[0-9]+]]:gpr64sp = PHI [[COPY7]], %bb.0, %7, %bb.9 345 ; CHECK: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[PHI]], 0 :: (load (s8) from %ir.lsr.iv) 346 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, killed [[LDRBBui]], %subreg.sub_32 347 ; CHECK: [[COPY8:%[0-9]+]]:gpr32sp = COPY [[SUBREG_TO_REG]].sub_32 348 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[COPY8]], 50, 0, implicit-def $nzcv 349 ; CHECK: Bcc 8, %bb.9, implicit $nzcv 350 ; CHECK: bb.2..backedge: 351 ; CHECK: successors: %bb.3(0x13b13b14), %bb.9(0x09d89d8a), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14), %bb.8(0x13b13b14) 352 ; CHECK: early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0 353 ; CHECK: BR killed %21 354 ; CHECK: bb.3 (%ir-block.8): 355 ; CHECK: successors: %bb.9(0x80000000) 356 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 357 ; CHECK: $x0 = COPY [[COPY]] 358 ; CHECK: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 359 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 360 ; CHECK: B %bb.9 361 ; CHECK: bb.4 (%ir-block.10): 362 ; CHECK: successors: %bb.9(0x80000000) 363 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 364 ; CHECK: $x0 = COPY [[COPY2]] 365 ; CHECK: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 366 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 367 ; CHECK: B %bb.9 368 ; CHECK: bb.5 (%ir-block.11): 369 ; CHECK: successors: %bb.9(0x80000000) 370 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 371 ; CHECK: $x0 = COPY [[COPY3]] 372 ; CHECK: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 373 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 374 ; CHECK: B %bb.9 375 ; CHECK: bb.6 (%ir-block.12): 376 ; CHECK: successors: %bb.9(0x80000000) 377 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 378 ; CHECK: $x0 = COPY [[COPY4]] 379 ; CHECK: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 380 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 381 ; CHECK: B %bb.9 382 ; CHECK: bb.7 (%ir-block.13): 383 ; CHECK: successors: %bb.9(0x80000000) 384 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 385 ; CHECK: $x0 = COPY [[COPY5]] 386 ; CHECK: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 387 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 388 ; CHECK: B %bb.9 389 ; CHECK: bb.8 (%ir-block.14): 390 ; CHECK: successors: %bb.9(0x80000000) 391 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 392 ; CHECK: $x0 = COPY [[COPY6]] 393 ; CHECK: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 394 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 395 ; CHECK: bb.9..backedge.backedge: 396 ; CHECK: successors: %bb.1(0x80000000) 397 ; CHECK: [[ADDXri6:%[0-9]+]]:gpr64sp = ADDXri [[PHI]], 1, 0 398 ; CHECK: [[COPY9:%[0-9]+]]:gpr64all = COPY [[ADDXri6]] 399 ; CHECK: B %bb.1 400 bb.0 (%ir-block.0): 401 successors: %bb.1(0x80000000) 402 liveins: $x0, $x1 403 404 %9:gpr64common = COPY $x1 405 %8:gpr64common = COPY $x0 406 %10:gpr64sp = nuw ADDXri %9, 4, 0 407 %0:gpr64all = COPY %10 408 %11:gpr64sp = nuw ADDXri %9, 8, 0 409 %1:gpr64all = COPY %11 410 %12:gpr64sp = nuw ADDXri %9, 12, 0 411 %2:gpr64all = COPY %12 412 %13:gpr64sp = nuw ADDXri %9, 16, 0 413 %3:gpr64all = COPY %13 414 %14:gpr64sp = nuw ADDXri %9, 20, 0 415 %4:gpr64all = COPY %14 416 %15:gpr64sp = ADDXri %8, 1, 0 417 %5:gpr64all = COPY %15 418 %20:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0 419 420 bb.1..backedge: 421 successors: %bb.8(0x09249249), %bb.9(0x76db6db7) 422 423 %6:gpr64sp = PHI %5, %bb.0, %7, %bb.8 424 %17:gpr32 = LDRBBui %6, 0 :: (load (s8) from %ir.lsr.iv) 425 %16:gpr64 = SUBREG_TO_REG 0, killed %17, %subreg.sub_32 426 %18:gpr32sp = COPY %16.sub_32 427 %19:gpr32 = SUBSWri killed %18, 50, 0, implicit-def $nzcv 428 Bcc 8, %bb.8, implicit $nzcv 429 430 bb.9..backedge: 431 successors: %bb.2(0x13b13b14), %bb.8(0x09d89d8a), %bb.3(0x13b13b14), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14) 432 433 early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 %20, %16, %jump-table.0 434 BR killed %21 435 436 bb.2 (%ir-block.8): 437 successors: %bb.8(0x80000000) 438 439 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 440 $x0 = COPY %9 441 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 442 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 443 B %bb.8 444 445 bb.3 (%ir-block.10): 446 successors: %bb.8(0x80000000) 447 448 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 449 $x0 = COPY %0 450 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 451 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 452 B %bb.8 453 454 bb.4 (%ir-block.11): 455 successors: %bb.8(0x80000000) 456 457 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 458 $x0 = COPY %1 459 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 460 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 461 B %bb.8 462 463 bb.5 (%ir-block.12): 464 successors: %bb.8(0x80000000) 465 466 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 467 $x0 = COPY %2 468 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 469 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 470 B %bb.8 471 472 bb.6 (%ir-block.13): 473 successors: %bb.8(0x80000000) 474 475 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 476 $x0 = COPY %3 477 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 478 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 479 B %bb.8 480 481 bb.7 (%ir-block.14): 482 successors: %bb.8(0x80000000) 483 484 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 485 $x0 = COPY %4 486 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp 487 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 488 489 bb.8..backedge.backedge: 490 successors: %bb.1(0x80000000) 491 492 %23:gpr64sp = ADDXri %6, 1, 0 493 %7:gpr64all = COPY %23 494 B %bb.1 495 496... 497--- 498name: load_not_safe_to_move_consecutive_call 499alignment: 4 500exposesReturnsTwice: false 501legalized: false 502regBankSelected: false 503selected: false 504failedISel: false 505tracksRegLiveness: true 506hasWinCFI: false 507registers: 508 - { id: 0, class: gpr32, preferred-register: '' } 509 - { id: 1, class: gpr32all, preferred-register: '' } 510 - { id: 2, class: gpr32sp, preferred-register: '' } 511 - { id: 3, class: gpr32, preferred-register: '' } 512 - { id: 4, class: gpr32all, preferred-register: '' } 513 - { id: 5, class: gpr32all, preferred-register: '' } 514 - { id: 6, class: gpr32common, preferred-register: '' } 515 - { id: 7, class: gpr32, preferred-register: '' } 516 - { id: 8, class: gpr64common, preferred-register: '' } 517 - { id: 9, class: gpr32, preferred-register: '' } 518 - { id: 10, class: gpr32all, preferred-register: '' } 519 - { id: 11, class: gpr32, preferred-register: '' } 520 - { id: 12, class: gpr32, preferred-register: '' } 521liveins: 522 - { reg: '$w0', virtual-reg: '%6' } 523frameInfo: 524 isFrameAddressTaken: false 525 isReturnAddressTaken: false 526 hasStackMap: false 527 hasPatchPoint: false 528 stackSize: 0 529 offsetAdjustment: 0 530 maxAlignment: 1 531 adjustsStack: true 532 hasCalls: true 533 stackProtector: '' 534 maxCallFrameSize: 0 535 cvBytesOfCalleeSavedRegisters: 0 536 hasOpaqueSPAdjustment: false 537 hasVAStart: false 538 hasMustTailInVarArgFunc: false 539 localFrameSize: 0 540 savePoint: '' 541 restorePoint: '' 542fixedStack: [] 543stack: [] 544callSites: [] 545debugValueSubstitutions: [] 546constants: [] 547machineFunctionInfo: {} 548body: | 549 ; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call 550 ; CHECK: bb.0.entry: 551 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000) 552 ; CHECK: liveins: $w0 553 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w0 554 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 555 ; CHECK: Bcc 11, %bb.2, implicit $nzcv 556 ; CHECK: B %bb.1 557 ; CHECK: bb.1.for.body.preheader: 558 ; CHECK: successors: %bb.3(0x80000000) 559 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A 560 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 561 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 562 ; CHECK: $w0 = COPY [[COPY]] 563 ; CHECK: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 564 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 565 ; CHECK: B %bb.3 566 ; CHECK: bb.2.for.cond.cleanup: 567 ; CHECK: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3 568 ; CHECK: $w0 = COPY [[PHI]] 569 ; CHECK: RET_ReallyLR implicit $w0 570 ; CHECK: bb.3.for.body: 571 ; CHECK: successors: %bb.2(0x04000000), %bb.3(0x7c000000) 572 ; CHECK: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3 573 ; CHECK: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3 574 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]] 575 ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]] 576 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv 577 ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 578 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 579 ; CHECK: B %bb.3 580 bb.0.entry: 581 successors: %bb.1(0x50000000), %bb.2(0x30000000) 582 liveins: $w0 583 584 %6:gpr32common = COPY $w0 585 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv 586 Bcc 11, %bb.2, implicit $nzcv 587 B %bb.1 588 589 bb.1.for.body.preheader: 590 successors: %bb.3(0x80000000) 591 592 %8:gpr64common = ADRP target-flags(aarch64-page) @A 593 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 594 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 595 $w0 = COPY %6 596 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 597 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 598 B %bb.3 599 600 bb.2.for.cond.cleanup: 601 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3 602 $w0 = COPY %1 603 RET_ReallyLR implicit $w0 604 605 bb.3.for.body: 606 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 607 608 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3 609 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3 610 %11:gpr32 = SDIVWr %3, %9 611 %4:gpr32all = COPY %11 612 %12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv 613 %5:gpr32all = COPY %12 614 Bcc 0, %bb.2, implicit $nzcv 615 B %bb.3 616 617... 618--- 619name: load_not_safe_to_move_consecutive_call_use 620alignment: 4 621exposesReturnsTwice: false 622legalized: false 623regBankSelected: false 624selected: false 625failedISel: false 626tracksRegLiveness: true 627hasWinCFI: false 628registers: 629 - { id: 0, class: gpr32, preferred-register: '' } 630 - { id: 1, class: gpr32all, preferred-register: '' } 631 - { id: 2, class: gpr32sp, preferred-register: '' } 632 - { id: 3, class: gpr32, preferred-register: '' } 633 - { id: 4, class: gpr32all, preferred-register: '' } 634 - { id: 5, class: gpr32all, preferred-register: '' } 635 - { id: 6, class: gpr32common, preferred-register: '' } 636 - { id: 7, class: gpr32, preferred-register: '' } 637 - { id: 8, class: gpr64common, preferred-register: '' } 638 - { id: 9, class: gpr32, preferred-register: '' } 639 - { id: 10, class: gpr32all, preferred-register: '' } 640 - { id: 11, class: gpr32, preferred-register: '' } 641 - { id: 12, class: gpr32, preferred-register: '' } 642liveins: 643 - { reg: '$w0', virtual-reg: '%6' } 644frameInfo: 645 isFrameAddressTaken: false 646 isReturnAddressTaken: false 647 hasStackMap: false 648 hasPatchPoint: false 649 stackSize: 0 650 offsetAdjustment: 0 651 maxAlignment: 1 652 adjustsStack: true 653 hasCalls: true 654 stackProtector: '' 655 maxCallFrameSize: 0 656 cvBytesOfCalleeSavedRegisters: 0 657 hasOpaqueSPAdjustment: false 658 hasVAStart: false 659 hasMustTailInVarArgFunc: false 660 localFrameSize: 0 661 savePoint: '' 662 restorePoint: '' 663fixedStack: [] 664stack: [] 665callSites: [] 666debugValueSubstitutions: [] 667constants: [] 668machineFunctionInfo: {} 669body: | 670 ; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call_use 671 ; CHECK: bb.0.entry: 672 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000) 673 ; CHECK: liveins: $w0 674 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w0 675 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 676 ; CHECK: Bcc 11, %bb.2, implicit $nzcv 677 ; CHECK: B %bb.1 678 ; CHECK: bb.1.for.body.preheader: 679 ; CHECK: successors: %bb.3(0x80000000) 680 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A 681 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 682 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 683 ; CHECK: $w0 = COPY [[LDRWui]] 684 ; CHECK: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 685 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 686 ; CHECK: B %bb.3 687 ; CHECK: bb.2.for.cond.cleanup: 688 ; CHECK: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3 689 ; CHECK: $w0 = COPY [[PHI]] 690 ; CHECK: RET_ReallyLR implicit $w0 691 ; CHECK: bb.3.for.body: 692 ; CHECK: successors: %bb.2(0x04000000), %bb.3(0x7c000000) 693 ; CHECK: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3 694 ; CHECK: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3 695 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]] 696 ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]] 697 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv 698 ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 699 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 700 ; CHECK: B %bb.3 701 bb.0.entry: 702 successors: %bb.1(0x50000000), %bb.2(0x30000000) 703 liveins: $w0 704 705 %6:gpr32common = COPY $w0 706 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv 707 Bcc 11, %bb.2, implicit $nzcv 708 B %bb.1 709 710 bb.1.for.body.preheader: 711 successors: %bb.3(0x80000000) 712 713 %8:gpr64common = ADRP target-flags(aarch64-page) @A 714 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 715 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 716 $w0 = COPY %9 717 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 718 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 719 B %bb.3 720 721 bb.2.for.cond.cleanup: 722 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3 723 $w0 = COPY %1 724 RET_ReallyLR implicit $w0 725 726 bb.3.for.body: 727 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 728 729 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3 730 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3 731 %11:gpr32 = SDIVWr %3, %9 732 %4:gpr32all = COPY %11 733 %12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv 734 %5:gpr32all = COPY %12 735 Bcc 0, %bb.2, implicit $nzcv 736 B %bb.3 737 738... 739--- 740name: cant_sink_use_outside_loop 741alignment: 4 742exposesReturnsTwice: false 743legalized: false 744regBankSelected: false 745selected: false 746failedISel: false 747tracksRegLiveness: true 748hasWinCFI: false 749registers: 750 - { id: 0, class: gpr32all, preferred-register: '' } 751 - { id: 1, class: gpr32all, preferred-register: '' } 752 - { id: 2, class: gpr32all, preferred-register: '' } 753 - { id: 3, class: gpr32sp, preferred-register: '' } 754 - { id: 4, class: gpr32all, preferred-register: '' } 755 - { id: 5, class: gpr32all, preferred-register: '' } 756 - { id: 6, class: gpr32all, preferred-register: '' } 757 - { id: 7, class: gpr32common, preferred-register: '' } 758 - { id: 8, class: gpr32all, preferred-register: '' } 759 - { id: 9, class: gpr32all, preferred-register: '' } 760 - { id: 10, class: gpr32, preferred-register: '' } 761 - { id: 11, class: gpr64common, preferred-register: '' } 762 - { id: 12, class: gpr32, preferred-register: '' } 763 - { id: 13, class: gpr32, preferred-register: '' } 764 - { id: 14, class: gpr32, preferred-register: '' } 765 - { id: 15, class: gpr32all, preferred-register: '' } 766liveins: 767 - { reg: '$w0', virtual-reg: '%7' } 768frameInfo: 769 isFrameAddressTaken: false 770 isReturnAddressTaken: false 771 hasStackMap: false 772 hasPatchPoint: false 773 stackSize: 0 774 offsetAdjustment: 0 775 maxAlignment: 1 776 adjustsStack: true 777 hasCalls: true 778 stackProtector: '' 779 maxCallFrameSize: 0 780 cvBytesOfCalleeSavedRegisters: 0 781 hasOpaqueSPAdjustment: false 782 hasVAStart: false 783 hasMustTailInVarArgFunc: false 784 localFrameSize: 0 785 savePoint: '' 786 restorePoint: '' 787fixedStack: [] 788stack: [] 789callSites: [] 790debugValueSubstitutions: [] 791constants: [] 792machineFunctionInfo: {} 793body: | 794 ; CHECK-LABEL: name: cant_sink_use_outside_loop 795 ; CHECK: bb.0.entry: 796 ; CHECK: successors: %bb.1(0x50000000), %bb.4(0x30000000) 797 ; CHECK: liveins: $w0 798 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w0 799 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 800 ; CHECK: Bcc 10, %bb.1, implicit $nzcv 801 ; CHECK: bb.4: 802 ; CHECK: successors: %bb.2(0x80000000) 803 ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY $wzr 804 ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]] 805 ; CHECK: B %bb.2 806 ; CHECK: bb.1.for.body.preheader: 807 ; CHECK: successors: %bb.3(0x80000000) 808 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A 809 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 810 ; CHECK: [[COPY3:%[0-9]+]]:gpr32all = COPY [[LDRWui]] 811 ; CHECK: B %bb.3 812 ; CHECK: bb.2.for.cond.cleanup: 813 ; CHECK: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.4, %5, %bb.5 814 ; CHECK: [[PHI1:%[0-9]+]]:gpr32all = PHI [[COPY2]], %bb.4, [[COPY3]], %bb.5 815 ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 816 ; CHECK: $w0 = COPY [[PHI1]] 817 ; CHECK: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 818 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 819 ; CHECK: $w0 = COPY [[PHI]] 820 ; CHECK: RET_ReallyLR implicit $w0 821 ; CHECK: bb.3.for.body: 822 ; CHECK: successors: %bb.5(0x04000000), %bb.3(0x7c000000) 823 ; CHECK: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %6, %bb.3 824 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv 825 ; CHECK: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 826 ; CHECK: Bcc 1, %bb.3, implicit $nzcv 827 ; CHECK: bb.5: 828 ; CHECK: successors: %bb.2(0x80000000) 829 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1 830 ; CHECK: [[COPY5:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]] 831 ; CHECK: B %bb.2 832 bb.0.entry: 833 successors: %bb.1(0x50000000), %bb.2(0x30000000) 834 liveins: $w0 835 836 %7:gpr32common = COPY $w0 837 %9:gpr32all = COPY $wzr 838 %8:gpr32all = COPY %9 839 %10:gpr32 = SUBSWri %7, 1, 0, implicit-def $nzcv 840 Bcc 11, %bb.2, implicit $nzcv 841 B %bb.1 842 843 bb.1.for.body.preheader: 844 successors: %bb.3(0x80000000) 845 846 %11:gpr64common = ADRP target-flags(aarch64-page) @A 847 %12:gpr32 = LDRWui killed %11, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 848 %0:gpr32all = COPY %12 849 B %bb.3 850 851 bb.2.for.cond.cleanup: 852 %1:gpr32all = PHI %7, %bb.0, %5, %bb.3 853 %2:gpr32all = PHI %8, %bb.0, %0, %bb.3 854 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp 855 $w0 = COPY %2 856 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0 857 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp 858 $w0 = COPY %1 859 RET_ReallyLR implicit $w0 860 861 bb.3.for.body: 862 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 863 864 %3:gpr32sp = PHI %7, %bb.1, %6, %bb.3 865 %13:gpr32 = MOVi32imm 1 866 %5:gpr32all = COPY %13 867 %14:gpr32 = SUBSWri %3, 1, 0, implicit-def $nzcv 868 %6:gpr32all = COPY %14 869 Bcc 0, %bb.2, implicit $nzcv 870 B %bb.3 871 872... 873--- 874name: use_is_not_a_copy 875alignment: 4 876exposesReturnsTwice: false 877legalized: false 878regBankSelected: false 879selected: false 880failedISel: false 881tracksRegLiveness: true 882hasWinCFI: false 883registers: 884 - { id: 0, class: gpr32, preferred-register: '' } 885 - { id: 1, class: gpr32all, preferred-register: '' } 886 - { id: 2, class: gpr32sp, preferred-register: '' } 887 - { id: 3, class: gpr32, preferred-register: '' } 888 - { id: 4, class: gpr32all, preferred-register: '' } 889 - { id: 5, class: gpr32all, preferred-register: '' } 890 - { id: 6, class: gpr32common, preferred-register: '' } 891 - { id: 7, class: gpr32, preferred-register: '' } 892 - { id: 8, class: gpr64common, preferred-register: '' } 893 - { id: 9, class: gpr32, preferred-register: '' } 894 - { id: 10, class: gpr32, preferred-register: '' } 895 - { id: 11, class: gpr32, preferred-register: '' } 896liveins: 897 - { reg: '$w0', virtual-reg: '%6' } 898frameInfo: 899 isFrameAddressTaken: false 900 isReturnAddressTaken: false 901 hasStackMap: false 902 hasPatchPoint: false 903 stackSize: 0 904 offsetAdjustment: 0 905 maxAlignment: 1 906 adjustsStack: false 907 hasCalls: false 908 stackProtector: '' 909 maxCallFrameSize: 0 910 cvBytesOfCalleeSavedRegisters: 0 911 hasOpaqueSPAdjustment: false 912 hasVAStart: false 913 hasMustTailInVarArgFunc: false 914 localFrameSize: 0 915 savePoint: '' 916 restorePoint: '' 917fixedStack: [] 918stack: [] 919callSites: [] 920debugValueSubstitutions: [] 921constants: [] 922machineFunctionInfo: {} 923body: | 924 ; CHECK-LABEL: name: use_is_not_a_copy 925 ; CHECK: bb.0.entry: 926 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000) 927 ; CHECK: liveins: $w0 928 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w0 929 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 930 ; CHECK: Bcc 11, %bb.2, implicit $nzcv 931 ; CHECK: B %bb.1 932 ; CHECK: bb.1.for.body.preheader: 933 ; CHECK: successors: %bb.3(0x80000000) 934 ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A 935 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 936 ; CHECK: B %bb.3 937 ; CHECK: bb.2.for.cond.cleanup: 938 ; CHECK: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3 939 ; CHECK: $w0 = COPY [[PHI]] 940 ; CHECK: RET_ReallyLR implicit $w0 941 ; CHECK: bb.3.for.body: 942 ; CHECK: successors: %bb.2(0x04000000), %bb.3(0x7c000000) 943 ; CHECK: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3 944 ; CHECK: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3 945 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]] 946 ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]] 947 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv 948 ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 949 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 950 ; CHECK: B %bb.3 951 bb.0.entry: 952 successors: %bb.1(0x50000000), %bb.2(0x30000000) 953 liveins: $w0 954 955 %6:gpr32common = COPY $w0 956 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv 957 Bcc 11, %bb.2, implicit $nzcv 958 B %bb.1 959 960 bb.1.for.body.preheader: 961 successors: %bb.3(0x80000000) 962 963 %8:gpr64common = ADRP target-flags(aarch64-page) @A 964 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from `i32* getelementptr inbounds ([100 x i32], [100 x i32]* @A, i64 0, i64 0)`) 965 B %bb.3 966 967 bb.2.for.cond.cleanup: 968 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3 969 $w0 = COPY %1 970 RET_ReallyLR implicit $w0 971 972 bb.3.for.body: 973 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 974 975 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3 976 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3 977 %10:gpr32 = SDIVWr %3, %9 978 %4:gpr32all = COPY %10 979 %11:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv 980 %5:gpr32all = COPY %11 981 Bcc 0, %bb.2, implicit $nzcv 982 B %bb.3 983 984... 985--- 986name: sink_add 987alignment: 16 988exposesReturnsTwice: false 989legalized: false 990regBankSelected: false 991selected: false 992failedISel: false 993tracksRegLiveness: true 994hasWinCFI: false 995registers: 996 - { id: 0, class: gpr32sp, preferred-register: '' } 997 - { id: 1, class: gpr32all, preferred-register: '' } 998 - { id: 2, class: gpr32, preferred-register: '' } 999 - { id: 3, class: gpr32common, preferred-register: '' } 1000 - { id: 4, class: gpr32sp, preferred-register: '' } 1001 - { id: 5, class: gpr32, preferred-register: '' } 1002 - { id: 6, class: gpr32all, preferred-register: '' } 1003 - { id: 7, class: gpr32all, preferred-register: '' } 1004 - { id: 8, class: gpr32all, preferred-register: '' } 1005 - { id: 9, class: gpr64common, preferred-register: '' } 1006 - { id: 10, class: gpr64common, preferred-register: '' } 1007 - { id: 11, class: gpr32common, preferred-register: '' } 1008 - { id: 12, class: gpr32common, preferred-register: '' } 1009 - { id: 13, class: gpr32, preferred-register: '' } 1010 - { id: 14, class: gpr32sp, preferred-register: '' } 1011 - { id: 15, class: gpr32, preferred-register: '' } 1012 - { id: 16, class: gpr32, preferred-register: '' } 1013 - { id: 17, class: gpr32sp, preferred-register: '' } 1014liveins: 1015 - { reg: '$x0', virtual-reg: '%9' } 1016 - { reg: '$x1', virtual-reg: '%10' } 1017 - { reg: '$w2', virtual-reg: '%11' } 1018frameInfo: 1019 isFrameAddressTaken: false 1020 isReturnAddressTaken: false 1021 hasStackMap: false 1022 hasPatchPoint: false 1023 stackSize: 0 1024 offsetAdjustment: 0 1025 maxAlignment: 1 1026 adjustsStack: false 1027 hasCalls: false 1028 stackProtector: '' 1029 maxCallFrameSize: 0 1030 cvBytesOfCalleeSavedRegisters: 0 1031 hasOpaqueSPAdjustment: false 1032 hasVAStart: false 1033 hasMustTailInVarArgFunc: false 1034 localFrameSize: 0 1035 savePoint: '' 1036 restorePoint: '' 1037fixedStack: [] 1038stack: [] 1039callSites: [] 1040debugValueSubstitutions: [] 1041constants: [] 1042machineFunctionInfo: {} 1043body: | 1044 ; CHECK-LABEL: name: sink_add 1045 ; CHECK: bb.0.entry: 1046 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000) 1047 ; CHECK: liveins: $x0, $x1, $w2 1048 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w2 1049 ; CHECK: [[COPY1:%[0-9]+]]:gpr64common = COPY $x1 1050 ; CHECK: [[COPY2:%[0-9]+]]:gpr64common = COPY $x0 1051 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 1052 ; CHECK: Bcc 11, %bb.2, implicit $nzcv 1053 ; CHECK: B %bb.1 1054 ; CHECK: bb.1.for.body.preheader: 1055 ; CHECK: successors: %bb.3(0x80000000) 1056 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY2]], 0 :: (load (s32) from %ir.read, !tbaa !0) 1057 ; CHECK: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0 1058 ; CHECK: [[COPY3:%[0-9]+]]:gpr32all = COPY [[ADDWri]] 1059 ; CHECK: B %bb.3 1060 ; CHECK: bb.2.for.cond.cleanup: 1061 ; CHECK: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3 1062 ; CHECK: STRWui [[PHI]], [[COPY1]], 0 :: (store (s32) into %ir.write, !tbaa !0) 1063 ; CHECK: RET_ReallyLR 1064 ; CHECK: bb.3.for.body: 1065 ; CHECK: successors: %bb.2(0x04000000), %bb.3(0x7c000000) 1066 ; CHECK: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY3]], %bb.1, %8, %bb.3 1067 ; CHECK: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3 1068 ; CHECK: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3 1069 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]] 1070 ; CHECK: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SDIVWr]] 1071 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv 1072 ; CHECK: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 1073 ; CHECK: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0 1074 ; CHECK: [[COPY6:%[0-9]+]]:gpr32all = COPY [[ADDWri1]] 1075 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 1076 ; CHECK: B %bb.3 1077 bb.0.entry: 1078 successors: %bb.1(0x50000000), %bb.2(0x30000000) 1079 liveins: $x0, $x1, $w2 1080 1081 %11:gpr32common = COPY $w2 1082 %10:gpr64common = COPY $x1 1083 %9:gpr64common = COPY $x0 1084 %12:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !6) 1085 %13:gpr32 = SUBSWri %11, 1, 0, implicit-def $nzcv 1086 Bcc 11, %bb.2, implicit $nzcv 1087 B %bb.1 1088 1089 bb.1.for.body.preheader: 1090 successors: %bb.3(0x80000000) 1091 1092 %14:gpr32sp = ADDWri %12, 42, 0 1093 %1:gpr32all = COPY %14 1094 B %bb.3 1095 1096 bb.2.for.cond.cleanup: 1097 %2:gpr32 = PHI %11, %bb.0, %6, %bb.3 1098 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !6) 1099 RET_ReallyLR 1100 1101 bb.3.for.body: 1102 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 1103 1104 %3:gpr32common = PHI %1, %bb.1, %8, %bb.3 1105 %4:gpr32sp = PHI %11, %bb.1, %7, %bb.3 1106 %5:gpr32 = PHI %11, %bb.1, %6, %bb.3 1107 %15:gpr32 = SDIVWr %5, %3 1108 %6:gpr32all = COPY %15 1109 %16:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv 1110 %7:gpr32all = COPY %16 1111 %17:gpr32sp = ADDWri %3, 1, 0 1112 %8:gpr32all = COPY %17 1113 Bcc 0, %bb.2, implicit $nzcv 1114 B %bb.3 1115 1116... 1117--- 1118name: store_after_add 1119alignment: 16 1120exposesReturnsTwice: false 1121legalized: false 1122regBankSelected: false 1123selected: false 1124failedISel: false 1125tracksRegLiveness: true 1126hasWinCFI: false 1127registers: 1128 - { id: 0, class: gpr32sp, preferred-register: '' } 1129 - { id: 1, class: gpr32all, preferred-register: '' } 1130 - { id: 2, class: gpr32, preferred-register: '' } 1131 - { id: 3, class: gpr32common, preferred-register: '' } 1132 - { id: 4, class: gpr32sp, preferred-register: '' } 1133 - { id: 5, class: gpr32, preferred-register: '' } 1134 - { id: 6, class: gpr32all, preferred-register: '' } 1135 - { id: 7, class: gpr32all, preferred-register: '' } 1136 - { id: 8, class: gpr32all, preferred-register: '' } 1137 - { id: 9, class: gpr64common, preferred-register: '' } 1138 - { id: 10, class: gpr64common, preferred-register: '' } 1139 - { id: 11, class: gpr64common, preferred-register: '' } 1140 - { id: 12, class: gpr32common, preferred-register: '' } 1141 - { id: 13, class: gpr32common, preferred-register: '' } 1142 - { id: 14, class: gpr32, preferred-register: '' } 1143 - { id: 15, class: gpr32, preferred-register: '' } 1144 - { id: 16, class: gpr32sp, preferred-register: '' } 1145 - { id: 17, class: gpr32, preferred-register: '' } 1146 - { id: 18, class: gpr32, preferred-register: '' } 1147 - { id: 19, class: gpr32sp, preferred-register: '' } 1148liveins: 1149 - { reg: '$x0', virtual-reg: '%9' } 1150 - { reg: '$x1', virtual-reg: '%10' } 1151 - { reg: '$x2', virtual-reg: '%11' } 1152 - { reg: '$w3', virtual-reg: '%12' } 1153frameInfo: 1154 isFrameAddressTaken: false 1155 isReturnAddressTaken: false 1156 hasStackMap: false 1157 hasPatchPoint: false 1158 stackSize: 0 1159 offsetAdjustment: 0 1160 maxAlignment: 1 1161 adjustsStack: false 1162 hasCalls: false 1163 stackProtector: '' 1164 maxCallFrameSize: 0 1165 cvBytesOfCalleeSavedRegisters: 0 1166 hasOpaqueSPAdjustment: false 1167 hasVAStart: false 1168 hasMustTailInVarArgFunc: false 1169 localFrameSize: 0 1170 savePoint: '' 1171 restorePoint: '' 1172fixedStack: [] 1173stack: [] 1174callSites: [] 1175debugValueSubstitutions: [] 1176constants: [] 1177machineFunctionInfo: {} 1178body: | 1179 ; CHECK-LABEL: name: store_after_add 1180 ; CHECK: bb.0.entry: 1181 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000) 1182 ; CHECK: liveins: $x0, $x1, $x2, $w3 1183 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w3 1184 ; CHECK: [[COPY1:%[0-9]+]]:gpr64common = COPY $x2 1185 ; CHECK: [[COPY2:%[0-9]+]]:gpr64common = COPY $x1 1186 ; CHECK: [[COPY3:%[0-9]+]]:gpr64common = COPY $x0 1187 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 1188 ; CHECK: Bcc 11, %bb.2, implicit $nzcv 1189 ; CHECK: B %bb.1 1190 ; CHECK: bb.1.for.body.preheader: 1191 ; CHECK: successors: %bb.3(0x80000000) 1192 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0) 1193 ; CHECK: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0 1194 ; CHECK: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]] 1195 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 43 1196 ; CHECK: STRWui killed [[MOVi32imm]], [[COPY1]], 0 :: (store (s32) into %ir.store, !tbaa !0) 1197 ; CHECK: B %bb.3 1198 ; CHECK: bb.2.for.cond.cleanup: 1199 ; CHECK: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3 1200 ; CHECK: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0) 1201 ; CHECK: RET_ReallyLR 1202 ; CHECK: bb.3.for.body: 1203 ; CHECK: successors: %bb.2(0x04000000), %bb.3(0x7c000000) 1204 ; CHECK: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.3 1205 ; CHECK: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3 1206 ; CHECK: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3 1207 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]] 1208 ; CHECK: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]] 1209 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv 1210 ; CHECK: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 1211 ; CHECK: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0 1212 ; CHECK: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]] 1213 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 1214 ; CHECK: B %bb.3 1215 bb.0.entry: 1216 successors: %bb.1(0x50000000), %bb.2(0x30000000) 1217 liveins: $x0, $x1, $x2, $w3 1218 1219 %12:gpr32common = COPY $w3 1220 %11:gpr64common = COPY $x2 1221 %10:gpr64common = COPY $x1 1222 %9:gpr64common = COPY $x0 1223 %13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !6) 1224 %15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv 1225 Bcc 11, %bb.2, implicit $nzcv 1226 B %bb.1 1227 1228 bb.1.for.body.preheader: 1229 successors: %bb.3(0x80000000) 1230 1231 %16:gpr32sp = ADDWri %13, 42, 0 1232 %1:gpr32all = COPY %16 1233 %14:gpr32 = MOVi32imm 43 1234 STRWui killed %14, %11, 0 :: (store (s32) into %ir.store, !tbaa !6) 1235 B %bb.3 1236 1237 bb.2.for.cond.cleanup: 1238 %2:gpr32 = PHI %12, %bb.0, %6, %bb.3 1239 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !6) 1240 RET_ReallyLR 1241 1242 bb.3.for.body: 1243 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 1244 1245 %3:gpr32common = PHI %1, %bb.1, %8, %bb.3 1246 %4:gpr32sp = PHI %12, %bb.1, %7, %bb.3 1247 %5:gpr32 = PHI %12, %bb.1, %6, %bb.3 1248 %17:gpr32 = SDIVWr %5, %3 1249 %6:gpr32all = COPY %17 1250 %18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv 1251 %7:gpr32all = COPY %18 1252 %19:gpr32sp = ADDWri %3, 1, 0 1253 %8:gpr32all = COPY %19 1254 Bcc 0, %bb.2, implicit $nzcv 1255 B %bb.3 1256 1257... 1258--- 1259name: aliased_store_after_add 1260alignment: 16 1261exposesReturnsTwice: false 1262legalized: false 1263regBankSelected: false 1264selected: false 1265failedISel: false 1266tracksRegLiveness: true 1267hasWinCFI: false 1268registers: 1269 - { id: 0, class: gpr32sp, preferred-register: '' } 1270 - { id: 1, class: gpr32all, preferred-register: '' } 1271 - { id: 2, class: gpr32, preferred-register: '' } 1272 - { id: 3, class: gpr32common, preferred-register: '' } 1273 - { id: 4, class: gpr32sp, preferred-register: '' } 1274 - { id: 5, class: gpr32, preferred-register: '' } 1275 - { id: 6, class: gpr32all, preferred-register: '' } 1276 - { id: 7, class: gpr32all, preferred-register: '' } 1277 - { id: 8, class: gpr32all, preferred-register: '' } 1278 - { id: 9, class: gpr64common, preferred-register: '' } 1279 - { id: 10, class: gpr64common, preferred-register: '' } 1280 - { id: 11, class: gpr64common, preferred-register: '' } 1281 - { id: 12, class: gpr32common, preferred-register: '' } 1282 - { id: 13, class: gpr32common, preferred-register: '' } 1283 - { id: 14, class: gpr32, preferred-register: '' } 1284 - { id: 15, class: gpr32, preferred-register: '' } 1285 - { id: 16, class: gpr32sp, preferred-register: '' } 1286 - { id: 17, class: gpr32, preferred-register: '' } 1287 - { id: 18, class: gpr32, preferred-register: '' } 1288 - { id: 19, class: gpr32sp, preferred-register: '' } 1289liveins: 1290 - { reg: '$x0', virtual-reg: '%9' } 1291 - { reg: '$x1', virtual-reg: '%10' } 1292 - { reg: '$x2', virtual-reg: '%11' } 1293 - { reg: '$w3', virtual-reg: '%12' } 1294frameInfo: 1295 isFrameAddressTaken: false 1296 isReturnAddressTaken: false 1297 hasStackMap: false 1298 hasPatchPoint: false 1299 stackSize: 0 1300 offsetAdjustment: 0 1301 maxAlignment: 1 1302 adjustsStack: false 1303 hasCalls: false 1304 stackProtector: '' 1305 maxCallFrameSize: 0 1306 cvBytesOfCalleeSavedRegisters: 0 1307 hasOpaqueSPAdjustment: false 1308 hasVAStart: false 1309 hasMustTailInVarArgFunc: false 1310 localFrameSize: 0 1311 savePoint: '' 1312 restorePoint: '' 1313fixedStack: [] 1314stack: [] 1315callSites: [] 1316debugValueSubstitutions: [] 1317constants: [] 1318machineFunctionInfo: {} 1319body: | 1320 ; CHECK-LABEL: name: aliased_store_after_add 1321 ; CHECK: bb.0.entry: 1322 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000) 1323 ; CHECK: liveins: $x0, $x1, $x2, $w3 1324 ; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w3 1325 ; CHECK: [[COPY1:%[0-9]+]]:gpr64common = COPY $x2 1326 ; CHECK: [[COPY2:%[0-9]+]]:gpr64common = COPY $x1 1327 ; CHECK: [[COPY3:%[0-9]+]]:gpr64common = COPY $x0 1328 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 1329 ; CHECK: Bcc 11, %bb.2, implicit $nzcv 1330 ; CHECK: B %bb.1 1331 ; CHECK: bb.1.for.body.preheader: 1332 ; CHECK: successors: %bb.3(0x80000000) 1333 ; CHECK: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0) 1334 ; CHECK: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0 1335 ; CHECK: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]] 1336 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 43 1337 ; CHECK: STRWui killed [[MOVi32imm]], [[COPY3]], 0 :: (store (s32) into %ir.read, !tbaa !0) 1338 ; CHECK: B %bb.3 1339 ; CHECK: bb.2.for.cond.cleanup: 1340 ; CHECK: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3 1341 ; CHECK: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0) 1342 ; CHECK: RET_ReallyLR 1343 ; CHECK: bb.3.for.body: 1344 ; CHECK: successors: %bb.2(0x04000000), %bb.3(0x7c000000) 1345 ; CHECK: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.3 1346 ; CHECK: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3 1347 ; CHECK: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3 1348 ; CHECK: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]] 1349 ; CHECK: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]] 1350 ; CHECK: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv 1351 ; CHECK: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]] 1352 ; CHECK: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0 1353 ; CHECK: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]] 1354 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 1355 ; CHECK: B %bb.3 1356 bb.0.entry: 1357 successors: %bb.1(0x50000000), %bb.2(0x30000000) 1358 liveins: $x0, $x1, $x2, $w3 1359 1360 %12:gpr32common = COPY $w3 1361 %11:gpr64common = COPY $x2 1362 %10:gpr64common = COPY $x1 1363 %9:gpr64common = COPY $x0 1364 %13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !6) 1365 %15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv 1366 Bcc 11, %bb.2, implicit $nzcv 1367 B %bb.1 1368 1369 bb.1.for.body.preheader: 1370 successors: %bb.3(0x80000000) 1371 1372 %16:gpr32sp = ADDWri %13, 42, 0 1373 %1:gpr32all = COPY %16 1374 %14:gpr32 = MOVi32imm 43 1375 STRWui killed %14, %9, 0 :: (store (s32) into %ir.read, !tbaa !6) 1376 B %bb.3 1377 1378 bb.2.for.cond.cleanup: 1379 %2:gpr32 = PHI %12, %bb.0, %6, %bb.3 1380 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !6) 1381 RET_ReallyLR 1382 1383 bb.3.for.body: 1384 successors: %bb.2(0x04000000), %bb.3(0x7c000000) 1385 1386 %3:gpr32common = PHI %1, %bb.1, %8, %bb.3 1387 %4:gpr32sp = PHI %12, %bb.1, %7, %bb.3 1388 %5:gpr32 = PHI %12, %bb.1, %6, %bb.3 1389 %17:gpr32 = SDIVWr %5, %3 1390 %6:gpr32all = COPY %17 1391 %18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv 1392 %7:gpr32all = COPY %18 1393 %19:gpr32sp = ADDWri %3, 1, 0 1394 %8:gpr32all = COPY %19 1395 Bcc 0, %bb.2, implicit $nzcv 1396 B %bb.3 1397 1398... 1399 1400