1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s
3
4define <4 x i8> @concat1(<2 x i8> %A, <2 x i8> %B) {
5; CHECK-LABEL: concat1:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    uzp1 v0.4h, v0.4h, v1.4h
8; CHECK-NEXT:    ret
9   %v4i8 = shufflevector <2 x i8> %A, <2 x i8> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
10   ret <4 x i8> %v4i8
11}
12
13define <8 x i8> @concat2(<4 x i8> %A, <4 x i8> %B) {
14; CHECK-LABEL: concat2:
15; CHECK:       // %bb.0:
16; CHECK-NEXT:    uzp1 v0.8b, v0.8b, v1.8b
17; CHECK-NEXT:    ret
18   %v8i8 = shufflevector <4 x i8> %A, <4 x i8> %B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
19   ret <8 x i8> %v8i8
20}
21
22define <16 x i8> @concat3(<8 x i8> %A, <8 x i8> %B) {
23; CHECK-LABEL: concat3:
24; CHECK:       // %bb.0:
25; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
26; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
27; CHECK-NEXT:    mov v0.d[1], v1.d[0]
28; CHECK-NEXT:    ret
29   %v16i8 = shufflevector <8 x i8> %A, <8 x i8> %B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
30   ret <16 x i8> %v16i8
31}
32
33define <4 x i16> @concat4(<2 x i16> %A, <2 x i16> %B) {
34; CHECK-LABEL: concat4:
35; CHECK:       // %bb.0:
36; CHECK-NEXT:    uzp1 v0.4h, v0.4h, v1.4h
37; CHECK-NEXT:    ret
38   %v4i16 = shufflevector <2 x i16> %A, <2 x i16> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
39   ret <4 x i16> %v4i16
40}
41
42define <8 x i16> @concat5(<4 x i16> %A, <4 x i16> %B) {
43; CHECK-LABEL: concat5:
44; CHECK:       // %bb.0:
45; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
46; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
47; CHECK-NEXT:    mov v0.d[1], v1.d[0]
48; CHECK-NEXT:    ret
49   %v8i16 = shufflevector <4 x i16> %A, <4 x i16> %B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
50   ret <8 x i16> %v8i16
51}
52
53define <16 x i16> @concat6(<8 x i16>* %A, <8 x i16>* %B) {
54; CHECK-LABEL: concat6:
55; CHECK:       // %bb.0:
56; CHECK-NEXT:    ldr q0, [x0]
57; CHECK-NEXT:    ldr q1, [x1]
58; CHECK-NEXT:    ret
59   %tmp1 = load <8 x i16>, <8 x i16>* %A
60   %tmp2 = load <8 x i16>, <8 x i16>* %B
61   %v16i16 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
62   ret <16 x i16> %v16i16
63}
64
65define <4 x i32> @concat7(<2 x i32> %A, <2 x i32> %B) {
66; CHECK-LABEL: concat7:
67; CHECK:       // %bb.0:
68; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
69; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
70; CHECK-NEXT:    mov v0.d[1], v1.d[0]
71; CHECK-NEXT:    ret
72   %v4i32 = shufflevector <2 x i32> %A, <2 x i32> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
73   ret <4 x i32> %v4i32
74}
75
76define <8 x i32> @concat8(<4 x i32>* %A, <4 x i32>* %B) {
77; CHECK-LABEL: concat8:
78; CHECK:       // %bb.0:
79; CHECK-NEXT:    ldr q0, [x0]
80; CHECK-NEXT:    ldr q1, [x1]
81; CHECK-NEXT:    ret
82   %tmp1 = load <4 x i32>, <4 x i32>* %A
83   %tmp2 = load <4 x i32>, <4 x i32>* %B
84   %v8i32 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
85   ret <8 x i32> %v8i32
86}
87
88define <4 x half> @concat9(<2 x half> %A, <2 x half> %B) {
89; CHECK-LABEL: concat9:
90; CHECK:       // %bb.0:
91; CHECK-NEXT:    zip1 v0.2s, v0.2s, v1.2s
92; CHECK-NEXT:    ret
93   %v4half= shufflevector <2 x half> %A, <2 x half> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
94   ret <4 x half> %v4half
95}
96
97define <8 x half> @concat10(<4 x half> %A, <4 x half> %B) {
98; CHECK-LABEL: concat10:
99; CHECK:       // %bb.0:
100; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
101; CHECK-NEXT:    // kill: def $d1 killed $d1 def $q1
102; CHECK-NEXT:    mov v0.d[1], v1.d[0]
103; CHECK-NEXT:    ret
104   %v8half= shufflevector <4 x half> %A, <4 x half> %B, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
105   ret <8 x half> %v8half
106}
107
108define <16 x half> @concat11(<8 x half> %A, <8 x half> %B) {
109; CHECK-LABEL: concat11:
110; CHECK:       // %bb.0:
111; CHECK-NEXT:    ret
112   %v16half= shufflevector <8 x half> %A, <8 x half> %B, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
113   ret <16 x half> %v16half
114}
115