1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s
3
4; These tests just check that the plumbing is in place for @llvm.bitreverse.
5
6declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone
7
8define <2 x i16> @f(<2 x i16> %a) {
9; CHECK-LABEL: f:
10; CHECK:       // %bb.0:
11; CHECK-NEXT:    rev32 v0.8b, v0.8b
12; CHECK-NEXT:    rbit v0.8b, v0.8b
13; CHECK-NEXT:    ushr v0.2s, v0.2s, #16
14; CHECK-NEXT:    ret
15  %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
16  ret <2 x i16> %b
17}
18
19declare i8 @llvm.bitreverse.i8(i8) readnone
20
21define i8 @g(i8 %a) {
22; CHECK-LABEL: g:
23; CHECK:       // %bb.0:
24; CHECK-NEXT:    rbit w8, w0
25; CHECK-NEXT:    lsr w0, w8, #24
26; CHECK-NEXT:    ret
27  %b = call i8 @llvm.bitreverse.i8(i8 %a)
28  ret i8 %b
29}
30
31declare i16 @llvm.bitreverse.i16(i16) readnone
32
33define i16 @g_16(i16 %a) {
34; CHECK-LABEL: g_16:
35; CHECK:       // %bb.0:
36; CHECK-NEXT:    rbit w8, w0
37; CHECK-NEXT:    lsr w0, w8, #16
38; CHECK-NEXT:    ret
39  %b = call i16 @llvm.bitreverse.i16(i16 %a)
40  ret i16 %b
41}
42
43declare i32 @llvm.bitreverse.i32(i32) readnone
44
45define i32 @g_32(i32 %a) {
46; CHECK-LABEL: g_32:
47; CHECK:       // %bb.0:
48; CHECK-NEXT:    rbit w0, w0
49; CHECK-NEXT:    ret
50  %b = call i32 @llvm.bitreverse.i32(i32 %a)
51  ret i32 %b
52}
53
54declare i64 @llvm.bitreverse.i64(i64) readnone
55
56define i64 @g_64(i64 %a) {
57; CHECK-LABEL: g_64:
58; CHECK:       // %bb.0:
59; CHECK-NEXT:    rbit x0, x0
60; CHECK-NEXT:    ret
61  %b = call i64 @llvm.bitreverse.i64(i64 %a)
62  ret i64 %b
63}
64
65declare <8 x i8> @llvm.bitreverse.v8i8(<8 x i8>) readnone
66
67define <8 x i8> @g_vec(<8 x i8> %a) {
68; CHECK-LABEL: g_vec:
69; CHECK:       // %bb.0:
70; CHECK-NEXT:    rbit v0.8b, v0.8b
71; CHECK-NEXT:    ret
72  %b = call <8 x i8> @llvm.bitreverse.v8i8(<8 x i8> %a)
73  ret <8 x i8> %b
74}
75
76declare <16 x i8> @llvm.bitreverse.v16i8(<16 x i8>) readnone
77
78define <16 x i8> @g_vec_16x8(<16 x i8> %a) {
79; CHECK-LABEL: g_vec_16x8:
80; CHECK:       // %bb.0:
81; CHECK-NEXT:    rbit v0.16b, v0.16b
82; CHECK-NEXT:    ret
83  %b = call <16 x i8> @llvm.bitreverse.v16i8(<16 x i8> %a)
84  ret <16 x i8> %b
85}
86
87declare <4 x i16> @llvm.bitreverse.v4i16(<4 x i16>) readnone
88
89define <4 x i16> @g_vec_4x16(<4 x i16> %a) {
90; CHECK-LABEL: g_vec_4x16:
91; CHECK:       // %bb.0:
92; CHECK-NEXT:    rev16 v0.8b, v0.8b
93; CHECK-NEXT:    rbit v0.8b, v0.8b
94; CHECK-NEXT:    ret
95  %b = call <4 x i16> @llvm.bitreverse.v4i16(<4 x i16> %a)
96  ret <4 x i16> %b
97}
98
99declare <8 x i16> @llvm.bitreverse.v8i16(<8 x i16>) readnone
100
101define <8 x i16> @g_vec_8x16(<8 x i16> %a) {
102; CHECK-LABEL: g_vec_8x16:
103; CHECK:       // %bb.0:
104; CHECK-NEXT:    rev16 v0.16b, v0.16b
105; CHECK-NEXT:    rbit v0.16b, v0.16b
106; CHECK-NEXT:    ret
107  %b = call <8 x i16> @llvm.bitreverse.v8i16(<8 x i16> %a)
108  ret <8 x i16> %b
109}
110
111declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>) readnone
112
113define <2 x i32> @g_vec_2x32(<2 x i32> %a) {
114; CHECK-LABEL: g_vec_2x32:
115; CHECK:       // %bb.0:
116; CHECK-NEXT:    rev32 v0.8b, v0.8b
117; CHECK-NEXT:    rbit v0.8b, v0.8b
118; CHECK-NEXT:    ret
119
120  %b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
121  ret <2 x i32> %b
122}
123
124declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) readnone
125
126define <4 x i32> @g_vec_4x32(<4 x i32> %a) {
127; CHECK-LABEL: g_vec_4x32:
128; CHECK:       // %bb.0:
129; CHECK-NEXT:    rev32 v0.16b, v0.16b
130; CHECK-NEXT:    rbit v0.16b, v0.16b
131; CHECK-NEXT:    ret
132  %b = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %a)
133  ret <4 x i32> %b
134}
135
136declare <1 x i64> @llvm.bitreverse.v1i64(<1 x i64>) readnone
137
138define <1 x i64> @g_vec_1x64(<1 x i64> %a) {
139; CHECK-LABEL: g_vec_1x64:
140; CHECK:       // %bb.0:
141; CHECK-NEXT:    rev64 v0.8b, v0.8b
142; CHECK-NEXT:    rbit v0.8b, v0.8b
143; CHECK-NEXT:    ret
144  %b = call <1 x i64> @llvm.bitreverse.v1i64(<1 x i64> %a)
145  ret <1 x i64> %b
146}
147
148declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) readnone
149
150define <2 x i64> @g_vec_2x64(<2 x i64> %a) {
151; CHECK-LABEL: g_vec_2x64:
152; CHECK:       // %bb.0:
153; CHECK-NEXT:    rev64 v0.16b, v0.16b
154; CHECK-NEXT:    rbit v0.16b, v0.16b
155; CHECK-NEXT:    ret
156  %b = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %a)
157  ret <2 x i64> %b
158}
159