1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-uknown -global-isel-abort=1 -run-pass=instruction-select %s -o - | FileCheck %s
3
4...
5---
6name:            uaddo_s32
7alignment:       4
8legalized:       true
9regBankSelected: true
10tracksRegLiveness: true
11body:             |
12  bb.1.entry:
13    liveins: $w0, $w1, $x2
14
15    ; CHECK-LABEL: name: uaddo_s32
16    ; CHECK: liveins: $w0, $w1, $x2
17    ; CHECK-NEXT: {{  $}}
18    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
19    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
20    ; CHECK-NEXT: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
21    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
22    ; CHECK-NEXT: $w0 = COPY [[ADDSWrr]]
23    ; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
24    ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
25    %0:gpr(s32) = COPY $w0
26    %1:gpr(s32) = COPY $w1
27    %3:gpr(s32), %4:gpr(s32) = G_UADDO %0, %1
28    $w0 = COPY %3
29    $w1 = COPY %4
30    RET_ReallyLR implicit $w0, implicit $w1
31
32...
33---
34name:            uaddo_s64
35alignment:       4
36legalized:       true
37regBankSelected: true
38tracksRegLiveness: true
39body:             |
40  bb.1.entry:
41    liveins: $x0, $x1, $x2
42
43    ; CHECK-LABEL: name: uaddo_s64
44    ; CHECK: liveins: $x0, $x1, $x2
45    ; CHECK-NEXT: {{  $}}
46    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
47    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
48    ; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
49    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
50    ; CHECK-NEXT: $x0 = COPY [[ADDSXrr]]
51    ; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
52    ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1
53    %0:gpr(s64) = COPY $x0
54    %1:gpr(s64) = COPY $x1
55    %3:gpr(s64), %4:gpr(s32) = G_UADDO %0, %1
56    $x0 = COPY %3
57    $w1 = COPY %4
58    RET_ReallyLR implicit $x0, implicit $w1
59
60...
61---
62name:            uaddo_s32_imm
63alignment:       4
64legalized:       true
65regBankSelected: true
66tracksRegLiveness: true
67body:             |
68  bb.1.entry:
69    liveins: $w0, $w1, $x2
70    ; Check that we get ADDSWri when we can fold in a constant.
71    ;
72    ; CHECK-LABEL: name: uaddo_s32_imm
73    ; CHECK: liveins: $w0, $w1, $x2
74    ; CHECK-NEXT: {{  $}}
75    ; CHECK-NEXT: %copy:gpr32sp = COPY $w0
76    ; CHECK-NEXT: %add:gpr32 = ADDSWri %copy, 16, 0, implicit-def $nzcv
77    ; CHECK-NEXT: %overflow:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
78    ; CHECK-NEXT: $w0 = COPY %add
79    ; CHECK-NEXT: RET_ReallyLR implicit $w0
80    %copy:gpr(s32) = COPY $w0
81    %constant:gpr(s32) = G_CONSTANT i32 16
82    %add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy, %constant
83    $w0 = COPY %add(s32)
84    RET_ReallyLR implicit $w0
85
86...
87---
88name:            uaddo_s32_shifted
89alignment:       4
90legalized:       true
91regBankSelected: true
92tracksRegLiveness: true
93body:             |
94  bb.1.entry:
95    liveins: $w0, $w1, $x2
96    ; Check that we get ADDSWrs when we can fold in a shift.
97    ;
98    ; CHECK-LABEL: name: uaddo_s32_shifted
99    ; CHECK: liveins: $w0, $w1, $x2
100    ; CHECK-NEXT: {{  $}}
101    ; CHECK-NEXT: %copy1:gpr32 = COPY $w0
102    ; CHECK-NEXT: %copy2:gpr32 = COPY $w1
103    ; CHECK-NEXT: %add:gpr32 = ADDSWrs %copy1, %copy2, 16, implicit-def $nzcv
104    ; CHECK-NEXT: %overflow:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
105    ; CHECK-NEXT: $w0 = COPY %add
106    ; CHECK-NEXT: RET_ReallyLR implicit $w0
107    %copy1:gpr(s32) = COPY $w0
108    %copy2:gpr(s32) = COPY $w1
109    %constant:gpr(s32) = G_CONSTANT i32 16
110    %shift:gpr(s32) = G_SHL %copy2(s32), %constant(s32)
111    %add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy1, %shift
112    $w0 = COPY %add(s32)
113    RET_ReallyLR implicit $w0
114
115...
116---
117name:            uaddo_s32_neg_imm
118alignment:       4
119legalized:       true
120regBankSelected: true
121tracksRegLiveness: true
122body:             |
123  bb.1.entry:
124    liveins: $w0, $w1, $x2
125    ; Check that we get SUBSWri when we can fold in a negative constant.
126    ;
127    ; CHECK-LABEL: name: uaddo_s32_neg_imm
128    ; CHECK: liveins: $w0, $w1, $x2
129    ; CHECK-NEXT: {{  $}}
130    ; CHECK-NEXT: %copy:gpr32sp = COPY $w0
131    ; CHECK-NEXT: %add:gpr32 = SUBSWri %copy, 16, 0, implicit-def $nzcv
132    ; CHECK-NEXT: %overflow:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
133    ; CHECK-NEXT: $w0 = COPY %add
134    ; CHECK-NEXT: RET_ReallyLR implicit $w0
135    %copy:gpr(s32) = COPY $w0
136    %constant:gpr(s32) = G_CONSTANT i32 -16
137    %add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy, %constant
138    $w0 = COPY %add(s32)
139    RET_ReallyLR implicit $w0
140
141...
142---
143name:            uaddo_arith_extended
144alignment:       4
145legalized:       true
146regBankSelected: true
147tracksRegLiveness: true
148body:             |
149  bb.1.entry:
150    liveins: $w0, $x0
151    ; Check that we get ADDSXrx.
152    ; CHECK-LABEL: name: uaddo_arith_extended
153    ; CHECK: liveins: $w0, $x0
154    ; CHECK-NEXT: {{  $}}
155    ; CHECK-NEXT: %reg0:gpr64sp = COPY $x0
156    ; CHECK-NEXT: %reg1:gpr32 = COPY $w0
157    ; CHECK-NEXT: %add:gpr64 = ADDSXrx %reg0, %reg1, 18, implicit-def $nzcv
158    ; CHECK-NEXT: %flags:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
159    ; CHECK-NEXT: $x0 = COPY %add
160    ; CHECK-NEXT: RET_ReallyLR implicit $x0
161    %reg0:gpr(s64) = COPY $x0
162    %reg1:gpr(s32) = COPY $w0
163    %ext:gpr(s64) = G_ZEXT %reg1(s32)
164    %cst:gpr(s64) = G_CONSTANT i64 2
165    %shift:gpr(s64) = G_SHL %ext, %cst(s64)
166    %add:gpr(s64), %flags:gpr(s32) = G_UADDO %reg0, %shift
167    $x0 = COPY %add(s64)
168    RET_ReallyLR implicit $x0
169