1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4--- | 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6 7 define void @load_s64_gpr(i64* %addr) { ret void } 8 define void @load_s32_gpr(i32* %addr) { ret void } 9 define void @load_s16_gpr_anyext(i16* %addr) { ret void } 10 define void @load_s16_gpr(i16* %addr) { ret void } 11 define void @load_s8_gpr_anyext(i8* %addr) { ret void } 12 define void @load_s8_gpr(i8* %addr) { ret void } 13 14 define void @load_fi_s64_gpr() { 15 %ptr0 = alloca i64 16 ret void 17 } 18 19 define void @load_gep_128_s64_gpr(i64* %addr) { ret void } 20 define void @load_gep_512_s32_gpr(i32* %addr) { ret void } 21 define void @load_gep_64_s16_gpr(i16* %addr) { ret void } 22 define void @load_gep_1_s8_gpr(i8* %addr) { ret void } 23 24 define void @load_s64_fpr(i64* %addr) { ret void } 25 define void @load_s32_fpr(i32* %addr) { ret void } 26 define void @load_s16_fpr(i16* %addr) { ret void } 27 define void @load_s8_fpr(i8* %addr) { ret void } 28 29 define void @load_gep_8_s64_fpr(i64* %addr) { ret void } 30 define void @load_gep_16_s32_fpr(i32* %addr) { ret void } 31 define void @load_gep_64_s16_fpr(i16* %addr) { ret void } 32 define void @load_gep_32_s8_fpr(i8* %addr) { ret void } 33 34 define void @load_v2s32(i64 *%addr) { ret void } 35 define void @load_v2s64(i64 *%addr) { ret void } 36 37 define void @load_4xi16(<4 x i16>* %ptr) { ret void } 38 define void @load_4xi32(<4 x i32>* %ptr) { ret void } 39 define void @load_8xi16(<8 x i16>* %ptr) { ret void } 40 define void @load_16xi8(<16 x i8>* %ptr) { ret void } 41 define void @anyext_on_fpr() { ret void } 42 define void @anyext_on_fpr8() { ret void } 43 44... 45 46--- 47name: load_s64_gpr 48legalized: true 49regBankSelected: true 50 51registers: 52 - { id: 0, class: gpr } 53 - { id: 1, class: gpr } 54 55body: | 56 bb.0: 57 liveins: $x0 58 59 ; CHECK-LABEL: name: load_s64_gpr 60 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 61 ; CHECK-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui [[COPY]], 0 :: (load (s64) from %ir.addr) 62 ; CHECK-NEXT: $x0 = COPY [[LDRXui]] 63 %0(p0) = COPY $x0 64 %1(s64) = G_LOAD %0 :: (load (s64) from %ir.addr) 65 $x0 = COPY %1(s64) 66... 67 68--- 69name: load_s32_gpr 70legalized: true 71regBankSelected: true 72 73registers: 74 - { id: 0, class: gpr } 75 - { id: 1, class: gpr } 76 77body: | 78 bb.0: 79 liveins: $x0 80 81 ; CHECK-LABEL: name: load_s32_gpr 82 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 83 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32) from %ir.addr) 84 ; CHECK-NEXT: $w0 = COPY [[LDRWui]] 85 %0(p0) = COPY $x0 86 %1(s32) = G_LOAD %0 :: (load (s32) from %ir.addr) 87 $w0 = COPY %1(s32) 88... 89 90--- 91name: load_s16_gpr_anyext 92legalized: true 93regBankSelected: true 94 95body: | 96 bb.0: 97 liveins: $x0 98 99 ; CHECK-LABEL: name: load_s16_gpr_anyext 100 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 101 ; CHECK-NEXT: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load (s16) from %ir.addr) 102 ; CHECK-NEXT: $w0 = COPY [[LDRHHui]] 103 %0:gpr(p0) = COPY $x0 104 %1:gpr(s32) = G_LOAD %0 :: (load (s16) from %ir.addr) 105 $w0 = COPY %1(s32) 106... 107 108--- 109name: load_s16_gpr 110legalized: true 111regBankSelected: true 112 113registers: 114 - { id: 0, class: gpr } 115 - { id: 1, class: gpr } 116 117body: | 118 bb.0: 119 liveins: $x0 120 121 ; CHECK-LABEL: name: load_s16_gpr 122 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 123 ; CHECK-NEXT: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load (s16) from %ir.addr) 124 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRHHui]] 125 ; CHECK-NEXT: $w0 = COPY [[COPY1]] 126 %0(p0) = COPY $x0 127 %1(s16) = G_LOAD %0 :: (load (s16) from %ir.addr) 128 %2:gpr(s32) = G_ANYEXT %1 129 $w0 = COPY %2(s32) 130... 131 132--- 133name: load_s8_gpr_anyext 134legalized: true 135regBankSelected: true 136 137body: | 138 bb.0: 139 liveins: $x0 140 141 ; CHECK-LABEL: name: load_s8_gpr_anyext 142 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 143 ; CHECK-NEXT: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 0 :: (load (s8) from %ir.addr) 144 ; CHECK-NEXT: $w0 = COPY [[LDRBBui]] 145 %0:gpr(p0) = COPY $x0 146 %1:gpr(s32) = G_LOAD %0 :: (load (s8) from %ir.addr) 147 $w0 = COPY %1(s32) 148... 149 150--- 151name: load_s8_gpr 152legalized: true 153regBankSelected: true 154 155registers: 156 - { id: 0, class: gpr } 157 - { id: 1, class: gpr } 158 159body: | 160 bb.0: 161 liveins: $x0 162 163 ; CHECK-LABEL: name: load_s8_gpr 164 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 165 ; CHECK-NEXT: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 0 :: (load (s8) from %ir.addr) 166 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRBBui]] 167 ; CHECK-NEXT: $w0 = COPY [[COPY1]] 168 %0(p0) = COPY $x0 169 %1(s8) = G_LOAD %0 :: (load (s8) from %ir.addr) 170 %2:gpr(s32) = G_ANYEXT %1 171 $w0 = COPY %2(s32) 172... 173 174--- 175name: load_fi_s64_gpr 176legalized: true 177regBankSelected: true 178 179registers: 180 - { id: 0, class: gpr } 181 - { id: 1, class: gpr } 182 183stack: 184 - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 } 185 186body: | 187 bb.0: 188 liveins: $x0 189 190 ; CHECK-LABEL: name: load_fi_s64_gpr 191 ; CHECK: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui %stack.0.ptr0, 0 :: (load (s64)) 192 ; CHECK-NEXT: $x0 = COPY [[LDRXui]] 193 %0(p0) = G_FRAME_INDEX %stack.0.ptr0 194 %1(s64) = G_LOAD %0 :: (load (s64)) 195 $x0 = COPY %1(s64) 196... 197 198--- 199name: load_gep_128_s64_gpr 200legalized: true 201regBankSelected: true 202 203registers: 204 - { id: 0, class: gpr } 205 - { id: 1, class: gpr } 206 - { id: 2, class: gpr } 207 - { id: 3, class: gpr } 208 209body: | 210 bb.0: 211 liveins: $x0 212 213 ; CHECK-LABEL: name: load_gep_128_s64_gpr 214 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 215 ; CHECK-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui [[COPY]], 16 :: (load (s64) from %ir.addr) 216 ; CHECK-NEXT: $x0 = COPY [[LDRXui]] 217 %0(p0) = COPY $x0 218 %1(s64) = G_CONSTANT i64 128 219 %2(p0) = G_PTR_ADD %0, %1 220 %3(s64) = G_LOAD %2 :: (load (s64) from %ir.addr) 221 $x0 = COPY %3 222... 223 224--- 225name: load_gep_512_s32_gpr 226legalized: true 227regBankSelected: true 228 229registers: 230 - { id: 0, class: gpr } 231 - { id: 1, class: gpr } 232 - { id: 2, class: gpr } 233 - { id: 3, class: gpr } 234 235body: | 236 bb.0: 237 liveins: $x0 238 239 ; CHECK-LABEL: name: load_gep_512_s32_gpr 240 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 241 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 128 :: (load (s32) from %ir.addr) 242 ; CHECK-NEXT: $w0 = COPY [[LDRWui]] 243 %0(p0) = COPY $x0 244 %1(s64) = G_CONSTANT i64 512 245 %2(p0) = G_PTR_ADD %0, %1 246 %3(s32) = G_LOAD %2 :: (load (s32) from %ir.addr) 247 $w0 = COPY %3 248... 249 250--- 251name: load_gep_64_s16_gpr 252legalized: true 253regBankSelected: true 254 255registers: 256 - { id: 0, class: gpr } 257 - { id: 1, class: gpr } 258 - { id: 2, class: gpr } 259 - { id: 3, class: gpr } 260 261body: | 262 bb.0: 263 liveins: $x0 264 265 ; CHECK-LABEL: name: load_gep_64_s16_gpr 266 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 267 ; CHECK-NEXT: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 32 :: (load (s16) from %ir.addr) 268 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRHHui]] 269 ; CHECK-NEXT: $w0 = COPY [[COPY1]] 270 %0(p0) = COPY $x0 271 %1(s64) = G_CONSTANT i64 64 272 %2(p0) = G_PTR_ADD %0, %1 273 %3(s16) = G_LOAD %2 :: (load (s16) from %ir.addr) 274 %4:gpr(s32) = G_ANYEXT %3 275 $w0 = COPY %4 276... 277 278--- 279name: load_gep_1_s8_gpr 280legalized: true 281regBankSelected: true 282 283registers: 284 - { id: 0, class: gpr } 285 - { id: 1, class: gpr } 286 - { id: 2, class: gpr } 287 - { id: 3, class: gpr } 288 289body: | 290 bb.0: 291 liveins: $x0 292 293 ; CHECK-LABEL: name: load_gep_1_s8_gpr 294 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 295 ; CHECK-NEXT: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 1 :: (load (s8) from %ir.addr) 296 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRBBui]] 297 ; CHECK-NEXT: $w0 = COPY [[COPY1]] 298 %0(p0) = COPY $x0 299 %1(s64) = G_CONSTANT i64 1 300 %2(p0) = G_PTR_ADD %0, %1 301 %3(s8) = G_LOAD %2 :: (load (s8) from %ir.addr) 302 %4:gpr(s32) = G_ANYEXT %3 303 $w0 = COPY %4 304... 305 306--- 307name: load_s64_fpr 308legalized: true 309regBankSelected: true 310 311registers: 312 - { id: 0, class: gpr } 313 - { id: 1, class: fpr } 314 315body: | 316 bb.0: 317 liveins: $x0 318 319 ; CHECK-LABEL: name: load_s64_fpr 320 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 321 ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 0 :: (load (s64) from %ir.addr) 322 ; CHECK-NEXT: $d0 = COPY [[LDRDui]] 323 %0(p0) = COPY $x0 324 %1(s64) = G_LOAD %0 :: (load (s64) from %ir.addr) 325 $d0 = COPY %1(s64) 326... 327 328--- 329name: load_s32_fpr 330legalized: true 331regBankSelected: true 332 333registers: 334 - { id: 0, class: gpr } 335 - { id: 1, class: fpr } 336 337body: | 338 bb.0: 339 liveins: $x0 340 341 ; CHECK-LABEL: name: load_s32_fpr 342 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 343 ; CHECK-NEXT: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[COPY]], 0 :: (load (s32) from %ir.addr) 344 ; CHECK-NEXT: $s0 = COPY [[LDRSui]] 345 %0(p0) = COPY $x0 346 %1(s32) = G_LOAD %0 :: (load (s32) from %ir.addr) 347 $s0 = COPY %1(s32) 348... 349 350--- 351name: load_s16_fpr 352legalized: true 353regBankSelected: true 354 355registers: 356 - { id: 0, class: gpr } 357 - { id: 1, class: fpr } 358 359body: | 360 bb.0: 361 liveins: $x0 362 363 ; CHECK-LABEL: name: load_s16_fpr 364 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 365 ; CHECK-NEXT: [[LDRHui:%[0-9]+]]:fpr16 = LDRHui [[COPY]], 0 :: (load (s16) from %ir.addr) 366 ; CHECK-NEXT: $h0 = COPY [[LDRHui]] 367 %0(p0) = COPY $x0 368 %1(s16) = G_LOAD %0 :: (load (s16) from %ir.addr) 369 $h0 = COPY %1(s16) 370... 371 372--- 373name: load_s8_fpr 374legalized: true 375regBankSelected: true 376 377registers: 378 - { id: 0, class: gpr } 379 - { id: 1, class: fpr } 380 381body: | 382 bb.0: 383 liveins: $x0 384 385 ; CHECK-LABEL: name: load_s8_fpr 386 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 387 ; CHECK-NEXT: [[LDRBui:%[0-9]+]]:fpr8 = LDRBui [[COPY]], 0 :: (load (s8) from %ir.addr) 388 ; CHECK-NEXT: $b0 = COPY [[LDRBui]] 389 %0(p0) = COPY $x0 390 %1(s8) = G_LOAD %0 :: (load (s8) from %ir.addr) 391 $b0 = COPY %1(s8) 392... 393 394--- 395name: load_gep_8_s64_fpr 396legalized: true 397regBankSelected: true 398 399registers: 400 - { id: 0, class: gpr } 401 - { id: 1, class: gpr } 402 - { id: 2, class: gpr } 403 - { id: 3, class: fpr } 404 405body: | 406 bb.0: 407 liveins: $x0 408 409 ; CHECK-LABEL: name: load_gep_8_s64_fpr 410 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 411 ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 1 :: (load (s64) from %ir.addr) 412 ; CHECK-NEXT: $d0 = COPY [[LDRDui]] 413 %0(p0) = COPY $x0 414 %1(s64) = G_CONSTANT i64 8 415 %2(p0) = G_PTR_ADD %0, %1 416 %3(s64) = G_LOAD %2 :: (load (s64) from %ir.addr) 417 $d0 = COPY %3 418... 419 420--- 421name: load_gep_16_s32_fpr 422legalized: true 423regBankSelected: true 424 425registers: 426 - { id: 0, class: gpr } 427 - { id: 1, class: gpr } 428 - { id: 2, class: gpr } 429 - { id: 3, class: fpr } 430 431body: | 432 bb.0: 433 liveins: $x0 434 435 ; CHECK-LABEL: name: load_gep_16_s32_fpr 436 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 437 ; CHECK-NEXT: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[COPY]], 4 :: (load (s32) from %ir.addr) 438 ; CHECK-NEXT: $s0 = COPY [[LDRSui]] 439 %0(p0) = COPY $x0 440 %1(s64) = G_CONSTANT i64 16 441 %2(p0) = G_PTR_ADD %0, %1 442 %3(s32) = G_LOAD %2 :: (load (s32) from %ir.addr) 443 $s0 = COPY %3 444... 445 446--- 447name: load_gep_64_s16_fpr 448legalized: true 449regBankSelected: true 450 451registers: 452 - { id: 0, class: gpr } 453 - { id: 1, class: gpr } 454 - { id: 2, class: gpr } 455 - { id: 3, class: fpr } 456 457body: | 458 bb.0: 459 liveins: $x0 460 461 ; CHECK-LABEL: name: load_gep_64_s16_fpr 462 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 463 ; CHECK-NEXT: [[LDRHui:%[0-9]+]]:fpr16 = LDRHui [[COPY]], 32 :: (load (s16) from %ir.addr) 464 ; CHECK-NEXT: $h0 = COPY [[LDRHui]] 465 %0(p0) = COPY $x0 466 %1(s64) = G_CONSTANT i64 64 467 %2(p0) = G_PTR_ADD %0, %1 468 %3(s16) = G_LOAD %2 :: (load (s16) from %ir.addr) 469 $h0 = COPY %3 470... 471 472--- 473name: load_gep_32_s8_fpr 474legalized: true 475regBankSelected: true 476 477registers: 478 - { id: 0, class: gpr } 479 - { id: 1, class: gpr } 480 - { id: 2, class: gpr } 481 - { id: 3, class: fpr } 482 483body: | 484 bb.0: 485 liveins: $x0 486 487 ; CHECK-LABEL: name: load_gep_32_s8_fpr 488 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 489 ; CHECK-NEXT: [[LDRBui:%[0-9]+]]:fpr8 = LDRBui [[COPY]], 32 :: (load (s8) from %ir.addr) 490 ; CHECK-NEXT: $b0 = COPY [[LDRBui]] 491 %0(p0) = COPY $x0 492 %1(s64) = G_CONSTANT i64 32 493 %2(p0) = G_PTR_ADD %0, %1 494 %3(s8) = G_LOAD %2 :: (load (s8) from %ir.addr) 495 $b0 = COPY %3 496... 497--- 498name: load_v2s32 499legalized: true 500regBankSelected: true 501 502registers: 503 - { id: 0, class: gpr } 504 - { id: 1, class: fpr } 505 506body: | 507 bb.0: 508 liveins: $x0 509 510 ; CHECK-LABEL: name: load_v2s32 511 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 512 ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 0 :: (load (<2 x s32>) from %ir.addr) 513 ; CHECK-NEXT: $d0 = COPY [[LDRDui]] 514 %0(p0) = COPY $x0 515 %1(<2 x s32>) = G_LOAD %0 :: (load (<2 x s32>) from %ir.addr) 516 $d0 = COPY %1(<2 x s32>) 517... 518--- 519name: load_v2s64 520legalized: true 521regBankSelected: true 522 523registers: 524 - { id: 0, class: gpr } 525 - { id: 1, class: fpr } 526 527body: | 528 bb.0: 529 liveins: $x0 530 531 ; CHECK-LABEL: name: load_v2s64 532 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 533 ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (load (<2 x s64>) from %ir.addr) 534 ; CHECK-NEXT: $q0 = COPY [[LDRQui]] 535 %0(p0) = COPY $x0 536 %1(<2 x s64>) = G_LOAD %0 :: (load (<2 x s64>) from %ir.addr) 537 $q0 = COPY %1(<2 x s64>) 538... 539--- 540name: load_4xi16 541alignment: 4 542legalized: true 543regBankSelected: true 544tracksRegLiveness: true 545registers: 546 - { id: 0, class: gpr } 547 - { id: 1, class: fpr } 548machineFunctionInfo: {} 549body: | 550 bb.1 (%ir-block.0): 551 liveins: $x0 552 553 ; CHECK-LABEL: name: load_4xi16 554 ; CHECK: liveins: $x0 555 ; CHECK-NEXT: {{ $}} 556 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 557 ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 0 :: (load (<4 x s16>) from %ir.ptr) 558 ; CHECK-NEXT: $d0 = COPY [[LDRDui]] 559 ; CHECK-NEXT: RET_ReallyLR implicit $d0 560 %0:gpr(p0) = COPY $x0 561 %1:fpr(<4 x s16>) = G_LOAD %0(p0) :: (load (<4 x s16>) from %ir.ptr) 562 $d0 = COPY %1(<4 x s16>) 563 RET_ReallyLR implicit $d0 564 565... 566--- 567name: load_4xi32 568alignment: 4 569legalized: true 570regBankSelected: true 571tracksRegLiveness: true 572registers: 573 - { id: 0, class: gpr } 574 - { id: 1, class: fpr } 575machineFunctionInfo: {} 576body: | 577 bb.1 (%ir-block.0): 578 liveins: $x0 579 580 ; CHECK-LABEL: name: load_4xi32 581 ; CHECK: liveins: $x0 582 ; CHECK-NEXT: {{ $}} 583 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 584 ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (load (<4 x s32>) from %ir.ptr) 585 ; CHECK-NEXT: $q0 = COPY [[LDRQui]] 586 ; CHECK-NEXT: RET_ReallyLR implicit $q0 587 %0:gpr(p0) = COPY $x0 588 %1:fpr(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.ptr) 589 $q0 = COPY %1(<4 x s32>) 590 RET_ReallyLR implicit $q0 591 592... 593--- 594name: load_8xi16 595alignment: 4 596legalized: true 597regBankSelected: true 598tracksRegLiveness: true 599registers: 600 - { id: 0, class: gpr } 601 - { id: 1, class: fpr } 602machineFunctionInfo: {} 603body: | 604 bb.1 (%ir-block.0): 605 liveins: $x0 606 607 ; CHECK-LABEL: name: load_8xi16 608 ; CHECK: liveins: $x0 609 ; CHECK-NEXT: {{ $}} 610 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 611 ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (load (<8 x s16>) from %ir.ptr) 612 ; CHECK-NEXT: $q0 = COPY [[LDRQui]] 613 ; CHECK-NEXT: RET_ReallyLR implicit $q0 614 %0:gpr(p0) = COPY $x0 615 %1:fpr(<8 x s16>) = G_LOAD %0(p0) :: (load (<8 x s16>) from %ir.ptr) 616 $q0 = COPY %1(<8 x s16>) 617 RET_ReallyLR implicit $q0 618 619... 620--- 621name: load_16xi8 622alignment: 4 623legalized: true 624regBankSelected: true 625tracksRegLiveness: true 626registers: 627 - { id: 0, class: gpr } 628 - { id: 1, class: fpr } 629machineFunctionInfo: {} 630body: | 631 bb.1 (%ir-block.0): 632 liveins: $x0 633 634 ; CHECK-LABEL: name: load_16xi8 635 ; CHECK: liveins: $x0 636 ; CHECK-NEXT: {{ $}} 637 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 638 ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (load (<16 x s8>) from %ir.ptr) 639 ; CHECK-NEXT: $q0 = COPY [[LDRQui]] 640 ; CHECK-NEXT: RET_ReallyLR implicit $q0 641 %0:gpr(p0) = COPY $x0 642 %1:fpr(<16 x s8>) = G_LOAD %0(p0) :: (load (<16 x s8>) from %ir.ptr) 643 $q0 = COPY %1(<16 x s8>) 644 RET_ReallyLR implicit $q0 645 646... 647--- 648name: anyext_on_fpr 649alignment: 4 650legalized: true 651regBankSelected: true 652tracksRegLiveness: true 653liveins: 654 - { reg: '$x0' } 655 - { reg: '$x1' } 656 - { reg: '$x2' } 657 - { reg: '$w3' } 658frameInfo: 659 maxAlignment: 1 660machineFunctionInfo: {} 661body: | 662 bb.1: 663 liveins: $w3, $x0, $x1, $x2 664 665 ; CHECK-LABEL: name: anyext_on_fpr 666 ; CHECK: liveins: $w3, $x0, $x1, $x2 667 ; CHECK-NEXT: {{ $}} 668 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 669 ; CHECK-NEXT: [[LDRHui:%[0-9]+]]:fpr16 = LDRHui [[COPY]], 0 :: (load (s16)) 670 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr32 = SUBREG_TO_REG 0, [[LDRHui]], %subreg.hsub 671 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SUBREG_TO_REG]] 672 ; CHECK-NEXT: $w0 = COPY [[COPY1]] 673 ; CHECK-NEXT: RET_ReallyLR 674 %0:gpr(p0) = COPY $x0 675 %16:fpr(s32) = G_LOAD %0(p0) :: (load (s16)) 676 %24:gpr(s32) = COPY %16(s32) 677 $w0 = COPY %24(s32) 678 RET_ReallyLR 679 680... 681--- 682name: anyext_on_fpr8 683alignment: 4 684legalized: true 685regBankSelected: true 686tracksRegLiveness: true 687liveins: 688 - { reg: '$x0' } 689 - { reg: '$x1' } 690 - { reg: '$x2' } 691 - { reg: '$w3' } 692frameInfo: 693 maxAlignment: 1 694machineFunctionInfo: {} 695body: | 696 bb.1: 697 liveins: $w3, $x0, $x1, $x2 698 699 ; CHECK-LABEL: name: anyext_on_fpr8 700 ; CHECK: liveins: $w3, $x0, $x1, $x2 701 ; CHECK-NEXT: {{ $}} 702 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 703 ; CHECK-NEXT: [[LDRBui:%[0-9]+]]:fpr8 = LDRBui [[COPY]], 0 :: (load (s8)) 704 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr32 = SUBREG_TO_REG 0, [[LDRBui]], %subreg.bsub 705 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SUBREG_TO_REG]] 706 ; CHECK-NEXT: $w0 = COPY [[COPY1]] 707 ; CHECK-NEXT: RET_ReallyLR 708 %0:gpr(p0) = COPY $x0 709 %16:fpr(s32) = G_LOAD %0(p0) :: (load (s8)) 710 %24:gpr(s32) = COPY %16(s32) 711 $w0 = COPY %24(s32) 712 RET_ReallyLR 713 714... 715