1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
3
4--- |
5  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
6
7  define void @imm_s32_gpr() { ret void }
8  define void @imm_s64_gpr() { ret void }
9  define void @test_f64_cp() { ret void }
10  define void @test_f32_cp_optsize() #0 { ret void }
11  define void @test_f32_cp_minsize() #1 { ret void }
12
13
14  attributes #0 = { optsize }
15  attributes #1 = { minsize }
16
17...
18
19---
20# Check that we select a 32-bit immediate into a MOVi32imm.
21name:            imm_s32_gpr
22legalized:       true
23regBankSelected: true
24
25registers:
26  - { id: 0, class: gpr }
27
28body:             |
29  bb.0:
30    liveins: $w0, $w1
31
32    ; CHECK-LABEL: name: imm_s32_gpr
33    ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm -1234
34    ; CHECK: $w0 = COPY [[MOVi32imm]]
35    %0(s32) = G_CONSTANT i32 -1234
36    $w0 = COPY %0(s32)
37...
38
39---
40# Check that we select a 64-bit immediate into a MOVi64imm.
41name:            imm_s64_gpr
42legalized:       true
43regBankSelected: true
44
45registers:
46  - { id: 0, class: gpr }
47
48body:             |
49  bb.0:
50    liveins: $w0, $w1
51
52    ; CHECK-LABEL: name: imm_s64_gpr
53    ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1234
54    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32
55    ; CHECK: $x0 = COPY [[SUBREG_TO_REG]]
56    %0(s64) = G_CONSTANT i64 1234
57    $x0 = COPY %0(s64)
58...
59
60# 64b FP immediates need to be loaded.
61---
62name:            test_f64_cp
63legalized:       true
64regBankSelected: true
65liveins:
66  - { reg: '$d0' }
67body:             |
68  bb.1 (%ir-block.0):
69    liveins: $d0
70
71    ; CHECK-LABEL: name: test_f64_cp
72    ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
73    ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0
74    ; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %const.0
75    ; CHECK: [[FADDDrr:%[0-9]+]]:fpr64 = nofpexcept FADDDrr [[COPY]], [[LDRDui]]
76    ; CHECK: $d0 = COPY [[FADDDrr]]
77    ; CHECK: RET_ReallyLR implicit $d0
78    %0:fpr(s64) = COPY $d0
79    %1:fpr(s64) = G_FCONSTANT double 0x3FEFF7CED916872B
80    %2:fpr(s64) = G_FADD %0, %1
81    $d0 = COPY %2(s64)
82    RET_ReallyLR implicit $d0
83
84...
85# 32b FP immediates need to be loaded if using optsize.
86---
87name:            test_f32_cp_optsize
88legalized:       true
89regBankSelected: true
90liveins:
91  - { reg: '$s0' }
92body:             |
93  bb.1 (%ir-block.0):
94    liveins: $s0
95
96    ; CHECK-LABEL: name: test_f32_cp_optsize
97    ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
98    ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0
99    ; CHECK: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %const.0
100    ; CHECK: [[FADDSrr:%[0-9]+]]:fpr32 = nofpexcept FADDSrr [[COPY]], [[LDRSui]]
101    ; CHECK: $s0 = COPY [[FADDSrr]]
102    ; CHECK: RET_ReallyLR implicit $s0
103    %0:fpr(s32) = COPY $s0
104    %1:fpr(s32) = G_FCONSTANT float 0x3FDB267DE0000000
105    %2:fpr(s32) = G_FADD %0, %1
106    $s0 = COPY %2(s32)
107    RET_ReallyLR implicit $s0
108
109...
110# 32b FP immediates need to be loaded if using minsize.
111---
112name:            test_f32_cp_minsize
113legalized:       true
114regBankSelected: true
115liveins:
116  - { reg: '$s0' }
117body:             |
118  bb.1 (%ir-block.0):
119    liveins: $s0
120
121    ; CHECK-LABEL: name: test_f32_cp_minsize
122    ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
123    ; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.0
124    ; CHECK: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %const.0
125    ; CHECK: [[FADDSrr:%[0-9]+]]:fpr32 = nofpexcept FADDSrr [[COPY]], [[LDRSui]]
126    ; CHECK: $s0 = COPY [[FADDSrr]]
127    ; CHECK: RET_ReallyLR implicit $s0
128    %0:fpr(s32) = COPY $s0
129    %1:fpr(s32) = G_FCONSTANT float 0x3FDB267DE0000000
130    %2:fpr(s32) = G_FADD %0, %1
131    $s0 = COPY %2(s32)
132    RET_ReallyLR implicit $s0
133
134...
135