1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=-lzcnt,+sse2 | FileCheck %s -check-prefixes=SSE2,NOLZCNT
3; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+sse2 | FileCheck %s -check-prefixes=SSE2,LZCNT
4; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+sse4.2 | FileCheck %s -check-prefixes=LZCNT,SSE42
5; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+avx | FileCheck %s -check-prefixes=LZCNT,AVX1
6; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+avx2 | FileCheck %s -check-prefixes=LZCNT,AVX2
7; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+avx512f | FileCheck %s -check-prefixes=LZCNT,AVX512,AVX512F
8; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+avx512vl,+avx512bw,+avx512dq | FileCheck %s -check-prefixes=LZCNT,AVX512,AVX512BW
9; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print<cost-model>" 2>&1 -disable-output -mattr=+lzcnt,+avx512vl,+avx512bw,+avx512dq,+avx512cd | FileCheck %s -check-prefixes=LZCNT,AVX512CD
10
11; Verify the cost of scalar leading zero count instructions.
12
13declare i64 @llvm.ctlz.i64(i64, i1)
14declare i32 @llvm.ctlz.i32(i32, i1)
15declare i16 @llvm.ctlz.i16(i16, i1)
16declare  i8 @llvm.ctlz.i8(i8, i1)
17
18define i64 @var_ctlz_i64(i64 %a) {
19; NOLZCNT-LABEL: 'var_ctlz_i64'
20; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 false)
21; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz
22;
23; LZCNT-LABEL: 'var_ctlz_i64'
24; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 false)
25; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz
26;
27  %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 0)
28  ret i64 %ctlz
29}
30
31define i64 @var_ctlz_i64u(i64 %a) {
32; NOLZCNT-LABEL: 'var_ctlz_i64u'
33; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 true)
34; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz
35;
36; LZCNT-LABEL: 'var_ctlz_i64u'
37; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 true)
38; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i64 %ctlz
39;
40  %ctlz = call i64 @llvm.ctlz.i64(i64 %a, i1 1)
41  ret i64 %ctlz
42}
43
44define i32 @var_ctlz_i32(i32 %a) {
45; NOLZCNT-LABEL: 'var_ctlz_i32'
46; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 false)
47; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz
48;
49; LZCNT-LABEL: 'var_ctlz_i32'
50; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 false)
51; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz
52;
53  %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
54  ret i32 %ctlz
55}
56
57define i32 @var_ctlz_i32u(i32 %a) {
58; NOLZCNT-LABEL: 'var_ctlz_i32u'
59; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 true)
60; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz
61;
62; LZCNT-LABEL: 'var_ctlz_i32u'
63; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 true)
64; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 %ctlz
65;
66  %ctlz = call i32 @llvm.ctlz.i32(i32 %a, i1 1)
67  ret i32 %ctlz
68}
69
70define i16 @var_ctlz_i16(i16 %a) {
71; NOLZCNT-LABEL: 'var_ctlz_i16'
72; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 false)
73; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz
74;
75; LZCNT-LABEL: 'var_ctlz_i16'
76; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 false)
77; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz
78;
79  %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 0)
80  ret i16 %ctlz
81}
82
83define i16 @var_ctlz_i16u(i16 %a) {
84; NOLZCNT-LABEL: 'var_ctlz_i16u'
85; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 true)
86; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz
87;
88; LZCNT-LABEL: 'var_ctlz_i16u'
89; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 true)
90; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i16 %ctlz
91;
92  %ctlz = call i16 @llvm.ctlz.i16(i16 %a, i1 1)
93  ret i16 %ctlz
94}
95
96define i8 @var_ctlz_i8(i8 %a) {
97; NOLZCNT-LABEL: 'var_ctlz_i8'
98; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 false)
99; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz
100;
101; LZCNT-LABEL: 'var_ctlz_i8'
102; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 false)
103; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz
104;
105  %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 0)
106  ret i8 %ctlz
107}
108
109define i8 @var_ctlz_i8u(i8 %a) {
110; NOLZCNT-LABEL: 'var_ctlz_i8u'
111; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 true)
112; NOLZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz
113;
114; LZCNT-LABEL: 'var_ctlz_i8u'
115; LZCNT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 true)
116; LZCNT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i8 %ctlz
117;
118  %ctlz = call i8 @llvm.ctlz.i8(i8 %a, i1 1)
119  ret i8 %ctlz
120}
121
122; Verify the cost of vector leading zero count instructions.
123
124declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
125declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1)
126declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1)
127declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1)
128
129declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1)
130declare <8 x i32> @llvm.ctlz.v8i32(<8 x i32>, i1)
131declare <16 x i16> @llvm.ctlz.v16i16(<16 x i16>, i1)
132declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
133
134declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1)
135declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1)
136declare <32 x i16> @llvm.ctlz.v32i16(<32 x i16>, i1)
137declare <64 x i8> @llvm.ctlz.v64i8(<64 x i8>, i1)
138
139define <2 x i64> @var_ctlz_v2i64(<2 x i64> %a) {
140; SSE2-LABEL: 'var_ctlz_v2i64'
141; SSE2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
142; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
143;
144; SSE42-LABEL: 'var_ctlz_v2i64'
145; SSE42-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
146; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
147;
148; AVX1-LABEL: 'var_ctlz_v2i64'
149; AVX1-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
150; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
151;
152; AVX2-LABEL: 'var_ctlz_v2i64'
153; AVX2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
154; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
155;
156; AVX512-LABEL: 'var_ctlz_v2i64'
157; AVX512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
158; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
159;
160; AVX512CD-LABEL: 'var_ctlz_v2i64'
161; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
162; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
163;
164; AVX-LABEL: 'var_ctlz_v2i64'
165; AVX-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 false)
166; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
167  %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 0)
168  ret <2 x i64> %ctlz
169}
170
171define <2 x i64> @var_ctlz_v2i64u(<2 x i64> %a) {
172; SSE2-LABEL: 'var_ctlz_v2i64u'
173; SSE2-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
174; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
175;
176; SSE42-LABEL: 'var_ctlz_v2i64u'
177; SSE42-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
178; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
179;
180; AVX1-LABEL: 'var_ctlz_v2i64u'
181; AVX1-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
182; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
183;
184; AVX2-LABEL: 'var_ctlz_v2i64u'
185; AVX2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
186; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
187;
188; AVX512-LABEL: 'var_ctlz_v2i64u'
189; AVX512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
190; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
191;
192; AVX512CD-LABEL: 'var_ctlz_v2i64u'
193; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
194; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
195;
196; AVX-LABEL: 'var_ctlz_v2i64u'
197; AVX-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
198; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %ctlz
199  %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 1)
200  ret <2 x i64> %ctlz
201}
202
203define <4 x i64> @var_ctlz_v4i64(<4 x i64> %a) {
204; SSE2-LABEL: 'var_ctlz_v4i64'
205; SSE2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
206; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
207;
208; SSE42-LABEL: 'var_ctlz_v4i64'
209; SSE42-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
210; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
211;
212; AVX1-LABEL: 'var_ctlz_v4i64'
213; AVX1-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
214; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
215;
216; AVX2-LABEL: 'var_ctlz_v4i64'
217; AVX2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
218; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
219;
220; AVX512-LABEL: 'var_ctlz_v4i64'
221; AVX512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
222; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
223;
224; AVX512CD-LABEL: 'var_ctlz_v4i64'
225; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 false)
226; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
227;
228  %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 0)
229  ret <4 x i64> %ctlz
230}
231
232define <4 x i64> @var_ctlz_v4i64u(<4 x i64> %a) {
233; SSE2-LABEL: 'var_ctlz_v4i64u'
234; SSE2-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
235; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
236;
237; SSE42-LABEL: 'var_ctlz_v4i64u'
238; SSE42-NEXT:  Cost Model: Found an estimated cost of 46 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
239; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
240;
241; AVX1-LABEL: 'var_ctlz_v4i64u'
242; AVX1-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
243; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
244;
245; AVX2-LABEL: 'var_ctlz_v4i64u'
246; AVX2-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
247; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
248;
249; AVX512-LABEL: 'var_ctlz_v4i64u'
250; AVX512-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
251; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
252;
253; AVX512CD-LABEL: 'var_ctlz_v4i64u'
254; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 true)
255; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %ctlz
256;
257  %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %a, i1 1)
258  ret <4 x i64> %ctlz
259}
260
261define <8 x i64> @var_ctlz_v8i64(<8 x i64> %a) {
262; SSE2-LABEL: 'var_ctlz_v8i64'
263; SSE2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
264; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
265;
266; SSE42-LABEL: 'var_ctlz_v8i64'
267; SSE42-NEXT:  Cost Model: Found an estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
268; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
269;
270; AVX1-LABEL: 'var_ctlz_v8i64'
271; AVX1-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
272; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
273;
274; AVX2-LABEL: 'var_ctlz_v8i64'
275; AVX2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
276; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
277;
278; AVX512F-LABEL: 'var_ctlz_v8i64'
279; AVX512F-NEXT:  Cost Model: Found an estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
280; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
281;
282; AVX512BW-LABEL: 'var_ctlz_v8i64'
283; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
284; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
285;
286; AVX512CD-LABEL: 'var_ctlz_v8i64'
287; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
288; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
289;
290  %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 0)
291  ret <8 x i64> %ctlz
292}
293
294define <8 x i64> @var_ctlz_v8i64u(<8 x i64> %a) {
295; SSE2-LABEL: 'var_ctlz_v8i64u'
296; SSE2-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
297; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
298;
299; SSE42-LABEL: 'var_ctlz_v8i64u'
300; SSE42-NEXT:  Cost Model: Found an estimated cost of 92 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
301; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
302;
303; AVX1-LABEL: 'var_ctlz_v8i64u'
304; AVX1-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
305; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
306;
307; AVX2-LABEL: 'var_ctlz_v8i64u'
308; AVX2-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
309; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
310;
311; AVX512F-LABEL: 'var_ctlz_v8i64u'
312; AVX512F-NEXT:  Cost Model: Found an estimated cost of 29 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
313; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
314;
315; AVX512BW-LABEL: 'var_ctlz_v8i64u'
316; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 23 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
317; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
318;
319; AVX512CD-LABEL: 'var_ctlz_v8i64u'
320; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 true)
321; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i64> %ctlz
322;
323  %ctlz = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 1)
324  ret <8 x i64> %ctlz
325}
326
327define <4 x i32> @var_ctlz_v4i32(<4 x i32> %a) {
328; SSE2-LABEL: 'var_ctlz_v4i32'
329; SSE2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
330; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
331;
332; SSE42-LABEL: 'var_ctlz_v4i32'
333; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
334; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
335;
336; AVX1-LABEL: 'var_ctlz_v4i32'
337; AVX1-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
338; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
339;
340; AVX2-LABEL: 'var_ctlz_v4i32'
341; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
342; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
343;
344; AVX512-LABEL: 'var_ctlz_v4i32'
345; AVX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
346; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
347;
348; AVX512CD-LABEL: 'var_ctlz_v4i32'
349; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
350; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
351;
352; AVX-LABEL: 'var_ctlz_v4i32'
353; AVX-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 false)
354; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
355  %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 0)
356  ret <4 x i32> %ctlz
357}
358
359define <4 x i32> @var_ctlz_v4i32u(<4 x i32> %a) {
360; SSE2-LABEL: 'var_ctlz_v4i32u'
361; SSE2-NEXT:  Cost Model: Found an estimated cost of 26 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
362; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
363;
364; SSE42-LABEL: 'var_ctlz_v4i32u'
365; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
366; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
367;
368; AVX1-LABEL: 'var_ctlz_v4i32u'
369; AVX1-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
370; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
371;
372; AVX2-LABEL: 'var_ctlz_v4i32u'
373; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
374; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
375;
376; AVX512-LABEL: 'var_ctlz_v4i32u'
377; AVX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
378; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
379;
380; AVX512CD-LABEL: 'var_ctlz_v4i32u'
381; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
382; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
383;
384; AVX-LABEL: 'var_ctlz_v4i32u'
385; AVX-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 true)
386; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %ctlz
387  %ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %a, i1 1)
388  ret <4 x i32> %ctlz
389}
390
391define <8 x i32> @var_ctlz_v8i32(<8 x i32> %a) {
392; SSE2-LABEL: 'var_ctlz_v8i32'
393; SSE2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
394; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
395;
396; SSE42-LABEL: 'var_ctlz_v8i32'
397; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
398; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
399;
400; AVX1-LABEL: 'var_ctlz_v8i32'
401; AVX1-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
402; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
403;
404; AVX2-LABEL: 'var_ctlz_v8i32'
405; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
406; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
407;
408; AVX512-LABEL: 'var_ctlz_v8i32'
409; AVX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
410; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
411;
412; AVX512CD-LABEL: 'var_ctlz_v8i32'
413; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 false)
414; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
415;
416  %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 0)
417  ret <8 x i32> %ctlz
418}
419
420define <8 x i32> @var_ctlz_v8i32u(<8 x i32> %a) {
421; SSE2-LABEL: 'var_ctlz_v8i32u'
422; SSE2-NEXT:  Cost Model: Found an estimated cost of 52 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
423; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
424;
425; SSE42-LABEL: 'var_ctlz_v8i32u'
426; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
427; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
428;
429; AVX1-LABEL: 'var_ctlz_v8i32u'
430; AVX1-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
431; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
432;
433; AVX2-LABEL: 'var_ctlz_v8i32u'
434; AVX2-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
435; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
436;
437; AVX512-LABEL: 'var_ctlz_v8i32u'
438; AVX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
439; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
440;
441; AVX512CD-LABEL: 'var_ctlz_v8i32u'
442; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 true)
443; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %ctlz
444;
445  %ctlz = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %a, i1 1)
446  ret <8 x i32> %ctlz
447}
448
449define <16 x i32> @var_ctlz_v16i32(<16 x i32> %a) {
450; SSE2-LABEL: 'var_ctlz_v16i32'
451; SSE2-NEXT:  Cost Model: Found an estimated cost of 104 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
452; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
453;
454; SSE42-LABEL: 'var_ctlz_v16i32'
455; SSE42-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
456; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
457;
458; AVX1-LABEL: 'var_ctlz_v16i32'
459; AVX1-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
460; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
461;
462; AVX2-LABEL: 'var_ctlz_v16i32'
463; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
464; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
465;
466; AVX512F-LABEL: 'var_ctlz_v16i32'
467; AVX512F-NEXT:  Cost Model: Found an estimated cost of 35 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
468; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
469;
470; AVX512BW-LABEL: 'var_ctlz_v16i32'
471; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
472; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
473;
474; AVX512CD-LABEL: 'var_ctlz_v16i32'
475; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
476; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
477;
478  %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 0)
479  ret <16 x i32> %ctlz
480}
481
482define <16 x i32> @var_ctlz_v16i32u(<16 x i32> %a) {
483; SSE2-LABEL: 'var_ctlz_v16i32u'
484; SSE2-NEXT:  Cost Model: Found an estimated cost of 104 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
485; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
486;
487; SSE42-LABEL: 'var_ctlz_v16i32u'
488; SSE42-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
489; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
490;
491; AVX1-LABEL: 'var_ctlz_v16i32u'
492; AVX1-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
493; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
494;
495; AVX2-LABEL: 'var_ctlz_v16i32u'
496; AVX2-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
497; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
498;
499; AVX512F-LABEL: 'var_ctlz_v16i32u'
500; AVX512F-NEXT:  Cost Model: Found an estimated cost of 35 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
501; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
502;
503; AVX512BW-LABEL: 'var_ctlz_v16i32u'
504; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
505; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
506;
507; AVX512CD-LABEL: 'var_ctlz_v16i32u'
508; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 true)
509; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i32> %ctlz
510;
511  %ctlz = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 1)
512  ret <16 x i32> %ctlz
513}
514
515define <8 x i16> @var_ctlz_v8i16(<8 x i16> %a) {
516; SSE2-LABEL: 'var_ctlz_v8i16'
517; SSE2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
518; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
519;
520; SSE42-LABEL: 'var_ctlz_v8i16'
521; SSE42-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
522; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
523;
524; AVX1-LABEL: 'var_ctlz_v8i16'
525; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
526; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
527;
528; AVX2-LABEL: 'var_ctlz_v8i16'
529; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
530; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
531;
532; AVX512-LABEL: 'var_ctlz_v8i16'
533; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
534; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
535;
536; AVX512CD-LABEL: 'var_ctlz_v8i16'
537; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
538; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
539;
540; AVX-LABEL: 'var_ctlz_v8i16'
541; AVX-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 false)
542; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
543  %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 0)
544  ret <8 x i16> %ctlz
545}
546
547define <8 x i16> @var_ctlz_v8i16u(<8 x i16> %a) {
548; SSE2-LABEL: 'var_ctlz_v8i16u'
549; SSE2-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
550; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
551;
552; SSE42-LABEL: 'var_ctlz_v8i16u'
553; SSE42-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
554; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
555;
556; AVX1-LABEL: 'var_ctlz_v8i16u'
557; AVX1-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
558; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
559;
560; AVX2-LABEL: 'var_ctlz_v8i16u'
561; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
562; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
563;
564; AVX512-LABEL: 'var_ctlz_v8i16u'
565; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
566; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
567;
568; AVX512CD-LABEL: 'var_ctlz_v8i16u'
569; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
570; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
571;
572; AVX-LABEL: 'var_ctlz_v8i16u'
573; AVX-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 true)
574; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %ctlz
575  %ctlz = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %a, i1 1)
576  ret <8 x i16> %ctlz
577}
578
579define <16 x i16> @var_ctlz_v16i16(<16 x i16> %a) {
580; SSE2-LABEL: 'var_ctlz_v16i16'
581; SSE2-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
582; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
583;
584; SSE42-LABEL: 'var_ctlz_v16i16'
585; SSE42-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
586; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
587;
588; AVX1-LABEL: 'var_ctlz_v16i16'
589; AVX1-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
590; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
591;
592; AVX2-LABEL: 'var_ctlz_v16i16'
593; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
594; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
595;
596; AVX512-LABEL: 'var_ctlz_v16i16'
597; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
598; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
599;
600; AVX512CD-LABEL: 'var_ctlz_v16i16'
601; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 false)
602; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
603;
604  %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 0)
605  ret <16 x i16> %ctlz
606}
607
608define <16 x i16> @var_ctlz_v16i16u(<16 x i16> %a) {
609; SSE2-LABEL: 'var_ctlz_v16i16u'
610; SSE2-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
611; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
612;
613; SSE42-LABEL: 'var_ctlz_v16i16u'
614; SSE42-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
615; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
616;
617; AVX1-LABEL: 'var_ctlz_v16i16u'
618; AVX1-NEXT:  Cost Model: Found an estimated cost of 30 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
619; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
620;
621; AVX2-LABEL: 'var_ctlz_v16i16u'
622; AVX2-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
623; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
624;
625; AVX512-LABEL: 'var_ctlz_v16i16u'
626; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
627; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
628;
629; AVX512CD-LABEL: 'var_ctlz_v16i16u'
630; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 true)
631; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %ctlz
632;
633  %ctlz = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %a, i1 1)
634  ret <16 x i16> %ctlz
635}
636
637define <32 x i16> @var_ctlz_v32i16(<32 x i16> %a) {
638; SSE2-LABEL: 'var_ctlz_v32i16'
639; SSE2-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
640; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
641;
642; SSE42-LABEL: 'var_ctlz_v32i16'
643; SSE42-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
644; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
645;
646; AVX1-LABEL: 'var_ctlz_v32i16'
647; AVX1-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
648; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
649;
650; AVX2-LABEL: 'var_ctlz_v32i16'
651; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
652; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
653;
654; AVX512F-LABEL: 'var_ctlz_v32i16'
655; AVX512F-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
656; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
657;
658; AVX512BW-LABEL: 'var_ctlz_v32i16'
659; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
660; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
661;
662; AVX512CD-LABEL: 'var_ctlz_v32i16'
663; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 false)
664; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
665;
666  %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 0)
667  ret <32 x i16> %ctlz
668}
669
670define <32 x i16> @var_ctlz_v32i16u(<32 x i16> %a) {
671; SSE2-LABEL: 'var_ctlz_v32i16u'
672; SSE2-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
673; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
674;
675; SSE42-LABEL: 'var_ctlz_v32i16u'
676; SSE42-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
677; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
678;
679; AVX1-LABEL: 'var_ctlz_v32i16u'
680; AVX1-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
681; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
682;
683; AVX2-LABEL: 'var_ctlz_v32i16u'
684; AVX2-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
685; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
686;
687; AVX512F-LABEL: 'var_ctlz_v32i16u'
688; AVX512F-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
689; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
690;
691; AVX512BW-LABEL: 'var_ctlz_v32i16u'
692; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
693; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
694;
695; AVX512CD-LABEL: 'var_ctlz_v32i16u'
696; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 true)
697; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i16> %ctlz
698;
699  %ctlz = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a, i1 1)
700  ret <32 x i16> %ctlz
701}
702
703define <16 x i8> @var_ctlz_v16i8(<16 x i8> %a) {
704; SSE2-LABEL: 'var_ctlz_v16i8'
705; SSE2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
706; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
707;
708; SSE42-LABEL: 'var_ctlz_v16i8'
709; SSE42-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
710; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
711;
712; AVX1-LABEL: 'var_ctlz_v16i8'
713; AVX1-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
714; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
715;
716; AVX2-LABEL: 'var_ctlz_v16i8'
717; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
718; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
719;
720; AVX512-LABEL: 'var_ctlz_v16i8'
721; AVX512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
722; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
723;
724; AVX512CD-LABEL: 'var_ctlz_v16i8'
725; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
726; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
727;
728; AVX-LABEL: 'var_ctlz_v16i8'
729; AVX-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 false)
730; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
731  %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 0)
732  ret <16 x i8> %ctlz
733}
734
735define <16 x i8> @var_ctlz_v16i8u(<16 x i8> %a) {
736; SSE2-LABEL: 'var_ctlz_v16i8u'
737; SSE2-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
738; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
739;
740; SSE42-LABEL: 'var_ctlz_v16i8u'
741; SSE42-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
742; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
743;
744; AVX1-LABEL: 'var_ctlz_v16i8u'
745; AVX1-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
746; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
747;
748; AVX2-LABEL: 'var_ctlz_v16i8u'
749; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
750; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
751;
752; AVX512-LABEL: 'var_ctlz_v16i8u'
753; AVX512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
754; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
755;
756; AVX512CD-LABEL: 'var_ctlz_v16i8u'
757; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
758; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
759;
760; AVX-LABEL: 'var_ctlz_v16i8u'
761; AVX-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 true)
762; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %ctlz
763  %ctlz = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %a, i1 1)
764  ret <16 x i8> %ctlz
765}
766
767define <32 x i8> @var_ctlz_v32i8(<32 x i8> %a) {
768; SSE2-LABEL: 'var_ctlz_v32i8'
769; SSE2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
770; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
771;
772; SSE42-LABEL: 'var_ctlz_v32i8'
773; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
774; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
775;
776; AVX1-LABEL: 'var_ctlz_v32i8'
777; AVX1-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
778; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
779;
780; AVX2-LABEL: 'var_ctlz_v32i8'
781; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
782; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
783;
784; AVX512-LABEL: 'var_ctlz_v32i8'
785; AVX512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
786; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
787;
788; AVX512CD-LABEL: 'var_ctlz_v32i8'
789; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 false)
790; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
791;
792  %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
793  ret <32 x i8> %ctlz
794}
795
796define <32 x i8> @var_ctlz_v32i8u(<32 x i8> %a) {
797; SSE2-LABEL: 'var_ctlz_v32i8u'
798; SSE2-NEXT:  Cost Model: Found an estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
799; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
800;
801; SSE42-LABEL: 'var_ctlz_v32i8u'
802; SSE42-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
803; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
804;
805; AVX1-LABEL: 'var_ctlz_v32i8u'
806; AVX1-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
807; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
808;
809; AVX2-LABEL: 'var_ctlz_v32i8u'
810; AVX2-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
811; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
812;
813; AVX512-LABEL: 'var_ctlz_v32i8u'
814; AVX512-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
815; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
816;
817; AVX512CD-LABEL: 'var_ctlz_v32i8u'
818; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 true)
819; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %ctlz
820;
821  %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1)
822  ret <32 x i8> %ctlz
823}
824
825define <64 x i8> @var_ctlz_v64i8(<64 x i8> %a) {
826; SSE2-LABEL: 'var_ctlz_v64i8'
827; SSE2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
828; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
829;
830; SSE42-LABEL: 'var_ctlz_v64i8'
831; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
832; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
833;
834; AVX1-LABEL: 'var_ctlz_v64i8'
835; AVX1-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
836; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
837;
838; AVX2-LABEL: 'var_ctlz_v64i8'
839; AVX2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
840; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
841;
842; AVX512F-LABEL: 'var_ctlz_v64i8'
843; AVX512F-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
844; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
845;
846; AVX512BW-LABEL: 'var_ctlz_v64i8'
847; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
848; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
849;
850; AVX512CD-LABEL: 'var_ctlz_v64i8'
851; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 false)
852; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
853;
854  %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 0)
855  ret <64 x i8> %ctlz
856}
857
858define <64 x i8> @var_ctlz_v64i8u(<64 x i8> %a) {
859; SSE2-LABEL: 'var_ctlz_v64i8u'
860; SSE2-NEXT:  Cost Model: Found an estimated cost of 68 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
861; SSE2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
862;
863; SSE42-LABEL: 'var_ctlz_v64i8u'
864; SSE42-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
865; SSE42-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
866;
867; AVX1-LABEL: 'var_ctlz_v64i8u'
868; AVX1-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
869; AVX1-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
870;
871; AVX2-LABEL: 'var_ctlz_v64i8u'
872; AVX2-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
873; AVX2-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
874;
875; AVX512F-LABEL: 'var_ctlz_v64i8u'
876; AVX512F-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
877; AVX512F-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
878;
879; AVX512BW-LABEL: 'var_ctlz_v64i8u'
880; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 17 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
881; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
882;
883; AVX512CD-LABEL: 'var_ctlz_v64i8u'
884; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 true)
885; AVX512CD-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <64 x i8> %ctlz
886;
887  %ctlz = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %a, i1 1)
888  ret <64 x i8> %ctlz
889}
890