1// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*- 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// WebAssembly Instruction definitions. 12/// 13//===----------------------------------------------------------------------===// 14 15//===----------------------------------------------------------------------===// 16// WebAssembly Instruction Predicate Definitions. 17//===----------------------------------------------------------------------===// 18 19def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">; 20def HasAddr64 : Predicate<"Subtarget->hasAddr64()">; 21def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">, 22 AssemblerPredicate<"FeatureSIMD128", "simd128">; 23def HasAtomics : Predicate<"Subtarget->hasAtomics()">, 24 AssemblerPredicate<"FeatureAtomics", "atomics">; 25def HasNontrappingFPToInt : 26 Predicate<"Subtarget->hasNontrappingFPToInt()">, 27 AssemblerPredicate<"FeatureNontrappingFPToInt", 28 "nontrapping-fptoint">; 29def NotHasNontrappingFPToInt : 30 Predicate<"!Subtarget->hasNontrappingFPToInt()">, 31 AssemblerPredicate<"!FeatureNontrappingFPToInt", 32 "nontrapping-fptoint">; 33def HasSignExt : 34 Predicate<"Subtarget->hasSignExt()">, 35 AssemblerPredicate<"FeatureSignExt", 36 "sign-ext">; 37def NotHasSignExt : 38 Predicate<"!Subtarget->hasSignExt()">, 39 AssemblerPredicate<"!FeatureSignExt", 40 "sign-ext">; 41 42def HasExceptionHandling : 43 Predicate<"Subtarget->hasExceptionHandling()">, 44 AssemblerPredicate<"FeatureExceptionHandling", 45 "exception-handling">; 46 47def NotHasExceptionHandling : 48 Predicate<"!Subtarget->hasExceptionHandling()">, 49 AssemblerPredicate<"!FeatureExceptionHandling", 50 "exception-handling">; 51 52//===----------------------------------------------------------------------===// 53// WebAssembly-specific DAG Node Types. 54//===----------------------------------------------------------------------===// 55 56def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 57 SDTCisVT<1, iPTR>]>; 58def SDT_WebAssemblyCallSeqEnd : 59 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 60def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 61def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>; 62def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 63def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; 64def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>; 65def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, 66 SDTCisPtrTy<0>]>; 67 68//===----------------------------------------------------------------------===// 69// WebAssembly-specific DAG Nodes. 70//===----------------------------------------------------------------------===// 71 72def WebAssemblycallseq_start : 73 SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart, 74 [SDNPHasChain, SDNPOutGlue]>; 75def WebAssemblycallseq_end : 76 SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd, 77 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; 78def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0", 79 SDT_WebAssemblyCall0, 80 [SDNPHasChain, SDNPVariadic]>; 81def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1", 82 SDT_WebAssemblyCall1, 83 [SDNPHasChain, SDNPVariadic]>; 84def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE", 85 SDT_WebAssemblyBrTable, 86 [SDNPHasChain, SDNPVariadic]>; 87def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT", 88 SDT_WebAssemblyArgument>; 89def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN", 90 SDT_WebAssemblyReturn, [SDNPHasChain]>; 91def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper", 92 SDT_WebAssemblyWrapper>; 93 94//===----------------------------------------------------------------------===// 95// WebAssembly-specific Operands. 96//===----------------------------------------------------------------------===// 97 98let OperandNamespace = "WebAssembly" in { 99 100let OperandType = "OPERAND_BASIC_BLOCK" in 101def bb_op : Operand<OtherVT>; 102 103let OperandType = "OPERAND_LOCAL" in 104def local_op : Operand<i32>; 105 106let OperandType = "OPERAND_GLOBAL" in 107def global_op : Operand<i32>; 108 109let OperandType = "OPERAND_I32IMM" in 110def i32imm_op : Operand<i32>; 111 112let OperandType = "OPERAND_I64IMM" in 113def i64imm_op : Operand<i64>; 114 115let OperandType = "OPERAND_F32IMM" in 116def f32imm_op : Operand<f32>; 117 118let OperandType = "OPERAND_F64IMM" in 119def f64imm_op : Operand<f64>; 120 121let OperandType = "OPERAND_VEC_I8IMM" in 122def vec_i8imm_op : Operand<i32>; 123 124let OperandType = "OPERAND_VEC_I16IMM" in 125def vec_i16imm_op : Operand<i32>; 126 127let OperandType = "OPERAND_VEC_I32IMM" in 128def vec_i32imm_op : Operand<i32>; 129 130let OperandType = "OPERAND_VEC_I64IMM" in 131def vec_i64imm_op : Operand<i64>; 132 133let OperandType = "OPERAND_FUNCTION32" in 134def function32_op : Operand<i32>; 135 136let OperandType = "OPERAND_OFFSET32" in 137def offset32_op : Operand<i32>; 138 139let OperandType = "OPERAND_P2ALIGN" in { 140def P2Align : Operand<i32> { 141 let PrintMethod = "printWebAssemblyP2AlignOperand"; 142} 143} // OperandType = "OPERAND_P2ALIGN" 144 145let OperandType = "OPERAND_SIGNATURE" in { 146def Signature : Operand<i32> { 147 let PrintMethod = "printWebAssemblySignatureOperand"; 148} 149} // OperandType = "OPERAND_SIGNATURE" 150 151let OperandType = "OPERAND_TYPEINDEX" in 152def TypeIndex : Operand<i32>; 153 154} // OperandNamespace = "WebAssembly" 155 156//===----------------------------------------------------------------------===// 157// WebAssembly Register to Stack instruction mapping 158//===----------------------------------------------------------------------===// 159 160class StackRel; 161def getStackOpcode : InstrMapping { 162 let FilterClass = "StackRel"; 163 let RowFields = ["BaseName"]; 164 let ColFields = ["StackBased"]; 165 let KeyCol = ["false"]; 166 let ValueCols = [["true"]]; 167} 168 169//===----------------------------------------------------------------------===// 170// WebAssembly Instruction Format Definitions. 171//===----------------------------------------------------------------------===// 172 173include "WebAssemblyInstrFormats.td" 174 175//===----------------------------------------------------------------------===// 176// Additional instructions. 177//===----------------------------------------------------------------------===// 178 179multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> { 180 let hasSideEffects = 1, isCodeGenOnly = 1, 181 Defs = []<Register>, Uses = [ARGUMENTS] in 182 defm ARGUMENT_#vt : 183 I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno), 184 [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>; 185} 186defm "": ARGUMENT<I32, i32>; 187defm "": ARGUMENT<I64, i64>; 188defm "": ARGUMENT<F32, f32>; 189defm "": ARGUMENT<F64, f64>; 190defm "": ARGUMENT<EXCEPT_REF, ExceptRef>; 191 192// get_local and set_local are not generated by instruction selection; they 193// are implied by virtual register uses and defs. 194multiclass LOCAL<WebAssemblyRegClass vt> { 195let hasSideEffects = 0 in { 196 // COPY is not an actual instruction in wasm, but since we allow get_local and 197 // set_local to be implicit during most of codegen, we can have a COPY which 198 // is actually a no-op because all the work is done in the implied get_local 199 // and set_local. COPYs are eliminated (and replaced with 200 // get_local/set_local) in the ExplicitLocals pass. 201 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 202 defm COPY_#vt : I<(outs vt:$res), (ins vt:$src), (outs), (ins), [], 203 "copy_local\t$res, $src", "copy_local">; 204 205 // TEE is similar to COPY, but writes two copies of its result. Typically 206 // this would be used to stackify one result and write the other result to a 207 // local. 208 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 209 defm TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), (outs), (ins), [], 210 "tee_local\t$res, $also, $src", "tee_local">; 211 212 // This is the actual get_local instruction in wasm. These are made explicit 213 // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm 214 // local, which is a side effect not otherwise modeled in LLVM. 215 let mayLoad = 1, isAsCheapAsAMove = 1 in 216 defm GET_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local), 217 (outs), (ins local_op:$local), [], 218 "get_local\t$res, $local", "get_local\t$local", 0x20>; 219 220 // This is the actual set_local instruction in wasm. These are made explicit 221 // by the ExplicitLocals pass. It has mayStore because it writes to a wasm 222 // local, which is a side effect not otherwise modeled in LLVM. 223 let mayStore = 1, isAsCheapAsAMove = 1 in 224 defm SET_LOCAL_#vt : I<(outs), (ins local_op:$local, vt:$src), 225 (outs), (ins local_op:$local), [], 226 "set_local\t$local, $src", "set_local\t$local", 0x21>; 227 228 // This is the actual tee_local instruction in wasm. TEEs are turned into 229 // TEE_LOCALs by the ExplicitLocals pass. It has mayStore for the same reason 230 // as SET_LOCAL. 231 let mayStore = 1, isAsCheapAsAMove = 1 in 232 defm TEE_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src), 233 (outs), (ins local_op:$local), [], 234 "tee_local\t$res, $local, $src", "tee_local\t$local", 235 0x22>; 236 237 // Unused values must be dropped in some contexts. 238 defm DROP_#vt : I<(outs), (ins vt:$src), (outs), (ins), [], 239 "drop\t$src", "drop", 0x1a>; 240 241 let mayLoad = 1 in 242 defm GET_GLOBAL_#vt : I<(outs vt:$res), (ins global_op:$local), 243 (outs), (ins global_op:$local), [], 244 "get_global\t$res, $local", "get_global\t$local", 245 0x23>; 246 247 let mayStore = 1 in 248 defm SET_GLOBAL_#vt : I<(outs), (ins global_op:$local, vt:$src), 249 (outs), (ins global_op:$local), [], 250 "set_global\t$local, $src", "set_global\t$local", 251 0x24>; 252 253} // hasSideEffects = 0 254} 255defm "" : LOCAL<I32>; 256defm "" : LOCAL<I64>; 257defm "" : LOCAL<F32>; 258defm "" : LOCAL<F64>; 259defm "" : LOCAL<V128>, Requires<[HasSIMD128]>; 260defm "" : LOCAL<EXCEPT_REF>, Requires<[HasExceptionHandling]>; 261 262let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in { 263defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm), 264 (outs), (ins i32imm_op:$imm), 265 [(set I32:$res, imm:$imm)], 266 "i32.const\t$res, $imm", "i32.const\t$imm", 0x41>; 267defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm), 268 (outs), (ins i64imm_op:$imm), 269 [(set I64:$res, imm:$imm)], 270 "i64.const\t$res, $imm", "i64.const\t$imm", 0x42>; 271defm CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm), 272 (outs), (ins f32imm_op:$imm), 273 [(set F32:$res, fpimm:$imm)], 274 "f32.const\t$res, $imm", "f32.const\t$imm", 0x43>; 275defm CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm), 276 (outs), (ins f64imm_op:$imm), 277 [(set F64:$res, fpimm:$imm)], 278 "f64.const\t$res, $imm", "f64.const\t$imm", 0x44>; 279} // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 280 281def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)), 282 (CONST_I32 tglobaladdr:$addr)>; 283def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)), 284 (CONST_I32 texternalsym:$addr)>; 285def : Pat<(i32 (WebAssemblywrapper mcsym:$sym)), (CONST_I32 mcsym:$sym)>; 286def : Pat<(i64 (WebAssemblywrapper mcsym:$sym)), (CONST_I64 mcsym:$sym)>; 287 288//===----------------------------------------------------------------------===// 289// Additional sets of instructions. 290//===----------------------------------------------------------------------===// 291 292include "WebAssemblyInstrMemory.td" 293include "WebAssemblyInstrCall.td" 294include "WebAssemblyInstrControl.td" 295include "WebAssemblyInstrInteger.td" 296include "WebAssemblyInstrConv.td" 297include "WebAssemblyInstrFloat.td" 298include "WebAssemblyInstrAtomics.td" 299include "WebAssemblyInstrSIMD.td" 300include "WebAssemblyInstrExceptRef.td" 301