1// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// WebAssembly Instruction definitions.
12///
13//===----------------------------------------------------------------------===//
14
15//===----------------------------------------------------------------------===//
16// WebAssembly Instruction Predicate Definitions.
17//===----------------------------------------------------------------------===//
18
19def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">;
20def HasAddr64 : Predicate<"Subtarget->hasAddr64()">;
21def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
22                           AssemblerPredicate<"FeatureSIMD128", "simd128">;
23def HasAtomics : Predicate<"Subtarget->hasAtomics()">,
24                           AssemblerPredicate<"FeatureAtomics", "atomics">;
25def HasNontrappingFPToInt :
26    Predicate<"Subtarget->hasNontrappingFPToInt()">,
27              AssemblerPredicate<"FeatureNontrappingFPToInt",
28                                 "nontrapping-fptoint">;
29def NotHasNontrappingFPToInt :
30    Predicate<"!Subtarget->hasNontrappingFPToInt()">,
31              AssemblerPredicate<"!FeatureNontrappingFPToInt",
32                                 "nontrapping-fptoint">;
33def HasSignExt :
34    Predicate<"Subtarget->hasSignExt()">,
35              AssemblerPredicate<"FeatureSignExt",
36                                 "sign-ext">;
37def NotHasSignExt :
38    Predicate<"!Subtarget->hasSignExt()">,
39              AssemblerPredicate<"!FeatureSignExt",
40                                 "sign-ext">;
41
42def HasExceptionHandling :
43    Predicate<"Subtarget->hasExceptionHandling()">,
44              AssemblerPredicate<"FeatureExceptionHandling",
45                                 "exception-handling">;
46
47def NotHasExceptionHandling :
48    Predicate<"!Subtarget->hasExceptionHandling()">,
49              AssemblerPredicate<"!FeatureExceptionHandling",
50                                 "exception-handling">;
51
52//===----------------------------------------------------------------------===//
53// WebAssembly-specific DAG Node Types.
54//===----------------------------------------------------------------------===//
55
56def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
57                                                  SDTCisVT<1, iPTR>]>;
58def SDT_WebAssemblyCallSeqEnd :
59    SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
60def SDT_WebAssemblyCall0    : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
61def SDT_WebAssemblyCall1    : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
62def SDT_WebAssemblyBrTable  : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
63def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
64def SDT_WebAssemblyReturn   : SDTypeProfile<0, -1, []>;
65def SDT_WebAssemblyWrapper  : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
66                                                   SDTCisPtrTy<0>]>;
67def SDT_WebAssemblyThrow    : SDTypeProfile<0, 2, [SDTCisPtrTy<0>]>;
68
69//===----------------------------------------------------------------------===//
70// WebAssembly-specific DAG Nodes.
71//===----------------------------------------------------------------------===//
72
73def WebAssemblycallseq_start :
74    SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart,
75           [SDNPHasChain, SDNPOutGlue]>;
76def WebAssemblycallseq_end :
77    SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
78           [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
79def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
80                              SDT_WebAssemblyCall0,
81                              [SDNPHasChain, SDNPVariadic]>;
82def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
83                              SDT_WebAssemblyCall1,
84                              [SDNPHasChain, SDNPVariadic]>;
85def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE",
86                                 SDT_WebAssemblyBrTable,
87                                 [SDNPHasChain, SDNPVariadic]>;
88def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
89                                 SDT_WebAssemblyArgument>;
90def WebAssemblyreturn   : SDNode<"WebAssemblyISD::RETURN",
91                                 SDT_WebAssemblyReturn, [SDNPHasChain]>;
92def WebAssemblywrapper  : SDNode<"WebAssemblyISD::Wrapper",
93                                 SDT_WebAssemblyWrapper>;
94def WebAssemblythrow : SDNode<"WebAssemblyISD::THROW", SDT_WebAssemblyThrow,
95                              [SDNPHasChain]>;
96
97//===----------------------------------------------------------------------===//
98// WebAssembly-specific Operands.
99//===----------------------------------------------------------------------===//
100
101let OperandNamespace = "WebAssembly" in {
102
103let OperandType = "OPERAND_BASIC_BLOCK" in
104def bb_op : Operand<OtherVT>;
105
106let OperandType = "OPERAND_LOCAL" in
107def local_op : Operand<i32>;
108
109let OperandType = "OPERAND_GLOBAL" in
110def global_op : Operand<i32>;
111
112let OperandType = "OPERAND_I32IMM" in
113def i32imm_op : Operand<i32>;
114
115let OperandType = "OPERAND_I64IMM" in
116def i64imm_op : Operand<i64>;
117
118let OperandType = "OPERAND_F32IMM" in
119def f32imm_op : Operand<f32>;
120
121let OperandType = "OPERAND_F64IMM" in
122def f64imm_op : Operand<f64>;
123
124let OperandType = "OPERAND_VEC_I8IMM" in
125def vec_i8imm_op : Operand<i32>;
126
127let OperandType = "OPERAND_VEC_I16IMM" in
128def vec_i16imm_op : Operand<i32>;
129
130let OperandType = "OPERAND_VEC_I32IMM" in
131def vec_i32imm_op : Operand<i32>;
132
133let OperandType = "OPERAND_VEC_I64IMM" in
134def vec_i64imm_op : Operand<i64>;
135
136let OperandType = "OPERAND_FUNCTION32" in
137def function32_op : Operand<i32>;
138
139let OperandType = "OPERAND_OFFSET32" in
140def offset32_op : Operand<i32>;
141
142let OperandType = "OPERAND_P2ALIGN" in {
143def P2Align : Operand<i32> {
144  let PrintMethod = "printWebAssemblyP2AlignOperand";
145}
146
147let OperandType = "OPERAND_EVENT" in
148def event_op : Operand<i32>;
149
150} // OperandType = "OPERAND_P2ALIGN"
151
152let OperandType = "OPERAND_SIGNATURE" in {
153def Signature : Operand<i32> {
154  let PrintMethod = "printWebAssemblySignatureOperand";
155}
156} // OperandType = "OPERAND_SIGNATURE"
157
158let OperandType = "OPERAND_TYPEINDEX" in
159def TypeIndex : Operand<i32>;
160
161} // OperandNamespace = "WebAssembly"
162
163//===----------------------------------------------------------------------===//
164// WebAssembly Register to Stack instruction mapping
165//===----------------------------------------------------------------------===//
166
167class StackRel;
168def getStackOpcode : InstrMapping {
169  let FilterClass = "StackRel";
170  let RowFields = ["BaseName"];
171  let ColFields = ["StackBased"];
172  let KeyCol = ["false"];
173  let ValueCols = [["true"]];
174}
175
176//===----------------------------------------------------------------------===//
177// WebAssembly Instruction Format Definitions.
178//===----------------------------------------------------------------------===//
179
180include "WebAssemblyInstrFormats.td"
181
182//===----------------------------------------------------------------------===//
183// Additional instructions.
184//===----------------------------------------------------------------------===//
185
186multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> {
187  let hasSideEffects = 1, isCodeGenOnly = 1,
188      Defs = []<Register>, Uses = [ARGUMENTS] in
189  defm ARGUMENT_#vt :
190    I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno),
191      [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>;
192}
193defm "": ARGUMENT<I32, i32>;
194defm "": ARGUMENT<I64, i64>;
195defm "": ARGUMENT<F32, f32>;
196defm "": ARGUMENT<F64, f64>;
197defm "": ARGUMENT<EXCEPT_REF, ExceptRef>;
198
199// get_local and set_local are not generated by instruction selection; they
200// are implied by virtual register uses and defs.
201multiclass LOCAL<WebAssemblyRegClass vt> {
202let hasSideEffects = 0 in {
203  // COPY is not an actual instruction in wasm, but since we allow get_local and
204  // set_local to be implicit during most of codegen, we can have a COPY which
205  // is actually a no-op because all the work is done in the implied get_local
206  // and set_local. COPYs are eliminated (and replaced with
207  // get_local/set_local) in the ExplicitLocals pass.
208  let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
209  defm COPY_#vt : I<(outs vt:$res), (ins vt:$src), (outs), (ins), [],
210                    "copy_local\t$res, $src", "copy_local">;
211
212  // TEE is similar to COPY, but writes two copies of its result. Typically
213  // this would be used to stackify one result and write the other result to a
214  // local.
215  let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
216  defm TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), (outs), (ins), [],
217                   "tee_local\t$res, $also, $src", "tee_local">;
218
219  // This is the actual get_local instruction in wasm. These are made explicit
220  // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm
221  // local, which is a side effect not otherwise modeled in LLVM.
222  let mayLoad = 1, isAsCheapAsAMove = 1 in
223  defm GET_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local),
224                         (outs), (ins local_op:$local), [],
225                         "get_local\t$res, $local", "get_local\t$local", 0x20>;
226
227  // This is the actual set_local instruction in wasm. These are made explicit
228  // by the ExplicitLocals pass. It has mayStore because it writes to a wasm
229  // local, which is a side effect not otherwise modeled in LLVM.
230  let mayStore = 1, isAsCheapAsAMove = 1 in
231  defm SET_LOCAL_#vt : I<(outs), (ins local_op:$local, vt:$src),
232                         (outs), (ins local_op:$local), [],
233                         "set_local\t$local, $src", "set_local\t$local", 0x21>;
234
235  // This is the actual tee_local instruction in wasm. TEEs are turned into
236  // TEE_LOCALs by the ExplicitLocals pass. It has mayStore for the same reason
237  // as SET_LOCAL.
238  let mayStore = 1, isAsCheapAsAMove = 1 in
239  defm TEE_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src),
240                         (outs), (ins local_op:$local), [],
241                         "tee_local\t$res, $local, $src", "tee_local\t$local",
242                         0x22>;
243
244  // Unused values must be dropped in some contexts.
245  defm DROP_#vt : I<(outs), (ins vt:$src), (outs), (ins), [],
246                    "drop\t$src", "drop", 0x1a>;
247
248  let mayLoad = 1 in
249  defm GET_GLOBAL_#vt : I<(outs vt:$res), (ins global_op:$local),
250                          (outs), (ins global_op:$local), [],
251                          "get_global\t$res, $local", "get_global\t$local",
252                          0x23>;
253
254  let mayStore = 1 in
255  defm SET_GLOBAL_#vt : I<(outs), (ins global_op:$local, vt:$src),
256                          (outs), (ins global_op:$local), [],
257                          "set_global\t$local, $src", "set_global\t$local",
258                          0x24>;
259
260} // hasSideEffects = 0
261}
262defm "" : LOCAL<I32>;
263defm "" : LOCAL<I64>;
264defm "" : LOCAL<F32>;
265defm "" : LOCAL<F64>;
266defm "" : LOCAL<V128>, Requires<[HasSIMD128]>;
267defm "" : LOCAL<EXCEPT_REF>, Requires<[HasExceptionHandling]>;
268
269let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in {
270defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm),
271                   (outs), (ins i32imm_op:$imm),
272                   [(set I32:$res, imm:$imm)],
273                   "i32.const\t$res, $imm", "i32.const\t$imm", 0x41>;
274defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm),
275                   (outs), (ins i64imm_op:$imm),
276                   [(set I64:$res, imm:$imm)],
277                   "i64.const\t$res, $imm", "i64.const\t$imm", 0x42>;
278defm CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm),
279                   (outs), (ins f32imm_op:$imm),
280                   [(set F32:$res, fpimm:$imm)],
281                   "f32.const\t$res, $imm", "f32.const\t$imm", 0x43>;
282defm CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm),
283                   (outs), (ins f64imm_op:$imm),
284                   [(set F64:$res, fpimm:$imm)],
285                   "f64.const\t$res, $imm", "f64.const\t$imm", 0x44>;
286} // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1
287
288def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)),
289          (CONST_I32 tglobaladdr:$addr)>;
290def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)),
291          (CONST_I32 texternalsym:$addr)>;
292def : Pat<(i32 (WebAssemblywrapper mcsym:$sym)), (CONST_I32 mcsym:$sym)>;
293def : Pat<(i64 (WebAssemblywrapper mcsym:$sym)), (CONST_I64 mcsym:$sym)>;
294
295//===----------------------------------------------------------------------===//
296// Additional sets of instructions.
297//===----------------------------------------------------------------------===//
298
299include "WebAssemblyInstrMemory.td"
300include "WebAssemblyInstrCall.td"
301include "WebAssemblyInstrControl.td"
302include "WebAssemblyInstrInteger.td"
303include "WebAssemblyInstrConv.td"
304include "WebAssemblyInstrFloat.td"
305include "WebAssemblyInstrAtomics.td"
306include "WebAssemblyInstrSIMD.td"
307include "WebAssemblyInstrExceptRef.td"
308