1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains a printer that converts from our internal representation 11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 12 // the output mechanism used by `llc'. 13 // 14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 16 // 17 //===----------------------------------------------------------------------===// 18 19 #include "PPC.h" 20 #include "InstPrinter/PPCInstPrinter.h" 21 #include "MCTargetDesc/PPCMCExpr.h" 22 #include "MCTargetDesc/PPCPredicates.h" 23 #include "PPCMachineFunctionInfo.h" 24 #include "PPCSubtarget.h" 25 #include "PPCTargetMachine.h" 26 #include "PPCTargetStreamer.h" 27 #include "llvm/ADT/MapVector.h" 28 #include "llvm/ADT/StringExtras.h" 29 #include "llvm/CodeGen/AsmPrinter.h" 30 #include "llvm/CodeGen/MachineConstantPool.h" 31 #include "llvm/CodeGen/MachineFunctionPass.h" 32 #include "llvm/CodeGen/MachineInstr.h" 33 #include "llvm/CodeGen/MachineInstrBuilder.h" 34 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 35 #include "llvm/CodeGen/MachineRegisterInfo.h" 36 #include "llvm/CodeGen/StackMaps.h" 37 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 38 #include "llvm/IR/Constants.h" 39 #include "llvm/IR/DebugInfo.h" 40 #include "llvm/IR/DerivedTypes.h" 41 #include "llvm/IR/Mangler.h" 42 #include "llvm/IR/Module.h" 43 #include "llvm/MC/MCAsmInfo.h" 44 #include "llvm/MC/MCContext.h" 45 #include "llvm/MC/MCExpr.h" 46 #include "llvm/MC/MCInst.h" 47 #include "llvm/MC/MCInstBuilder.h" 48 #include "llvm/MC/MCSectionELF.h" 49 #include "llvm/MC/MCSectionMachO.h" 50 #include "llvm/MC/MCStreamer.h" 51 #include "llvm/MC/MCSymbolELF.h" 52 #include "llvm/Support/Debug.h" 53 #include "llvm/Support/ELF.h" 54 #include "llvm/Support/ErrorHandling.h" 55 #include "llvm/Support/MathExtras.h" 56 #include "llvm/Support/TargetRegistry.h" 57 #include "llvm/Support/raw_ostream.h" 58 #include "llvm/Target/TargetInstrInfo.h" 59 #include "llvm/Target/TargetOptions.h" 60 #include "llvm/Target/TargetRegisterInfo.h" 61 using namespace llvm; 62 63 #define DEBUG_TYPE "asmprinter" 64 65 namespace { 66 class PPCAsmPrinter : public AsmPrinter { 67 protected: 68 MapVector<MCSymbol *, MCSymbol *> TOC; 69 const PPCSubtarget *Subtarget; 70 StackMaps SM; 71 72 public: 73 explicit PPCAsmPrinter(TargetMachine &TM, 74 std::unique_ptr<MCStreamer> Streamer) 75 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 76 77 const char *getPassName() const override { 78 return "PowerPC Assembly Printer"; 79 } 80 81 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 82 83 virtual bool doInitialization(Module &M) override { 84 if (!TOC.empty()) 85 TOC.clear(); 86 return AsmPrinter::doInitialization(M); 87 } 88 89 void EmitInstruction(const MachineInstr *MI) override; 90 91 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 92 93 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 94 unsigned AsmVariant, const char *ExtraCode, 95 raw_ostream &O) override; 96 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 97 unsigned AsmVariant, const char *ExtraCode, 98 raw_ostream &O) override; 99 100 void EmitEndOfAsmFile(Module &M) override; 101 102 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 103 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 104 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 105 bool runOnMachineFunction(MachineFunction &MF) override { 106 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 107 return AsmPrinter::runOnMachineFunction(MF); 108 } 109 }; 110 111 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 112 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 113 public: 114 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 115 std::unique_ptr<MCStreamer> Streamer) 116 : PPCAsmPrinter(TM, std::move(Streamer)) {} 117 118 const char *getPassName() const override { 119 return "Linux PPC Assembly Printer"; 120 } 121 122 bool doFinalization(Module &M) override; 123 void EmitStartOfAsmFile(Module &M) override; 124 125 void EmitFunctionEntryLabel() override; 126 127 void EmitFunctionBodyStart() override; 128 void EmitFunctionBodyEnd() override; 129 }; 130 131 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 132 /// OS X 133 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 134 public: 135 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 136 std::unique_ptr<MCStreamer> Streamer) 137 : PPCAsmPrinter(TM, std::move(Streamer)) {} 138 139 const char *getPassName() const override { 140 return "Darwin PPC Assembly Printer"; 141 } 142 143 bool doFinalization(Module &M) override; 144 void EmitStartOfAsmFile(Module &M) override; 145 }; 146 } // end of anonymous namespace 147 148 /// stripRegisterPrefix - This method strips the character prefix from a 149 /// register name so that only the number is left. Used by for linux asm. 150 static const char *stripRegisterPrefix(const char *RegName) { 151 switch (RegName[0]) { 152 case 'r': 153 case 'f': 154 case 'q': // for QPX 155 case 'v': 156 if (RegName[1] == 's') 157 return RegName + 2; 158 return RegName + 1; 159 case 'c': if (RegName[1] == 'r') return RegName + 2; 160 } 161 162 return RegName; 163 } 164 165 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 166 raw_ostream &O) { 167 const DataLayout &DL = getDataLayout(); 168 const MachineOperand &MO = MI->getOperand(OpNo); 169 170 switch (MO.getType()) { 171 case MachineOperand::MO_Register: { 172 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 173 // Linux assembler (Others?) does not take register mnemonics. 174 // FIXME - What about special registers used in mfspr/mtspr? 175 if (!Subtarget->isDarwin()) 176 RegName = stripRegisterPrefix(RegName); 177 O << RegName; 178 return; 179 } 180 case MachineOperand::MO_Immediate: 181 O << MO.getImm(); 182 return; 183 184 case MachineOperand::MO_MachineBasicBlock: 185 MO.getMBB()->getSymbol()->print(O, MAI); 186 return; 187 case MachineOperand::MO_ConstantPoolIndex: 188 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 189 << MO.getIndex(); 190 return; 191 case MachineOperand::MO_BlockAddress: 192 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 193 return; 194 case MachineOperand::MO_GlobalAddress: { 195 // Computing the address of a global symbol, not calling it. 196 const GlobalValue *GV = MO.getGlobal(); 197 MCSymbol *SymToPrint; 198 199 // External or weakly linked global variables need non-lazily-resolved stubs 200 if (Subtarget->hasLazyResolverStub(GV)) { 201 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 202 MachineModuleInfoImpl::StubValueTy &StubSym = 203 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 204 SymToPrint); 205 if (!StubSym.getPointer()) 206 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 207 !GV->hasInternalLinkage()); 208 } else { 209 SymToPrint = getSymbol(GV); 210 } 211 212 SymToPrint->print(O, MAI); 213 214 printOffset(MO.getOffset(), O); 215 return; 216 } 217 218 default: 219 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 220 return; 221 } 222 } 223 224 /// PrintAsmOperand - Print out an operand for an inline asm expression. 225 /// 226 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 227 unsigned AsmVariant, 228 const char *ExtraCode, raw_ostream &O) { 229 // Does this asm operand have a single letter operand modifier? 230 if (ExtraCode && ExtraCode[0]) { 231 if (ExtraCode[1] != 0) return true; // Unknown modifier. 232 233 switch (ExtraCode[0]) { 234 default: 235 // See if this is a generic print operand 236 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 237 case 'c': // Don't print "$" before a global var name or constant. 238 break; // PPC never has a prefix. 239 case 'L': // Write second word of DImode reference. 240 // Verify that this operand has two consecutive registers. 241 if (!MI->getOperand(OpNo).isReg() || 242 OpNo+1 == MI->getNumOperands() || 243 !MI->getOperand(OpNo+1).isReg()) 244 return true; 245 ++OpNo; // Return the high-part. 246 break; 247 case 'I': 248 // Write 'i' if an integer constant, otherwise nothing. Used to print 249 // addi vs add, etc. 250 if (MI->getOperand(OpNo).isImm()) 251 O << "i"; 252 return false; 253 } 254 } 255 256 printOperand(MI, OpNo, O); 257 return false; 258 } 259 260 // At the moment, all inline asm memory operands are a single register. 261 // In any case, the output of this routine should always be just one 262 // assembler operand. 263 264 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 265 unsigned AsmVariant, 266 const char *ExtraCode, 267 raw_ostream &O) { 268 if (ExtraCode && ExtraCode[0]) { 269 if (ExtraCode[1] != 0) return true; // Unknown modifier. 270 271 switch (ExtraCode[0]) { 272 default: return true; // Unknown modifier. 273 case 'y': // A memory reference for an X-form instruction 274 { 275 const char *RegName = "r0"; 276 if (!Subtarget->isDarwin()) 277 RegName = stripRegisterPrefix(RegName); 278 O << RegName << ", "; 279 printOperand(MI, OpNo, O); 280 return false; 281 } 282 case 'U': // Print 'u' for update form. 283 case 'X': // Print 'x' for indexed form. 284 { 285 // FIXME: Currently for PowerPC memory operands are always loaded 286 // into a register, so we never get an update or indexed form. 287 // This is bad even for offset forms, since even if we know we 288 // have a value in -16(r1), we will generate a load into r<n> 289 // and then load from 0(r<n>). Until that issue is fixed, 290 // tolerate 'U' and 'X' but don't output anything. 291 assert(MI->getOperand(OpNo).isReg()); 292 return false; 293 } 294 } 295 } 296 297 assert(MI->getOperand(OpNo).isReg()); 298 O << "0("; 299 printOperand(MI, OpNo, O); 300 O << ")"; 301 return false; 302 } 303 304 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 305 /// exists for it. If not, create one. Then return a symbol that references 306 /// the TOC entry. 307 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 308 MCSymbol *&TOCEntry = TOC[Sym]; 309 if (!TOCEntry) 310 TOCEntry = createTempSymbol("C"); 311 return TOCEntry; 312 } 313 314 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 315 SM.serializeToStackMapSection(); 316 } 317 318 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 319 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 320 321 SM.recordStackMap(MI); 322 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 323 324 // Scan ahead to trim the shadow. 325 const MachineBasicBlock &MBB = *MI.getParent(); 326 MachineBasicBlock::const_iterator MII(MI); 327 ++MII; 328 while (NumNOPBytes > 0) { 329 if (MII == MBB.end() || MII->isCall() || 330 MII->getOpcode() == PPC::DBG_VALUE || 331 MII->getOpcode() == TargetOpcode::PATCHPOINT || 332 MII->getOpcode() == TargetOpcode::STACKMAP) 333 break; 334 ++MII; 335 NumNOPBytes -= 4; 336 } 337 338 // Emit nops. 339 for (unsigned i = 0; i < NumNOPBytes; i += 4) 340 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 341 } 342 343 // Lower a patchpoint of the form: 344 // [<def>], <id>, <numBytes>, <target>, <numArgs> 345 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 346 SM.recordPatchPoint(MI); 347 PatchPointOpers Opers(&MI); 348 349 unsigned EncodedBytes = 0; 350 const MachineOperand &CalleeMO = Opers.getCallTarget(); 351 352 if (CalleeMO.isImm()) { 353 int64_t CallTarget = CalleeMO.getImm(); 354 if (CallTarget) { 355 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 356 "High 16 bits of call target should be zero."); 357 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 358 EncodedBytes = 0; 359 // Materialize the jump address: 360 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 361 .addReg(ScratchReg) 362 .addImm((CallTarget >> 32) & 0xFFFF)); 363 ++EncodedBytes; 364 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 365 .addReg(ScratchReg) 366 .addReg(ScratchReg) 367 .addImm(32).addImm(16)); 368 ++EncodedBytes; 369 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 370 .addReg(ScratchReg) 371 .addReg(ScratchReg) 372 .addImm((CallTarget >> 16) & 0xFFFF)); 373 ++EncodedBytes; 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 375 .addReg(ScratchReg) 376 .addReg(ScratchReg) 377 .addImm(CallTarget & 0xFFFF)); 378 379 // Save the current TOC pointer before the remote call. 380 int TOCSaveOffset = Subtarget->isELFv2ABI() ? 24 : 40; 381 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 382 .addReg(PPC::X2) 383 .addImm(TOCSaveOffset) 384 .addReg(PPC::X1)); 385 ++EncodedBytes; 386 387 // If we're on ELFv1, then we need to load the actual function pointer 388 // from the function descriptor. 389 if (!Subtarget->isELFv2ABI()) { 390 // Load the new TOC pointer and the function address, but not r11 391 // (needing this is rare, and loading it here would prevent passing it 392 // via a 'nest' parameter. 393 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 394 .addReg(PPC::X2) 395 .addImm(8) 396 .addReg(ScratchReg)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 399 .addReg(ScratchReg) 400 .addImm(0) 401 .addReg(ScratchReg)); 402 ++EncodedBytes; 403 } 404 405 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 406 .addReg(ScratchReg)); 407 ++EncodedBytes; 408 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 409 ++EncodedBytes; 410 411 // Restore the TOC pointer after the call. 412 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 413 .addReg(PPC::X2) 414 .addImm(TOCSaveOffset) 415 .addReg(PPC::X1)); 416 ++EncodedBytes; 417 } 418 } else if (CalleeMO.isGlobal()) { 419 const GlobalValue *GValue = CalleeMO.getGlobal(); 420 MCSymbol *MOSymbol = getSymbol(GValue); 421 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 422 423 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 424 .addExpr(SymVar)); 425 EncodedBytes += 2; 426 } 427 428 // Each instruction is 4 bytes. 429 EncodedBytes *= 4; 430 431 // Emit padding. 432 unsigned NumBytes = Opers.getNumPatchBytes(); 433 assert(NumBytes >= EncodedBytes && 434 "Patchpoint can't request size less than the length of a call."); 435 assert((NumBytes - EncodedBytes) % 4 == 0 && 436 "Invalid number of NOP bytes requested!"); 437 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 438 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 439 } 440 441 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 442 /// call to __tls_get_addr to the current output stream. 443 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 444 MCSymbolRefExpr::VariantKind VK) { 445 StringRef Name = "__tls_get_addr"; 446 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 447 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 448 449 assert(MI->getOperand(0).isReg() && 450 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 451 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 452 "GETtls[ld]ADDR[32] must define GPR3"); 453 assert(MI->getOperand(1).isReg() && 454 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 455 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 456 "GETtls[ld]ADDR[32] must read GPR3"); 457 458 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 459 isPositionIndependent()) 460 Kind = MCSymbolRefExpr::VK_PLT; 461 const MCSymbolRefExpr *TlsRef = 462 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 463 const MachineOperand &MO = MI->getOperand(2); 464 const GlobalValue *GValue = MO.getGlobal(); 465 MCSymbol *MOSymbol = getSymbol(GValue); 466 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 467 EmitToStreamer(*OutStreamer, 468 MCInstBuilder(Subtarget->isPPC64() ? 469 PPC::BL8_NOP_TLS : PPC::BL_TLS) 470 .addExpr(TlsRef) 471 .addExpr(SymVar)); 472 } 473 474 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 475 /// the current output stream. 476 /// 477 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 478 MCInst TmpInst; 479 bool isPPC64 = Subtarget->isPPC64(); 480 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 481 const Module *M = MF->getFunction()->getParent(); 482 PICLevel::Level PL = M->getPICLevel(); 483 484 // Lower multi-instruction pseudo operations. 485 switch (MI->getOpcode()) { 486 default: break; 487 case TargetOpcode::DBG_VALUE: 488 llvm_unreachable("Should be handled target independently"); 489 case TargetOpcode::STACKMAP: 490 return LowerSTACKMAP(SM, *MI); 491 case TargetOpcode::PATCHPOINT: 492 return LowerPATCHPOINT(SM, *MI); 493 494 case PPC::MoveGOTtoLR: { 495 // Transform %LR = MoveGOTtoLR 496 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 497 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 498 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 499 // blrl 500 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 501 MCSymbol *GOTSymbol = 502 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 503 const MCExpr *OffsExpr = 504 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 505 MCSymbolRefExpr::VK_PPC_LOCAL, 506 OutContext), 507 MCConstantExpr::create(4, OutContext), 508 OutContext); 509 510 // Emit the 'bl'. 511 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 512 return; 513 } 514 case PPC::MovePCtoLR: 515 case PPC::MovePCtoLR8: { 516 // Transform %LR = MovePCtoLR 517 // Into this, where the label is the PIC base: 518 // bl L1$pb 519 // L1$pb: 520 MCSymbol *PICBase = MF->getPICBaseSymbol(); 521 522 // Emit the 'bl'. 523 EmitToStreamer(*OutStreamer, 524 MCInstBuilder(PPC::BL) 525 // FIXME: We would like an efficient form for this, so we 526 // don't have to do a lot of extra uniquing. 527 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 528 529 // Emit the label. 530 OutStreamer->EmitLabel(PICBase); 531 return; 532 } 533 case PPC::UpdateGBR: { 534 // Transform %Rd = UpdateGBR(%Rt, %Ri) 535 // Into: lwz %Rt, .L0$poff - .L0$pb(%Ri) 536 // add %Rd, %Rt, %Ri 537 // Get the offset from the GOT Base Register to the GOT 538 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 539 MCSymbol *PICOffset = 540 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 541 TmpInst.setOpcode(PPC::LWZ); 542 const MCExpr *Exp = 543 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 544 const MCExpr *PB = 545 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 546 MCSymbolRefExpr::VK_None, 547 OutContext); 548 const MCOperand TR = TmpInst.getOperand(1); 549 const MCOperand PICR = TmpInst.getOperand(0); 550 551 // Step 1: lwz %Rt, .L$poff - .L$pb(%Ri) 552 TmpInst.getOperand(1) = 553 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 554 TmpInst.getOperand(0) = TR; 555 TmpInst.getOperand(2) = PICR; 556 EmitToStreamer(*OutStreamer, TmpInst); 557 558 TmpInst.setOpcode(PPC::ADD4); 559 TmpInst.getOperand(0) = PICR; 560 TmpInst.getOperand(1) = TR; 561 TmpInst.getOperand(2) = PICR; 562 EmitToStreamer(*OutStreamer, TmpInst); 563 return; 564 } 565 case PPC::LWZtoc: { 566 // Transform %R3 = LWZtoc <ga:@min1>, %R2 567 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 568 569 // Change the opcode to LWZ, and the global address operand to be a 570 // reference to the GOT entry we will synthesize later. 571 TmpInst.setOpcode(PPC::LWZ); 572 const MachineOperand &MO = MI->getOperand(1); 573 574 // Map symbol -> label of TOC entry 575 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 576 MCSymbol *MOSymbol = nullptr; 577 if (MO.isGlobal()) 578 MOSymbol = getSymbol(MO.getGlobal()); 579 else if (MO.isCPI()) 580 MOSymbol = GetCPISymbol(MO.getIndex()); 581 else if (MO.isJTI()) 582 MOSymbol = GetJTISymbol(MO.getIndex()); 583 else if (MO.isBlockAddress()) 584 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 585 586 if (PL == PICLevel::SmallPIC) { 587 const MCExpr *Exp = 588 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 589 OutContext); 590 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 591 } else { 592 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 593 594 const MCExpr *Exp = 595 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 596 OutContext); 597 const MCExpr *PB = 598 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 599 OutContext); 600 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 601 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 602 } 603 EmitToStreamer(*OutStreamer, TmpInst); 604 return; 605 } 606 case PPC::LDtocJTI: 607 case PPC::LDtocCPT: 608 case PPC::LDtocBA: 609 case PPC::LDtoc: { 610 // Transform %X3 = LDtoc <ga:@min1>, %X2 611 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 612 613 // Change the opcode to LD, and the global address operand to be a 614 // reference to the TOC entry we will synthesize later. 615 TmpInst.setOpcode(PPC::LD); 616 const MachineOperand &MO = MI->getOperand(1); 617 618 // Map symbol -> label of TOC entry 619 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 620 MCSymbol *MOSymbol = nullptr; 621 if (MO.isGlobal()) 622 MOSymbol = getSymbol(MO.getGlobal()); 623 else if (MO.isCPI()) 624 MOSymbol = GetCPISymbol(MO.getIndex()); 625 else if (MO.isJTI()) 626 MOSymbol = GetJTISymbol(MO.getIndex()); 627 else if (MO.isBlockAddress()) 628 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 629 630 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 631 632 const MCExpr *Exp = 633 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 634 OutContext); 635 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 636 EmitToStreamer(*OutStreamer, TmpInst); 637 return; 638 } 639 640 case PPC::ADDIStocHA: { 641 // Transform %Xd = ADDIStocHA %X2, <ga:@sym> 642 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 643 644 // Change the opcode to ADDIS8. If the global address is external, has 645 // common linkage, is a non-local function address, or is a jump table 646 // address, then generate a TOC entry and reference that. Otherwise 647 // reference the symbol directly. 648 TmpInst.setOpcode(PPC::ADDIS8); 649 const MachineOperand &MO = MI->getOperand(2); 650 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 651 MO.isBlockAddress()) && 652 "Invalid operand for ADDIStocHA!"); 653 MCSymbol *MOSymbol = nullptr; 654 bool GlobalToc = false; 655 656 if (MO.isGlobal()) { 657 const GlobalValue *GV = MO.getGlobal(); 658 MOSymbol = getSymbol(GV); 659 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 660 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 661 } else if (MO.isCPI()) { 662 MOSymbol = GetCPISymbol(MO.getIndex()); 663 } else if (MO.isJTI()) { 664 MOSymbol = GetJTISymbol(MO.getIndex()); 665 } else if (MO.isBlockAddress()) { 666 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 667 } 668 669 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 670 TM.getCodeModel() == CodeModel::Large) 671 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 672 673 const MCExpr *Exp = 674 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 675 OutContext); 676 677 if (!MO.isJTI() && MO.getOffset()) 678 Exp = MCBinaryExpr::createAdd(Exp, 679 MCConstantExpr::create(MO.getOffset(), 680 OutContext), 681 OutContext); 682 683 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 684 EmitToStreamer(*OutStreamer, TmpInst); 685 return; 686 } 687 case PPC::LDtocL: { 688 // Transform %Xd = LDtocL <ga:@sym>, %Xs 689 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 690 691 // Change the opcode to LD. If the global address is external, has 692 // common linkage, or is a jump table address, then reference the 693 // associated TOC entry. Otherwise reference the symbol directly. 694 TmpInst.setOpcode(PPC::LD); 695 const MachineOperand &MO = MI->getOperand(1); 696 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 697 MO.isBlockAddress()) && 698 "Invalid operand for LDtocL!"); 699 MCSymbol *MOSymbol = nullptr; 700 701 if (MO.isJTI()) 702 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 703 else if (MO.isBlockAddress()) { 704 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 705 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 706 } 707 else if (MO.isCPI()) { 708 MOSymbol = GetCPISymbol(MO.getIndex()); 709 if (TM.getCodeModel() == CodeModel::Large) 710 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 711 } 712 else if (MO.isGlobal()) { 713 const GlobalValue *GV = MO.getGlobal(); 714 MOSymbol = getSymbol(GV); 715 DEBUG( 716 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 717 assert((GVFlags & PPCII::MO_NLP_FLAG) && 718 "LDtocL used on symbol that could be accessed directly is " 719 "invalid. Must match ADDIStocHA.")); 720 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 721 } 722 723 const MCExpr *Exp = 724 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 725 OutContext); 726 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 727 EmitToStreamer(*OutStreamer, TmpInst); 728 return; 729 } 730 case PPC::ADDItocL: { 731 // Transform %Xd = ADDItocL %Xs, <ga:@sym> 732 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 733 734 // Change the opcode to ADDI8. If the global address is external, then 735 // generate a TOC entry and reference that. Otherwise reference the 736 // symbol directly. 737 TmpInst.setOpcode(PPC::ADDI8); 738 const MachineOperand &MO = MI->getOperand(2); 739 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 740 MCSymbol *MOSymbol = nullptr; 741 742 if (MO.isGlobal()) { 743 const GlobalValue *GV = MO.getGlobal(); 744 DEBUG( 745 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 746 assert ( 747 !(GVFlags & PPCII::MO_NLP_FLAG) && 748 "Interposable definitions must use indirect access.")); 749 MOSymbol = getSymbol(GV); 750 } else if (MO.isCPI()) { 751 MOSymbol = GetCPISymbol(MO.getIndex()); 752 } 753 754 const MCExpr *Exp = 755 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 756 OutContext); 757 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 758 EmitToStreamer(*OutStreamer, TmpInst); 759 return; 760 } 761 case PPC::ADDISgotTprelHA: { 762 // Transform: %Xd = ADDISgotTprelHA %X2, <ga:@sym> 763 // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha 764 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 765 const MachineOperand &MO = MI->getOperand(2); 766 const GlobalValue *GValue = MO.getGlobal(); 767 MCSymbol *MOSymbol = getSymbol(GValue); 768 const MCExpr *SymGotTprel = 769 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 770 OutContext); 771 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 772 .addReg(MI->getOperand(0).getReg()) 773 .addReg(MI->getOperand(1).getReg()) 774 .addExpr(SymGotTprel)); 775 return; 776 } 777 case PPC::LDgotTprelL: 778 case PPC::LDgotTprelL32: { 779 // Transform %Xd = LDgotTprelL <ga:@sym>, %Xs 780 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 781 782 // Change the opcode to LD. 783 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 784 const MachineOperand &MO = MI->getOperand(1); 785 const GlobalValue *GValue = MO.getGlobal(); 786 MCSymbol *MOSymbol = getSymbol(GValue); 787 const MCExpr *Exp = 788 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 789 OutContext); 790 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 791 EmitToStreamer(*OutStreamer, TmpInst); 792 return; 793 } 794 795 case PPC::PPC32PICGOT: { 796 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 797 MCSymbol *GOTRef = OutContext.createTempSymbol(); 798 MCSymbol *NextInstr = OutContext.createTempSymbol(); 799 800 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 801 // FIXME: We would like an efficient form for this, so we don't have to do 802 // a lot of extra uniquing. 803 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 804 const MCExpr *OffsExpr = 805 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 806 MCSymbolRefExpr::create(GOTRef, OutContext), 807 OutContext); 808 OutStreamer->EmitLabel(GOTRef); 809 OutStreamer->EmitValue(OffsExpr, 4); 810 OutStreamer->EmitLabel(NextInstr); 811 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 812 .addReg(MI->getOperand(0).getReg())); 813 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 814 .addReg(MI->getOperand(1).getReg()) 815 .addImm(0) 816 .addReg(MI->getOperand(0).getReg())); 817 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 818 .addReg(MI->getOperand(0).getReg()) 819 .addReg(MI->getOperand(1).getReg()) 820 .addReg(MI->getOperand(0).getReg())); 821 return; 822 } 823 case PPC::PPC32GOT: { 824 MCSymbol *GOTSymbol = 825 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 826 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 827 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 828 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 829 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 830 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 831 .addReg(MI->getOperand(0).getReg()) 832 .addExpr(SymGotTlsL)); 833 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 834 .addReg(MI->getOperand(0).getReg()) 835 .addReg(MI->getOperand(0).getReg()) 836 .addExpr(SymGotTlsHA)); 837 return; 838 } 839 case PPC::ADDIStlsgdHA: { 840 // Transform: %Xd = ADDIStlsgdHA %X2, <ga:@sym> 841 // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha 842 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 843 const MachineOperand &MO = MI->getOperand(2); 844 const GlobalValue *GValue = MO.getGlobal(); 845 MCSymbol *MOSymbol = getSymbol(GValue); 846 const MCExpr *SymGotTlsGD = 847 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 848 OutContext); 849 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 850 .addReg(MI->getOperand(0).getReg()) 851 .addReg(MI->getOperand(1).getReg()) 852 .addExpr(SymGotTlsGD)); 853 return; 854 } 855 case PPC::ADDItlsgdL: 856 // Transform: %Xd = ADDItlsgdL %Xs, <ga:@sym> 857 // Into: %Xd = ADDI8 %Xs, sym@got@tlsgd@l 858 case PPC::ADDItlsgdL32: { 859 // Transform: %Rd = ADDItlsgdL32 %Rs, <ga:@sym> 860 // Into: %Rd = ADDI %Rs, sym@got@tlsgd 861 const MachineOperand &MO = MI->getOperand(2); 862 const GlobalValue *GValue = MO.getGlobal(); 863 MCSymbol *MOSymbol = getSymbol(GValue); 864 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 865 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 866 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 867 OutContext); 868 EmitToStreamer(*OutStreamer, 869 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 870 .addReg(MI->getOperand(0).getReg()) 871 .addReg(MI->getOperand(1).getReg()) 872 .addExpr(SymGotTlsGD)); 873 return; 874 } 875 case PPC::GETtlsADDR: 876 // Transform: %X3 = GETtlsADDR %X3, <ga:@sym> 877 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 878 case PPC::GETtlsADDR32: { 879 // Transform: %R3 = GETtlsADDR32 %R3, <ga:@sym> 880 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 881 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 882 return; 883 } 884 case PPC::ADDIStlsldHA: { 885 // Transform: %Xd = ADDIStlsldHA %X2, <ga:@sym> 886 // Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha 887 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 888 const MachineOperand &MO = MI->getOperand(2); 889 const GlobalValue *GValue = MO.getGlobal(); 890 MCSymbol *MOSymbol = getSymbol(GValue); 891 const MCExpr *SymGotTlsLD = 892 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 893 OutContext); 894 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 895 .addReg(MI->getOperand(0).getReg()) 896 .addReg(MI->getOperand(1).getReg()) 897 .addExpr(SymGotTlsLD)); 898 return; 899 } 900 case PPC::ADDItlsldL: 901 // Transform: %Xd = ADDItlsldL %Xs, <ga:@sym> 902 // Into: %Xd = ADDI8 %Xs, sym@got@tlsld@l 903 case PPC::ADDItlsldL32: { 904 // Transform: %Rd = ADDItlsldL32 %Rs, <ga:@sym> 905 // Into: %Rd = ADDI %Rs, sym@got@tlsld 906 const MachineOperand &MO = MI->getOperand(2); 907 const GlobalValue *GValue = MO.getGlobal(); 908 MCSymbol *MOSymbol = getSymbol(GValue); 909 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 910 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 911 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 912 OutContext); 913 EmitToStreamer(*OutStreamer, 914 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 915 .addReg(MI->getOperand(0).getReg()) 916 .addReg(MI->getOperand(1).getReg()) 917 .addExpr(SymGotTlsLD)); 918 return; 919 } 920 case PPC::GETtlsldADDR: 921 // Transform: %X3 = GETtlsldADDR %X3, <ga:@sym> 922 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 923 case PPC::GETtlsldADDR32: { 924 // Transform: %R3 = GETtlsldADDR32 %R3, <ga:@sym> 925 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 926 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 927 return; 928 } 929 case PPC::ADDISdtprelHA: 930 // Transform: %Xd = ADDISdtprelHA %Xs, <ga:@sym> 931 // Into: %Xd = ADDIS8 %Xs, sym@dtprel@ha 932 case PPC::ADDISdtprelHA32: { 933 // Transform: %Rd = ADDISdtprelHA32 %Rs, <ga:@sym> 934 // Into: %Rd = ADDIS %Rs, sym@dtprel@ha 935 const MachineOperand &MO = MI->getOperand(2); 936 const GlobalValue *GValue = MO.getGlobal(); 937 MCSymbol *MOSymbol = getSymbol(GValue); 938 const MCExpr *SymDtprel = 939 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 940 OutContext); 941 EmitToStreamer( 942 *OutStreamer, 943 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 944 .addReg(MI->getOperand(0).getReg()) 945 .addReg(MI->getOperand(1).getReg()) 946 .addExpr(SymDtprel)); 947 return; 948 } 949 case PPC::ADDIdtprelL: 950 // Transform: %Xd = ADDIdtprelL %Xs, <ga:@sym> 951 // Into: %Xd = ADDI8 %Xs, sym@dtprel@l 952 case PPC::ADDIdtprelL32: { 953 // Transform: %Rd = ADDIdtprelL32 %Rs, <ga:@sym> 954 // Into: %Rd = ADDI %Rs, sym@dtprel@l 955 const MachineOperand &MO = MI->getOperand(2); 956 const GlobalValue *GValue = MO.getGlobal(); 957 MCSymbol *MOSymbol = getSymbol(GValue); 958 const MCExpr *SymDtprel = 959 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 960 OutContext); 961 EmitToStreamer(*OutStreamer, 962 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 963 .addReg(MI->getOperand(0).getReg()) 964 .addReg(MI->getOperand(1).getReg()) 965 .addExpr(SymDtprel)); 966 return; 967 } 968 case PPC::MFOCRF: 969 case PPC::MFOCRF8: 970 if (!Subtarget->hasMFOCRF()) { 971 // Transform: %R3 = MFOCRF %CR7 972 // Into: %R3 = MFCR ;; cr7 973 unsigned NewOpcode = 974 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 975 OutStreamer->AddComment(PPCInstPrinter:: 976 getRegisterName(MI->getOperand(1).getReg())); 977 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 978 .addReg(MI->getOperand(0).getReg())); 979 return; 980 } 981 break; 982 case PPC::MTOCRF: 983 case PPC::MTOCRF8: 984 if (!Subtarget->hasMFOCRF()) { 985 // Transform: %CR7 = MTOCRF %R3 986 // Into: MTCRF mask, %R3 ;; cr7 987 unsigned NewOpcode = 988 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 989 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 990 ->getEncodingValue(MI->getOperand(0).getReg()); 991 OutStreamer->AddComment(PPCInstPrinter:: 992 getRegisterName(MI->getOperand(0).getReg())); 993 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 994 .addImm(Mask) 995 .addReg(MI->getOperand(1).getReg())); 996 return; 997 } 998 break; 999 case PPC::LD: 1000 case PPC::STD: 1001 case PPC::LWA_32: 1002 case PPC::LWA: { 1003 // Verify alignment is legal, so we don't create relocations 1004 // that can't be supported. 1005 // FIXME: This test is currently disabled for Darwin. The test 1006 // suite shows a handful of test cases that fail this check for 1007 // Darwin. Those need to be investigated before this sanity test 1008 // can be enabled for those subtargets. 1009 if (!Subtarget->isDarwin()) { 1010 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1011 const MachineOperand &MO = MI->getOperand(OpNum); 1012 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1013 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1014 } 1015 // Now process the instruction normally. 1016 break; 1017 } 1018 } 1019 1020 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1021 EmitToStreamer(*OutStreamer, TmpInst); 1022 } 1023 1024 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1025 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1026 PPCTargetStreamer *TS = 1027 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1028 1029 if (TS) 1030 TS->emitAbiVersion(2); 1031 } 1032 1033 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1034 !isPositionIndependent()) 1035 return AsmPrinter::EmitStartOfAsmFile(M); 1036 1037 if (M.getPICLevel() == PICLevel::SmallPIC) 1038 return AsmPrinter::EmitStartOfAsmFile(M); 1039 1040 OutStreamer->SwitchSection(OutContext.getELFSection( 1041 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1042 1043 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1044 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1045 1046 OutStreamer->EmitLabel(CurrentPos); 1047 1048 // The GOT pointer points to the middle of the GOT, in order to reference the 1049 // entire 64kB range. 0x8000 is the midpoint. 1050 const MCExpr *tocExpr = 1051 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1052 MCConstantExpr::create(0x8000, OutContext), 1053 OutContext); 1054 1055 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1056 1057 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1058 } 1059 1060 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1061 // linux/ppc32 - Normal entry label. 1062 if (!Subtarget->isPPC64() && 1063 (!isPositionIndependent() || 1064 MF->getFunction()->getParent()->getPICLevel() == PICLevel::SmallPIC)) 1065 return AsmPrinter::EmitFunctionEntryLabel(); 1066 1067 if (!Subtarget->isPPC64()) { 1068 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1069 if (PPCFI->usesPICBase()) { 1070 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1071 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1072 OutStreamer->EmitLabel(RelocSymbol); 1073 1074 const MCExpr *OffsExpr = 1075 MCBinaryExpr::createSub( 1076 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1077 OutContext), 1078 MCSymbolRefExpr::create(PICBase, OutContext), 1079 OutContext); 1080 OutStreamer->EmitValue(OffsExpr, 4); 1081 OutStreamer->EmitLabel(CurrentFnSym); 1082 return; 1083 } else 1084 return AsmPrinter::EmitFunctionEntryLabel(); 1085 } 1086 1087 // ELFv2 ABI - Normal entry label. 1088 if (Subtarget->isELFv2ABI()) { 1089 // In the Large code model, we allow arbitrary displacements between 1090 // the text section and its associated TOC section. We place the 1091 // full 8-byte offset to the TOC in memory immediatedly preceding 1092 // the function global entry point. 1093 if (TM.getCodeModel() == CodeModel::Large 1094 && !MF->getRegInfo().use_empty(PPC::X2)) { 1095 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1096 1097 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1098 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1099 const MCExpr *TOCDeltaExpr = 1100 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1101 MCSymbolRefExpr::create(GlobalEPSymbol, 1102 OutContext), 1103 OutContext); 1104 1105 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1106 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1107 } 1108 return AsmPrinter::EmitFunctionEntryLabel(); 1109 } 1110 1111 // Emit an official procedure descriptor. 1112 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1113 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1114 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1115 OutStreamer->SwitchSection(Section); 1116 OutStreamer->EmitLabel(CurrentFnSym); 1117 OutStreamer->EmitValueToAlignment(8); 1118 MCSymbol *Symbol1 = CurrentFnSymForSize; 1119 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1120 // entry point. 1121 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1122 8 /*size*/); 1123 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1124 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1125 OutStreamer->EmitValue( 1126 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1127 8/*size*/); 1128 // Emit a null environment pointer. 1129 OutStreamer->EmitIntValue(0, 8 /* size */); 1130 OutStreamer->SwitchSection(Current.first, Current.second); 1131 } 1132 1133 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1134 const DataLayout &DL = getDataLayout(); 1135 1136 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1137 1138 PPCTargetStreamer &TS = 1139 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1140 1141 if (!TOC.empty()) { 1142 MCSectionELF *Section; 1143 1144 if (isPPC64) 1145 Section = OutStreamer->getContext().getELFSection( 1146 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1147 else 1148 Section = OutStreamer->getContext().getELFSection( 1149 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1150 OutStreamer->SwitchSection(Section); 1151 1152 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1153 E = TOC.end(); I != E; ++I) { 1154 OutStreamer->EmitLabel(I->second); 1155 MCSymbol *S = I->first; 1156 if (isPPC64) { 1157 TS.emitTCEntry(*S); 1158 } else { 1159 OutStreamer->EmitValueToAlignment(4); 1160 OutStreamer->EmitSymbolValue(S, 4); 1161 } 1162 } 1163 } 1164 1165 return AsmPrinter::doFinalization(M); 1166 } 1167 1168 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1169 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1170 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1171 // provide two entry points. The ABI guarantees that when calling the 1172 // local entry point, r2 is set up by the caller to contain the TOC base 1173 // for this function, and when calling the global entry point, r12 is set 1174 // up by the caller to hold the address of the global entry point. We 1175 // thus emit a prefix sequence along the following lines: 1176 // 1177 // func: 1178 // .Lfunc_gepNN: 1179 // # global entry point 1180 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1181 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1182 // .Lfunc_lepNN: 1183 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1184 // # local entry point, followed by function body 1185 // 1186 // For the Large code model, we create 1187 // 1188 // .Lfunc_tocNN: 1189 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1190 // func: 1191 // .Lfunc_gepNN: 1192 // # global entry point 1193 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1194 // add r2,r2,r12 1195 // .Lfunc_lepNN: 1196 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1197 // # local entry point, followed by function body 1198 // 1199 // This ensures we have r2 set up correctly while executing the function 1200 // body, no matter which entry point is called. 1201 if (Subtarget->isELFv2ABI() 1202 // Only do all that if the function uses r2 in the first place. 1203 && !MF->getRegInfo().use_empty(PPC::X2)) { 1204 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1205 1206 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1207 OutStreamer->EmitLabel(GlobalEntryLabel); 1208 const MCSymbolRefExpr *GlobalEntryLabelExp = 1209 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1210 1211 if (TM.getCodeModel() != CodeModel::Large) { 1212 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1213 const MCExpr *TOCDeltaExpr = 1214 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1215 GlobalEntryLabelExp, OutContext); 1216 1217 const MCExpr *TOCDeltaHi = 1218 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1219 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1220 .addReg(PPC::X2) 1221 .addReg(PPC::X12) 1222 .addExpr(TOCDeltaHi)); 1223 1224 const MCExpr *TOCDeltaLo = 1225 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1226 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1227 .addReg(PPC::X2) 1228 .addReg(PPC::X2) 1229 .addExpr(TOCDeltaLo)); 1230 } else { 1231 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1232 const MCExpr *TOCOffsetDeltaExpr = 1233 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1234 GlobalEntryLabelExp, OutContext); 1235 1236 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1237 .addReg(PPC::X2) 1238 .addExpr(TOCOffsetDeltaExpr) 1239 .addReg(PPC::X12)); 1240 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1241 .addReg(PPC::X2) 1242 .addReg(PPC::X2) 1243 .addReg(PPC::X12)); 1244 } 1245 1246 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1247 OutStreamer->EmitLabel(LocalEntryLabel); 1248 const MCSymbolRefExpr *LocalEntryLabelExp = 1249 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1250 const MCExpr *LocalOffsetExp = 1251 MCBinaryExpr::createSub(LocalEntryLabelExp, 1252 GlobalEntryLabelExp, OutContext); 1253 1254 PPCTargetStreamer *TS = 1255 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1256 1257 if (TS) 1258 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1259 } 1260 } 1261 1262 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1263 /// directive. 1264 /// 1265 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1266 // Only the 64-bit target requires a traceback table. For now, 1267 // we only emit the word of zeroes that GDB requires to find 1268 // the end of the function, and zeroes for the eight-byte 1269 // mandatory fields. 1270 // FIXME: We should fill in the eight-byte mandatory fields as described in 1271 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1272 // currently make use of these fields). 1273 if (Subtarget->isPPC64()) { 1274 OutStreamer->EmitIntValue(0, 4/*size*/); 1275 OutStreamer->EmitIntValue(0, 8/*size*/); 1276 } 1277 } 1278 1279 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1280 static const char *const CPUDirectives[] = { 1281 "", 1282 "ppc", 1283 "ppc440", 1284 "ppc601", 1285 "ppc602", 1286 "ppc603", 1287 "ppc7400", 1288 "ppc750", 1289 "ppc970", 1290 "ppcA2", 1291 "ppce500mc", 1292 "ppce5500", 1293 "power3", 1294 "power4", 1295 "power5", 1296 "power5x", 1297 "power6", 1298 "power6x", 1299 "power7", 1300 // FIXME: why is power8 missing here? 1301 "ppc64", 1302 "ppc64le", 1303 "power9" 1304 }; 1305 1306 // Get the numerically largest directive. 1307 // FIXME: How should we merge darwin directives? 1308 unsigned Directive = PPC::DIR_NONE; 1309 for (const Function &F : M) { 1310 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1311 unsigned FDir = STI.getDarwinDirective(); 1312 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1313 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1314 Directive = PPC::DIR_970; 1315 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1316 Directive = PPC::DIR_7400; 1317 if (STI.isPPC64() && Directive < PPC::DIR_64) 1318 Directive = PPC::DIR_64; 1319 } 1320 1321 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1322 1323 assert(Directive < array_lengthof(CPUDirectives) && 1324 "CPUDirectives[] might not be up-to-date!"); 1325 PPCTargetStreamer &TStreamer = 1326 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1327 TStreamer.emitMachine(CPUDirectives[Directive]); 1328 1329 // Prime text sections so they are adjacent. This reduces the likelihood a 1330 // large data or debug section causes a branch to exceed 16M limit. 1331 const TargetLoweringObjectFileMachO &TLOFMacho = 1332 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1333 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1334 if (TM.getRelocationModel() == Reloc::PIC_) { 1335 OutStreamer->SwitchSection( 1336 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1337 MachO::S_SYMBOL_STUBS | 1338 MachO::S_ATTR_PURE_INSTRUCTIONS, 1339 32, SectionKind::getText())); 1340 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1341 OutStreamer->SwitchSection( 1342 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1343 MachO::S_SYMBOL_STUBS | 1344 MachO::S_ATTR_PURE_INSTRUCTIONS, 1345 16, SectionKind::getText())); 1346 } 1347 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1348 } 1349 1350 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1351 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1352 1353 // Darwin/PPC always uses mach-o. 1354 const TargetLoweringObjectFileMachO &TLOFMacho = 1355 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1356 MachineModuleInfoMachO &MMIMacho = 1357 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1358 1359 if (MAI->doesSupportExceptionHandling() && MMI) { 1360 // Add the (possibly multiple) personalities to the set of global values. 1361 // Only referenced functions get into the Personalities list. 1362 for (const Function *Personality : MMI->getPersonalities()) { 1363 if (Personality) { 1364 MCSymbol *NLPSym = 1365 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1366 MachineModuleInfoImpl::StubValueTy &StubSym = 1367 MMIMacho.getGVStubEntry(NLPSym); 1368 StubSym = 1369 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1370 } 1371 } 1372 } 1373 1374 // Output stubs for dynamically-linked functions. 1375 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1376 1377 // Output macho stubs for external and common global variables. 1378 if (!Stubs.empty()) { 1379 // Switch with ".non_lazy_symbol_pointer" directive. 1380 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1381 EmitAlignment(isPPC64 ? 3 : 2); 1382 1383 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1384 // L_foo$stub: 1385 OutStreamer->EmitLabel(Stubs[i].first); 1386 // .indirect_symbol _foo 1387 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1388 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol); 1389 1390 if (MCSym.getInt()) 1391 // External to current translation unit. 1392 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4/*size*/); 1393 else 1394 // Internal to current translation unit. 1395 // 1396 // When we place the LSDA into the TEXT section, the type info pointers 1397 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1398 // However, sometimes the types are local to the file. So we need to 1399 // fill in the value for the NLP in those cases. 1400 OutStreamer->EmitValue(MCSymbolRefExpr::create(MCSym.getPointer(), 1401 OutContext), 1402 isPPC64 ? 8 : 4/*size*/); 1403 } 1404 1405 Stubs.clear(); 1406 OutStreamer->AddBlankLine(); 1407 } 1408 1409 // Funny Darwin hack: This flag tells the linker that no global symbols 1410 // contain code that falls through to other global symbols (e.g. the obvious 1411 // implementation of multiple entry points). If this doesn't occur, the 1412 // linker can safely perform dead code stripping. Since LLVM never generates 1413 // code that does this, it is always safe to set. 1414 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1415 1416 return AsmPrinter::doFinalization(M); 1417 } 1418 1419 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1420 /// for a MachineFunction to the given output stream, in a format that the 1421 /// Darwin assembler can deal with. 1422 /// 1423 static AsmPrinter * 1424 createPPCAsmPrinterPass(TargetMachine &tm, 1425 std::unique_ptr<MCStreamer> &&Streamer) { 1426 if (tm.getTargetTriple().isMacOSX()) 1427 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1428 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1429 } 1430 1431 // Force static initialization. 1432 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1433 TargetRegistry::RegisterAsmPrinter(ThePPC32Target, createPPCAsmPrinterPass); 1434 TargetRegistry::RegisterAsmPrinter(ThePPC64Target, createPPCAsmPrinterPass); 1435 TargetRegistry::RegisterAsmPrinter(ThePPC64LETarget, createPPCAsmPrinterPass); 1436 } 1437