1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains a printer that converts from our internal representation 11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 12 // the output mechanism used by `llc'. 13 // 14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 16 // 17 //===----------------------------------------------------------------------===// 18 19 #include "InstPrinter/PPCInstPrinter.h" 20 #include "MCTargetDesc/PPCMCExpr.h" 21 #include "MCTargetDesc/PPCMCTargetDesc.h" 22 #include "MCTargetDesc/PPCPredicates.h" 23 #include "PPC.h" 24 #include "PPCInstrInfo.h" 25 #include "PPCMachineFunctionInfo.h" 26 #include "PPCSubtarget.h" 27 #include "PPCTargetMachine.h" 28 #include "PPCTargetStreamer.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCStreamer.h" 55 #include "llvm/MC/MCSymbol.h" 56 #include "llvm/MC/MCSymbolELF.h" 57 #include "llvm/MC/SectionKind.h" 58 #include "llvm/Support/Casting.h" 59 #include "llvm/Support/CodeGen.h" 60 #include "llvm/Support/Debug.h" 61 #include "llvm/Support/ErrorHandling.h" 62 #include "llvm/Support/TargetRegistry.h" 63 #include "llvm/Support/raw_ostream.h" 64 #include "llvm/Target/TargetMachine.h" 65 #include <algorithm> 66 #include <cassert> 67 #include <cstdint> 68 #include <memory> 69 #include <new> 70 71 using namespace llvm; 72 73 #define DEBUG_TYPE "asmprinter" 74 75 namespace { 76 77 class PPCAsmPrinter : public AsmPrinter { 78 protected: 79 MapVector<MCSymbol *, MCSymbol *> TOC; 80 const PPCSubtarget *Subtarget; 81 StackMaps SM; 82 83 public: 84 explicit PPCAsmPrinter(TargetMachine &TM, 85 std::unique_ptr<MCStreamer> Streamer) 86 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 87 88 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 89 90 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 91 92 bool doInitialization(Module &M) override { 93 if (!TOC.empty()) 94 TOC.clear(); 95 return AsmPrinter::doInitialization(M); 96 } 97 98 void EmitInstruction(const MachineInstr *MI) override; 99 100 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 101 102 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 103 unsigned AsmVariant, const char *ExtraCode, 104 raw_ostream &O) override; 105 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 106 unsigned AsmVariant, const char *ExtraCode, 107 raw_ostream &O) override; 108 109 void EmitEndOfAsmFile(Module &M) override; 110 111 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 112 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 113 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 114 bool runOnMachineFunction(MachineFunction &MF) override { 115 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 116 bool Changed = AsmPrinter::runOnMachineFunction(MF); 117 emitXRayTable(); 118 return Changed; 119 } 120 }; 121 122 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 123 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 124 public: 125 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 126 std::unique_ptr<MCStreamer> Streamer) 127 : PPCAsmPrinter(TM, std::move(Streamer)) {} 128 129 StringRef getPassName() const override { 130 return "Linux PPC Assembly Printer"; 131 } 132 133 bool doFinalization(Module &M) override; 134 void EmitStartOfAsmFile(Module &M) override; 135 136 void EmitFunctionEntryLabel() override; 137 138 void EmitFunctionBodyStart() override; 139 void EmitFunctionBodyEnd() override; 140 void EmitInstruction(const MachineInstr *MI) override; 141 }; 142 143 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 144 /// OS X 145 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 146 public: 147 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 148 std::unique_ptr<MCStreamer> Streamer) 149 : PPCAsmPrinter(TM, std::move(Streamer)) {} 150 151 StringRef getPassName() const override { 152 return "Darwin PPC Assembly Printer"; 153 } 154 155 bool doFinalization(Module &M) override; 156 void EmitStartOfAsmFile(Module &M) override; 157 }; 158 159 } // end anonymous namespace 160 161 /// stripRegisterPrefix - This method strips the character prefix from a 162 /// register name so that only the number is left. Used by for linux asm. 163 static const char *stripRegisterPrefix(const char *RegName) { 164 switch (RegName[0]) { 165 case 'r': 166 case 'f': 167 case 'q': // for QPX 168 case 'v': 169 if (RegName[1] == 's') 170 return RegName + 2; 171 return RegName + 1; 172 case 'c': if (RegName[1] == 'r') return RegName + 2; 173 } 174 175 return RegName; 176 } 177 178 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 179 raw_ostream &O) { 180 const DataLayout &DL = getDataLayout(); 181 const MachineOperand &MO = MI->getOperand(OpNo); 182 183 switch (MO.getType()) { 184 case MachineOperand::MO_Register: { 185 unsigned Reg = MO.getReg(); 186 187 // There are VSX instructions that use VSX register numbering (vs0 - vs63) 188 // as well as those that use VMX register numbering (v0 - v31 which 189 // correspond to vs32 - vs63). If we have an instruction that uses VSX 190 // numbering, we need to convert the VMX registers to VSX registers. 191 // Namely, we print 32-63 when the instruction operates on one of the 192 // VMX registers. 193 // (Please synchronize with PPCInstPrinter::printOperand) 194 if (MI->getDesc().TSFlags & PPCII::UseVSXReg) { 195 if (PPCInstrInfo::isVRRegister(Reg)) 196 Reg = PPC::VSX32 + (Reg - PPC::V0); 197 else if (PPCInstrInfo::isVFRegister(Reg)) 198 Reg = PPC::VSX32 + (Reg - PPC::VF0); 199 } 200 const char *RegName = PPCInstPrinter::getRegisterName(Reg); 201 202 // Linux assembler (Others?) does not take register mnemonics. 203 // FIXME - What about special registers used in mfspr/mtspr? 204 if (!Subtarget->isDarwin()) 205 RegName = stripRegisterPrefix(RegName); 206 O << RegName; 207 return; 208 } 209 case MachineOperand::MO_Immediate: 210 O << MO.getImm(); 211 return; 212 213 case MachineOperand::MO_MachineBasicBlock: 214 MO.getMBB()->getSymbol()->print(O, MAI); 215 return; 216 case MachineOperand::MO_ConstantPoolIndex: 217 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 218 << MO.getIndex(); 219 return; 220 case MachineOperand::MO_BlockAddress: 221 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 222 return; 223 case MachineOperand::MO_GlobalAddress: { 224 // Computing the address of a global symbol, not calling it. 225 const GlobalValue *GV = MO.getGlobal(); 226 MCSymbol *SymToPrint; 227 228 // External or weakly linked global variables need non-lazily-resolved stubs 229 if (Subtarget->hasLazyResolverStub(GV)) { 230 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 231 MachineModuleInfoImpl::StubValueTy &StubSym = 232 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 233 SymToPrint); 234 if (!StubSym.getPointer()) 235 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 236 !GV->hasInternalLinkage()); 237 } else { 238 SymToPrint = getSymbol(GV); 239 } 240 241 SymToPrint->print(O, MAI); 242 243 printOffset(MO.getOffset(), O); 244 return; 245 } 246 247 default: 248 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 249 return; 250 } 251 } 252 253 /// PrintAsmOperand - Print out an operand for an inline asm expression. 254 /// 255 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 256 unsigned AsmVariant, 257 const char *ExtraCode, raw_ostream &O) { 258 // Does this asm operand have a single letter operand modifier? 259 if (ExtraCode && ExtraCode[0]) { 260 if (ExtraCode[1] != 0) return true; // Unknown modifier. 261 262 switch (ExtraCode[0]) { 263 default: 264 // See if this is a generic print operand 265 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 266 case 'c': // Don't print "$" before a global var name or constant. 267 break; // PPC never has a prefix. 268 case 'L': // Write second word of DImode reference. 269 // Verify that this operand has two consecutive registers. 270 if (!MI->getOperand(OpNo).isReg() || 271 OpNo+1 == MI->getNumOperands() || 272 !MI->getOperand(OpNo+1).isReg()) 273 return true; 274 ++OpNo; // Return the high-part. 275 break; 276 case 'I': 277 // Write 'i' if an integer constant, otherwise nothing. Used to print 278 // addi vs add, etc. 279 if (MI->getOperand(OpNo).isImm()) 280 O << "i"; 281 return false; 282 } 283 } 284 285 printOperand(MI, OpNo, O); 286 return false; 287 } 288 289 // At the moment, all inline asm memory operands are a single register. 290 // In any case, the output of this routine should always be just one 291 // assembler operand. 292 293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 294 unsigned AsmVariant, 295 const char *ExtraCode, 296 raw_ostream &O) { 297 if (ExtraCode && ExtraCode[0]) { 298 if (ExtraCode[1] != 0) return true; // Unknown modifier. 299 300 switch (ExtraCode[0]) { 301 default: return true; // Unknown modifier. 302 case 'y': // A memory reference for an X-form instruction 303 { 304 const char *RegName = "r0"; 305 if (!Subtarget->isDarwin()) 306 RegName = stripRegisterPrefix(RegName); 307 O << RegName << ", "; 308 printOperand(MI, OpNo, O); 309 return false; 310 } 311 case 'U': // Print 'u' for update form. 312 case 'X': // Print 'x' for indexed form. 313 { 314 // FIXME: Currently for PowerPC memory operands are always loaded 315 // into a register, so we never get an update or indexed form. 316 // This is bad even for offset forms, since even if we know we 317 // have a value in -16(r1), we will generate a load into r<n> 318 // and then load from 0(r<n>). Until that issue is fixed, 319 // tolerate 'U' and 'X' but don't output anything. 320 assert(MI->getOperand(OpNo).isReg()); 321 return false; 322 } 323 } 324 } 325 326 assert(MI->getOperand(OpNo).isReg()); 327 O << "0("; 328 printOperand(MI, OpNo, O); 329 O << ")"; 330 return false; 331 } 332 333 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 334 /// exists for it. If not, create one. Then return a symbol that references 335 /// the TOC entry. 336 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 337 MCSymbol *&TOCEntry = TOC[Sym]; 338 if (!TOCEntry) 339 TOCEntry = createTempSymbol("C"); 340 return TOCEntry; 341 } 342 343 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 344 SM.serializeToStackMapSection(); 345 } 346 347 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 348 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 349 350 SM.recordStackMap(MI); 351 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 352 353 // Scan ahead to trim the shadow. 354 const MachineBasicBlock &MBB = *MI.getParent(); 355 MachineBasicBlock::const_iterator MII(MI); 356 ++MII; 357 while (NumNOPBytes > 0) { 358 if (MII == MBB.end() || MII->isCall() || 359 MII->getOpcode() == PPC::DBG_VALUE || 360 MII->getOpcode() == TargetOpcode::PATCHPOINT || 361 MII->getOpcode() == TargetOpcode::STACKMAP) 362 break; 363 ++MII; 364 NumNOPBytes -= 4; 365 } 366 367 // Emit nops. 368 for (unsigned i = 0; i < NumNOPBytes; i += 4) 369 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 370 } 371 372 // Lower a patchpoint of the form: 373 // [<def>], <id>, <numBytes>, <target>, <numArgs> 374 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 375 SM.recordPatchPoint(MI); 376 PatchPointOpers Opers(&MI); 377 378 unsigned EncodedBytes = 0; 379 const MachineOperand &CalleeMO = Opers.getCallTarget(); 380 381 if (CalleeMO.isImm()) { 382 int64_t CallTarget = CalleeMO.getImm(); 383 if (CallTarget) { 384 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 385 "High 16 bits of call target should be zero."); 386 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 387 EncodedBytes = 0; 388 // Materialize the jump address: 389 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 390 .addReg(ScratchReg) 391 .addImm((CallTarget >> 32) & 0xFFFF)); 392 ++EncodedBytes; 393 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 394 .addReg(ScratchReg) 395 .addReg(ScratchReg) 396 .addImm(32).addImm(16)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 399 .addReg(ScratchReg) 400 .addReg(ScratchReg) 401 .addImm((CallTarget >> 16) & 0xFFFF)); 402 ++EncodedBytes; 403 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 404 .addReg(ScratchReg) 405 .addReg(ScratchReg) 406 .addImm(CallTarget & 0xFFFF)); 407 408 // Save the current TOC pointer before the remote call. 409 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 410 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 411 .addReg(PPC::X2) 412 .addImm(TOCSaveOffset) 413 .addReg(PPC::X1)); 414 ++EncodedBytes; 415 416 // If we're on ELFv1, then we need to load the actual function pointer 417 // from the function descriptor. 418 if (!Subtarget->isELFv2ABI()) { 419 // Load the new TOC pointer and the function address, but not r11 420 // (needing this is rare, and loading it here would prevent passing it 421 // via a 'nest' parameter. 422 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 423 .addReg(PPC::X2) 424 .addImm(8) 425 .addReg(ScratchReg)); 426 ++EncodedBytes; 427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 428 .addReg(ScratchReg) 429 .addImm(0) 430 .addReg(ScratchReg)); 431 ++EncodedBytes; 432 } 433 434 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 435 .addReg(ScratchReg)); 436 ++EncodedBytes; 437 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 438 ++EncodedBytes; 439 440 // Restore the TOC pointer after the call. 441 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 442 .addReg(PPC::X2) 443 .addImm(TOCSaveOffset) 444 .addReg(PPC::X1)); 445 ++EncodedBytes; 446 } 447 } else if (CalleeMO.isGlobal()) { 448 const GlobalValue *GValue = CalleeMO.getGlobal(); 449 MCSymbol *MOSymbol = getSymbol(GValue); 450 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 451 452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 453 .addExpr(SymVar)); 454 EncodedBytes += 2; 455 } 456 457 // Each instruction is 4 bytes. 458 EncodedBytes *= 4; 459 460 // Emit padding. 461 unsigned NumBytes = Opers.getNumPatchBytes(); 462 assert(NumBytes >= EncodedBytes && 463 "Patchpoint can't request size less than the length of a call."); 464 assert((NumBytes - EncodedBytes) % 4 == 0 && 465 "Invalid number of NOP bytes requested!"); 466 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 467 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 468 } 469 470 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 471 /// call to __tls_get_addr to the current output stream. 472 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 473 MCSymbolRefExpr::VariantKind VK) { 474 StringRef Name = "__tls_get_addr"; 475 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 476 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 477 478 assert(MI->getOperand(0).isReg() && 479 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 480 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 481 "GETtls[ld]ADDR[32] must define GPR3"); 482 assert(MI->getOperand(1).isReg() && 483 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 484 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 485 "GETtls[ld]ADDR[32] must read GPR3"); 486 487 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 488 isPositionIndependent()) 489 Kind = MCSymbolRefExpr::VK_PLT; 490 const MCSymbolRefExpr *TlsRef = 491 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 492 const MachineOperand &MO = MI->getOperand(2); 493 const GlobalValue *GValue = MO.getGlobal(); 494 MCSymbol *MOSymbol = getSymbol(GValue); 495 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 496 EmitToStreamer(*OutStreamer, 497 MCInstBuilder(Subtarget->isPPC64() ? 498 PPC::BL8_NOP_TLS : PPC::BL_TLS) 499 .addExpr(TlsRef) 500 .addExpr(SymVar)); 501 } 502 503 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 504 /// the current output stream. 505 /// 506 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 507 MCInst TmpInst; 508 bool isPPC64 = Subtarget->isPPC64(); 509 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 510 const Module *M = MF->getFunction().getParent(); 511 PICLevel::Level PL = M->getPICLevel(); 512 513 #ifndef NDEBUG 514 // Validate that SPE and FPU are mutually exclusive in codegen 515 if (!MI->isInlineAsm()) { 516 for (const MachineOperand &MO: MI->operands()) { 517 if (MO.isReg()) { 518 unsigned Reg = MO.getReg(); 519 if (Subtarget->hasSPE()) { 520 if (PPC::F4RCRegClass.contains(Reg) || 521 PPC::F8RCRegClass.contains(Reg) || 522 PPC::QBRCRegClass.contains(Reg) || 523 PPC::QFRCRegClass.contains(Reg) || 524 PPC::QSRCRegClass.contains(Reg) || 525 PPC::VFRCRegClass.contains(Reg) || 526 PPC::VRRCRegClass.contains(Reg) || 527 PPC::VSFRCRegClass.contains(Reg) || 528 PPC::VSSRCRegClass.contains(Reg) 529 ) 530 llvm_unreachable("SPE targets cannot have FPRegs!"); 531 } else { 532 if (PPC::SPERCRegClass.contains(Reg)) 533 llvm_unreachable("SPE register found in FPU-targeted code!"); 534 } 535 } 536 } 537 } 538 #endif 539 // Lower multi-instruction pseudo operations. 540 switch (MI->getOpcode()) { 541 default: break; 542 case TargetOpcode::DBG_VALUE: 543 llvm_unreachable("Should be handled target independently"); 544 case TargetOpcode::STACKMAP: 545 return LowerSTACKMAP(SM, *MI); 546 case TargetOpcode::PATCHPOINT: 547 return LowerPATCHPOINT(SM, *MI); 548 549 case PPC::MoveGOTtoLR: { 550 // Transform %lr = MoveGOTtoLR 551 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 552 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 553 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 554 // blrl 555 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 556 MCSymbol *GOTSymbol = 557 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 558 const MCExpr *OffsExpr = 559 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 560 MCSymbolRefExpr::VK_PPC_LOCAL, 561 OutContext), 562 MCConstantExpr::create(4, OutContext), 563 OutContext); 564 565 // Emit the 'bl'. 566 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 567 return; 568 } 569 case PPC::MovePCtoLR: 570 case PPC::MovePCtoLR8: { 571 // Transform %lr = MovePCtoLR 572 // Into this, where the label is the PIC base: 573 // bl L1$pb 574 // L1$pb: 575 MCSymbol *PICBase = MF->getPICBaseSymbol(); 576 577 // Emit the 'bl'. 578 EmitToStreamer(*OutStreamer, 579 MCInstBuilder(PPC::BL) 580 // FIXME: We would like an efficient form for this, so we 581 // don't have to do a lot of extra uniquing. 582 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 583 584 // Emit the label. 585 OutStreamer->EmitLabel(PICBase); 586 return; 587 } 588 case PPC::UpdateGBR: { 589 // Transform %rd = UpdateGBR(%rt, %ri) 590 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 591 // add %rd, %rt, %ri 592 // or into (if secure plt mode is on): 593 // addis r30, r30, .LTOC - .L0$pb@ha 594 // addi r30, r30, .LTOC - .L0$pb@l 595 // Get the offset from the GOT Base Register to the GOT 596 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 597 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 598 unsigned PICR = TmpInst.getOperand(0).getReg(); 599 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 600 const MCExpr *PB = 601 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 602 OutContext); 603 604 const MCExpr *LTOCDeltaExpr = 605 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 606 PB, OutContext); 607 608 const MCExpr *LTOCDeltaHi = 609 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 610 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 611 .addReg(PICR) 612 .addReg(PICR) 613 .addExpr(LTOCDeltaHi)); 614 615 const MCExpr *LTOCDeltaLo = 616 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 617 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 618 .addReg(PICR) 619 .addReg(PICR) 620 .addExpr(LTOCDeltaLo)); 621 return; 622 } else { 623 MCSymbol *PICOffset = 624 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 625 TmpInst.setOpcode(PPC::LWZ); 626 const MCExpr *Exp = 627 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 628 const MCExpr *PB = 629 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 630 MCSymbolRefExpr::VK_None, 631 OutContext); 632 const MCOperand TR = TmpInst.getOperand(1); 633 const MCOperand PICR = TmpInst.getOperand(0); 634 635 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 636 TmpInst.getOperand(1) = 637 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 638 TmpInst.getOperand(0) = TR; 639 TmpInst.getOperand(2) = PICR; 640 EmitToStreamer(*OutStreamer, TmpInst); 641 642 TmpInst.setOpcode(PPC::ADD4); 643 TmpInst.getOperand(0) = PICR; 644 TmpInst.getOperand(1) = TR; 645 TmpInst.getOperand(2) = PICR; 646 EmitToStreamer(*OutStreamer, TmpInst); 647 return; 648 } 649 } 650 case PPC::LWZtoc: { 651 // Transform %r3 = LWZtoc @min1, %r2 652 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 653 654 // Change the opcode to LWZ, and the global address operand to be a 655 // reference to the GOT entry we will synthesize later. 656 TmpInst.setOpcode(PPC::LWZ); 657 const MachineOperand &MO = MI->getOperand(1); 658 659 // Map symbol -> label of TOC entry 660 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 661 MCSymbol *MOSymbol = nullptr; 662 if (MO.isGlobal()) 663 MOSymbol = getSymbol(MO.getGlobal()); 664 else if (MO.isCPI()) 665 MOSymbol = GetCPISymbol(MO.getIndex()); 666 else if (MO.isJTI()) 667 MOSymbol = GetJTISymbol(MO.getIndex()); 668 else if (MO.isBlockAddress()) 669 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 670 671 if (PL == PICLevel::SmallPIC) { 672 const MCExpr *Exp = 673 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 674 OutContext); 675 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 676 } else { 677 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 678 679 const MCExpr *Exp = 680 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 681 OutContext); 682 const MCExpr *PB = 683 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 684 OutContext); 685 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 686 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 687 } 688 EmitToStreamer(*OutStreamer, TmpInst); 689 return; 690 } 691 case PPC::LDtocJTI: 692 case PPC::LDtocCPT: 693 case PPC::LDtocBA: 694 case PPC::LDtoc: { 695 // Transform %x3 = LDtoc @min1, %x2 696 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 697 698 // Change the opcode to LD, and the global address operand to be a 699 // reference to the TOC entry we will synthesize later. 700 TmpInst.setOpcode(PPC::LD); 701 const MachineOperand &MO = MI->getOperand(1); 702 703 // Map symbol -> label of TOC entry 704 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 705 MCSymbol *MOSymbol = nullptr; 706 if (MO.isGlobal()) 707 MOSymbol = getSymbol(MO.getGlobal()); 708 else if (MO.isCPI()) 709 MOSymbol = GetCPISymbol(MO.getIndex()); 710 else if (MO.isJTI()) 711 MOSymbol = GetJTISymbol(MO.getIndex()); 712 else if (MO.isBlockAddress()) 713 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 714 715 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 716 717 const MCExpr *Exp = 718 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 719 OutContext); 720 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 721 EmitToStreamer(*OutStreamer, TmpInst); 722 return; 723 } 724 725 case PPC::ADDIStocHA: { 726 // Transform %xd = ADDIStocHA %x2, @sym 727 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 728 729 // Change the opcode to ADDIS8. If the global address is external, has 730 // common linkage, is a non-local function address, or is a jump table 731 // address, then generate a TOC entry and reference that. Otherwise 732 // reference the symbol directly. 733 TmpInst.setOpcode(PPC::ADDIS8); 734 const MachineOperand &MO = MI->getOperand(2); 735 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 736 MO.isBlockAddress()) && 737 "Invalid operand for ADDIStocHA!"); 738 MCSymbol *MOSymbol = nullptr; 739 bool GlobalToc = false; 740 741 if (MO.isGlobal()) { 742 const GlobalValue *GV = MO.getGlobal(); 743 MOSymbol = getSymbol(GV); 744 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 745 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 746 } else if (MO.isCPI()) { 747 MOSymbol = GetCPISymbol(MO.getIndex()); 748 } else if (MO.isJTI()) { 749 MOSymbol = GetJTISymbol(MO.getIndex()); 750 } else if (MO.isBlockAddress()) { 751 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 752 } 753 754 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 755 TM.getCodeModel() == CodeModel::Large) 756 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 757 758 const MCExpr *Exp = 759 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 760 OutContext); 761 762 if (!MO.isJTI() && MO.getOffset()) 763 Exp = MCBinaryExpr::createAdd(Exp, 764 MCConstantExpr::create(MO.getOffset(), 765 OutContext), 766 OutContext); 767 768 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 769 EmitToStreamer(*OutStreamer, TmpInst); 770 return; 771 } 772 case PPC::LDtocL: { 773 // Transform %xd = LDtocL @sym, %xs 774 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 775 776 // Change the opcode to LD. If the global address is external, has 777 // common linkage, or is a jump table address, then reference the 778 // associated TOC entry. Otherwise reference the symbol directly. 779 TmpInst.setOpcode(PPC::LD); 780 const MachineOperand &MO = MI->getOperand(1); 781 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 782 MO.isBlockAddress()) && 783 "Invalid operand for LDtocL!"); 784 MCSymbol *MOSymbol = nullptr; 785 786 if (MO.isJTI()) 787 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 788 else if (MO.isBlockAddress()) { 789 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 790 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 791 } 792 else if (MO.isCPI()) { 793 MOSymbol = GetCPISymbol(MO.getIndex()); 794 if (TM.getCodeModel() == CodeModel::Large) 795 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 796 } 797 else if (MO.isGlobal()) { 798 const GlobalValue *GV = MO.getGlobal(); 799 MOSymbol = getSymbol(GV); 800 LLVM_DEBUG( 801 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 802 assert((GVFlags & PPCII::MO_NLP_FLAG) && 803 "LDtocL used on symbol that could be accessed directly is " 804 "invalid. Must match ADDIStocHA.")); 805 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 806 } 807 808 const MCExpr *Exp = 809 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 810 OutContext); 811 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 812 EmitToStreamer(*OutStreamer, TmpInst); 813 return; 814 } 815 case PPC::ADDItocL: { 816 // Transform %xd = ADDItocL %xs, @sym 817 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 818 819 // Change the opcode to ADDI8. If the global address is external, then 820 // generate a TOC entry and reference that. Otherwise reference the 821 // symbol directly. 822 TmpInst.setOpcode(PPC::ADDI8); 823 const MachineOperand &MO = MI->getOperand(2); 824 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 825 MCSymbol *MOSymbol = nullptr; 826 827 if (MO.isGlobal()) { 828 const GlobalValue *GV = MO.getGlobal(); 829 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 830 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 831 "Interposable definitions must use indirect access.")); 832 MOSymbol = getSymbol(GV); 833 } else if (MO.isCPI()) { 834 MOSymbol = GetCPISymbol(MO.getIndex()); 835 } 836 837 const MCExpr *Exp = 838 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 839 OutContext); 840 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 841 EmitToStreamer(*OutStreamer, TmpInst); 842 return; 843 } 844 case PPC::ADDISgotTprelHA: { 845 // Transform: %xd = ADDISgotTprelHA %x2, @sym 846 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 847 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 848 const MachineOperand &MO = MI->getOperand(2); 849 const GlobalValue *GValue = MO.getGlobal(); 850 MCSymbol *MOSymbol = getSymbol(GValue); 851 const MCExpr *SymGotTprel = 852 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 853 OutContext); 854 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 855 .addReg(MI->getOperand(0).getReg()) 856 .addReg(MI->getOperand(1).getReg()) 857 .addExpr(SymGotTprel)); 858 return; 859 } 860 case PPC::LDgotTprelL: 861 case PPC::LDgotTprelL32: { 862 // Transform %xd = LDgotTprelL @sym, %xs 863 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 864 865 // Change the opcode to LD. 866 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 867 const MachineOperand &MO = MI->getOperand(1); 868 const GlobalValue *GValue = MO.getGlobal(); 869 MCSymbol *MOSymbol = getSymbol(GValue); 870 const MCExpr *Exp = 871 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 872 OutContext); 873 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 874 EmitToStreamer(*OutStreamer, TmpInst); 875 return; 876 } 877 878 case PPC::PPC32PICGOT: { 879 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 880 MCSymbol *GOTRef = OutContext.createTempSymbol(); 881 MCSymbol *NextInstr = OutContext.createTempSymbol(); 882 883 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 884 // FIXME: We would like an efficient form for this, so we don't have to do 885 // a lot of extra uniquing. 886 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 887 const MCExpr *OffsExpr = 888 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 889 MCSymbolRefExpr::create(GOTRef, OutContext), 890 OutContext); 891 OutStreamer->EmitLabel(GOTRef); 892 OutStreamer->EmitValue(OffsExpr, 4); 893 OutStreamer->EmitLabel(NextInstr); 894 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 895 .addReg(MI->getOperand(0).getReg())); 896 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 897 .addReg(MI->getOperand(1).getReg()) 898 .addImm(0) 899 .addReg(MI->getOperand(0).getReg())); 900 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 901 .addReg(MI->getOperand(0).getReg()) 902 .addReg(MI->getOperand(1).getReg()) 903 .addReg(MI->getOperand(0).getReg())); 904 return; 905 } 906 case PPC::PPC32GOT: { 907 MCSymbol *GOTSymbol = 908 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 909 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 910 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 911 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 912 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 913 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 914 .addReg(MI->getOperand(0).getReg()) 915 .addExpr(SymGotTlsL)); 916 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 917 .addReg(MI->getOperand(0).getReg()) 918 .addReg(MI->getOperand(0).getReg()) 919 .addExpr(SymGotTlsHA)); 920 return; 921 } 922 case PPC::ADDIStlsgdHA: { 923 // Transform: %xd = ADDIStlsgdHA %x2, @sym 924 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 925 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 926 const MachineOperand &MO = MI->getOperand(2); 927 const GlobalValue *GValue = MO.getGlobal(); 928 MCSymbol *MOSymbol = getSymbol(GValue); 929 const MCExpr *SymGotTlsGD = 930 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 931 OutContext); 932 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 933 .addReg(MI->getOperand(0).getReg()) 934 .addReg(MI->getOperand(1).getReg()) 935 .addExpr(SymGotTlsGD)); 936 return; 937 } 938 case PPC::ADDItlsgdL: 939 // Transform: %xd = ADDItlsgdL %xs, @sym 940 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 941 case PPC::ADDItlsgdL32: { 942 // Transform: %rd = ADDItlsgdL32 %rs, @sym 943 // Into: %rd = ADDI %rs, sym@got@tlsgd 944 const MachineOperand &MO = MI->getOperand(2); 945 const GlobalValue *GValue = MO.getGlobal(); 946 MCSymbol *MOSymbol = getSymbol(GValue); 947 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 948 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 949 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 950 OutContext); 951 EmitToStreamer(*OutStreamer, 952 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 953 .addReg(MI->getOperand(0).getReg()) 954 .addReg(MI->getOperand(1).getReg()) 955 .addExpr(SymGotTlsGD)); 956 return; 957 } 958 case PPC::GETtlsADDR: 959 // Transform: %x3 = GETtlsADDR %x3, @sym 960 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 961 case PPC::GETtlsADDR32: { 962 // Transform: %r3 = GETtlsADDR32 %r3, @sym 963 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 964 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 965 return; 966 } 967 case PPC::ADDIStlsldHA: { 968 // Transform: %xd = ADDIStlsldHA %x2, @sym 969 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 970 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 971 const MachineOperand &MO = MI->getOperand(2); 972 const GlobalValue *GValue = MO.getGlobal(); 973 MCSymbol *MOSymbol = getSymbol(GValue); 974 const MCExpr *SymGotTlsLD = 975 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 976 OutContext); 977 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 978 .addReg(MI->getOperand(0).getReg()) 979 .addReg(MI->getOperand(1).getReg()) 980 .addExpr(SymGotTlsLD)); 981 return; 982 } 983 case PPC::ADDItlsldL: 984 // Transform: %xd = ADDItlsldL %xs, @sym 985 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 986 case PPC::ADDItlsldL32: { 987 // Transform: %rd = ADDItlsldL32 %rs, @sym 988 // Into: %rd = ADDI %rs, sym@got@tlsld 989 const MachineOperand &MO = MI->getOperand(2); 990 const GlobalValue *GValue = MO.getGlobal(); 991 MCSymbol *MOSymbol = getSymbol(GValue); 992 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 993 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 994 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 995 OutContext); 996 EmitToStreamer(*OutStreamer, 997 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 998 .addReg(MI->getOperand(0).getReg()) 999 .addReg(MI->getOperand(1).getReg()) 1000 .addExpr(SymGotTlsLD)); 1001 return; 1002 } 1003 case PPC::GETtlsldADDR: 1004 // Transform: %x3 = GETtlsldADDR %x3, @sym 1005 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1006 case PPC::GETtlsldADDR32: { 1007 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1008 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1009 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1010 return; 1011 } 1012 case PPC::ADDISdtprelHA: 1013 // Transform: %xd = ADDISdtprelHA %xs, @sym 1014 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1015 case PPC::ADDISdtprelHA32: { 1016 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1017 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1018 const MachineOperand &MO = MI->getOperand(2); 1019 const GlobalValue *GValue = MO.getGlobal(); 1020 MCSymbol *MOSymbol = getSymbol(GValue); 1021 const MCExpr *SymDtprel = 1022 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1023 OutContext); 1024 EmitToStreamer( 1025 *OutStreamer, 1026 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1027 .addReg(MI->getOperand(0).getReg()) 1028 .addReg(MI->getOperand(1).getReg()) 1029 .addExpr(SymDtprel)); 1030 return; 1031 } 1032 case PPC::ADDIdtprelL: 1033 // Transform: %xd = ADDIdtprelL %xs, @sym 1034 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1035 case PPC::ADDIdtprelL32: { 1036 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1037 // Into: %rd = ADDI %rs, sym@dtprel@l 1038 const MachineOperand &MO = MI->getOperand(2); 1039 const GlobalValue *GValue = MO.getGlobal(); 1040 MCSymbol *MOSymbol = getSymbol(GValue); 1041 const MCExpr *SymDtprel = 1042 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1043 OutContext); 1044 EmitToStreamer(*OutStreamer, 1045 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1046 .addReg(MI->getOperand(0).getReg()) 1047 .addReg(MI->getOperand(1).getReg()) 1048 .addExpr(SymDtprel)); 1049 return; 1050 } 1051 case PPC::MFOCRF: 1052 case PPC::MFOCRF8: 1053 if (!Subtarget->hasMFOCRF()) { 1054 // Transform: %r3 = MFOCRF %cr7 1055 // Into: %r3 = MFCR ;; cr7 1056 unsigned NewOpcode = 1057 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1058 OutStreamer->AddComment(PPCInstPrinter:: 1059 getRegisterName(MI->getOperand(1).getReg())); 1060 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1061 .addReg(MI->getOperand(0).getReg())); 1062 return; 1063 } 1064 break; 1065 case PPC::MTOCRF: 1066 case PPC::MTOCRF8: 1067 if (!Subtarget->hasMFOCRF()) { 1068 // Transform: %cr7 = MTOCRF %r3 1069 // Into: MTCRF mask, %r3 ;; cr7 1070 unsigned NewOpcode = 1071 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1072 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1073 ->getEncodingValue(MI->getOperand(0).getReg()); 1074 OutStreamer->AddComment(PPCInstPrinter:: 1075 getRegisterName(MI->getOperand(0).getReg())); 1076 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1077 .addImm(Mask) 1078 .addReg(MI->getOperand(1).getReg())); 1079 return; 1080 } 1081 break; 1082 case PPC::LD: 1083 case PPC::STD: 1084 case PPC::LWA_32: 1085 case PPC::LWA: { 1086 // Verify alignment is legal, so we don't create relocations 1087 // that can't be supported. 1088 // FIXME: This test is currently disabled for Darwin. The test 1089 // suite shows a handful of test cases that fail this check for 1090 // Darwin. Those need to be investigated before this sanity test 1091 // can be enabled for those subtargets. 1092 if (!Subtarget->isDarwin()) { 1093 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1094 const MachineOperand &MO = MI->getOperand(OpNum); 1095 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1096 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1097 } 1098 // Now process the instruction normally. 1099 break; 1100 } 1101 } 1102 1103 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1104 EmitToStreamer(*OutStreamer, TmpInst); 1105 } 1106 1107 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1108 if (!Subtarget->isPPC64()) 1109 return PPCAsmPrinter::EmitInstruction(MI); 1110 1111 switch (MI->getOpcode()) { 1112 default: 1113 return PPCAsmPrinter::EmitInstruction(MI); 1114 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1115 // .begin: 1116 // b .end # lis 0, FuncId[16..32] 1117 // nop # li 0, FuncId[0..15] 1118 // std 0, -8(1) 1119 // mflr 0 1120 // bl __xray_FunctionEntry 1121 // mtlr 0 1122 // .end: 1123 // 1124 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1125 // of instructions change. 1126 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1127 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1128 OutStreamer->EmitLabel(BeginOfSled); 1129 EmitToStreamer(*OutStreamer, 1130 MCInstBuilder(PPC::B).addExpr( 1131 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1132 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1133 EmitToStreamer( 1134 *OutStreamer, 1135 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1136 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1137 EmitToStreamer(*OutStreamer, 1138 MCInstBuilder(PPC::BL8_NOP) 1139 .addExpr(MCSymbolRefExpr::create( 1140 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1141 OutContext))); 1142 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1143 OutStreamer->EmitLabel(EndOfSled); 1144 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1145 break; 1146 } 1147 case TargetOpcode::PATCHABLE_RET: { 1148 unsigned RetOpcode = MI->getOperand(0).getImm(); 1149 MCInst RetInst; 1150 RetInst.setOpcode(RetOpcode); 1151 for (const auto &MO : 1152 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1153 MCOperand MCOp; 1154 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1155 RetInst.addOperand(MCOp); 1156 } 1157 1158 bool IsConditional; 1159 if (RetOpcode == PPC::BCCLR) { 1160 IsConditional = true; 1161 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1162 RetOpcode == PPC::TCRETURNai8) { 1163 break; 1164 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1165 IsConditional = false; 1166 } else { 1167 EmitToStreamer(*OutStreamer, RetInst); 1168 break; 1169 } 1170 1171 MCSymbol *FallthroughLabel; 1172 if (IsConditional) { 1173 // Before: 1174 // bgtlr cr0 1175 // 1176 // After: 1177 // ble cr0, .end 1178 // .p2align 3 1179 // .begin: 1180 // blr # lis 0, FuncId[16..32] 1181 // nop # li 0, FuncId[0..15] 1182 // std 0, -8(1) 1183 // mflr 0 1184 // bl __xray_FunctionExit 1185 // mtlr 0 1186 // blr 1187 // .end: 1188 // 1189 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1190 // of instructions change. 1191 FallthroughLabel = OutContext.createTempSymbol(); 1192 EmitToStreamer( 1193 *OutStreamer, 1194 MCInstBuilder(PPC::BCC) 1195 .addImm(PPC::InvertPredicate( 1196 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1197 .addReg(MI->getOperand(2).getReg()) 1198 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1199 RetInst = MCInst(); 1200 RetInst.setOpcode(PPC::BLR8); 1201 } 1202 // .p2align 3 1203 // .begin: 1204 // b(lr)? # lis 0, FuncId[16..32] 1205 // nop # li 0, FuncId[0..15] 1206 // std 0, -8(1) 1207 // mflr 0 1208 // bl __xray_FunctionExit 1209 // mtlr 0 1210 // b(lr)? 1211 // 1212 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1213 // of instructions change. 1214 OutStreamer->EmitCodeAlignment(8); 1215 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1216 OutStreamer->EmitLabel(BeginOfSled); 1217 EmitToStreamer(*OutStreamer, RetInst); 1218 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1219 EmitToStreamer( 1220 *OutStreamer, 1221 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1222 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1223 EmitToStreamer(*OutStreamer, 1224 MCInstBuilder(PPC::BL8_NOP) 1225 .addExpr(MCSymbolRefExpr::create( 1226 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1227 OutContext))); 1228 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1229 EmitToStreamer(*OutStreamer, RetInst); 1230 if (IsConditional) 1231 OutStreamer->EmitLabel(FallthroughLabel); 1232 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1233 break; 1234 } 1235 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1236 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1237 case TargetOpcode::PATCHABLE_TAIL_CALL: 1238 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1239 // normal function exit from a tail exit. 1240 llvm_unreachable("Tail call is handled in the normal case. See comments " 1241 "around this assert."); 1242 } 1243 } 1244 1245 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1246 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1247 PPCTargetStreamer *TS = 1248 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1249 1250 if (TS) 1251 TS->emitAbiVersion(2); 1252 } 1253 1254 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1255 !isPositionIndependent()) 1256 return AsmPrinter::EmitStartOfAsmFile(M); 1257 1258 if (M.getPICLevel() == PICLevel::SmallPIC) 1259 return AsmPrinter::EmitStartOfAsmFile(M); 1260 1261 OutStreamer->SwitchSection(OutContext.getELFSection( 1262 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1263 1264 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1265 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1266 1267 OutStreamer->EmitLabel(CurrentPos); 1268 1269 // The GOT pointer points to the middle of the GOT, in order to reference the 1270 // entire 64kB range. 0x8000 is the midpoint. 1271 const MCExpr *tocExpr = 1272 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1273 MCConstantExpr::create(0x8000, OutContext), 1274 OutContext); 1275 1276 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1277 1278 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1279 } 1280 1281 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1282 // linux/ppc32 - Normal entry label. 1283 if (!Subtarget->isPPC64() && 1284 (!isPositionIndependent() || 1285 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1286 return AsmPrinter::EmitFunctionEntryLabel(); 1287 1288 if (!Subtarget->isPPC64()) { 1289 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1290 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1291 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1292 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1293 OutStreamer->EmitLabel(RelocSymbol); 1294 1295 const MCExpr *OffsExpr = 1296 MCBinaryExpr::createSub( 1297 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1298 OutContext), 1299 MCSymbolRefExpr::create(PICBase, OutContext), 1300 OutContext); 1301 OutStreamer->EmitValue(OffsExpr, 4); 1302 OutStreamer->EmitLabel(CurrentFnSym); 1303 return; 1304 } else 1305 return AsmPrinter::EmitFunctionEntryLabel(); 1306 } 1307 1308 // ELFv2 ABI - Normal entry label. 1309 if (Subtarget->isELFv2ABI()) { 1310 // In the Large code model, we allow arbitrary displacements between 1311 // the text section and its associated TOC section. We place the 1312 // full 8-byte offset to the TOC in memory immediately preceding 1313 // the function global entry point. 1314 if (TM.getCodeModel() == CodeModel::Large 1315 && !MF->getRegInfo().use_empty(PPC::X2)) { 1316 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1317 1318 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1319 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1320 const MCExpr *TOCDeltaExpr = 1321 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1322 MCSymbolRefExpr::create(GlobalEPSymbol, 1323 OutContext), 1324 OutContext); 1325 1326 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1327 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1328 } 1329 return AsmPrinter::EmitFunctionEntryLabel(); 1330 } 1331 1332 // Emit an official procedure descriptor. 1333 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1334 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1335 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1336 OutStreamer->SwitchSection(Section); 1337 OutStreamer->EmitLabel(CurrentFnSym); 1338 OutStreamer->EmitValueToAlignment(8); 1339 MCSymbol *Symbol1 = CurrentFnSymForSize; 1340 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1341 // entry point. 1342 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1343 8 /*size*/); 1344 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1345 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1346 OutStreamer->EmitValue( 1347 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1348 8/*size*/); 1349 // Emit a null environment pointer. 1350 OutStreamer->EmitIntValue(0, 8 /* size */); 1351 OutStreamer->SwitchSection(Current.first, Current.second); 1352 } 1353 1354 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1355 const DataLayout &DL = getDataLayout(); 1356 1357 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1358 1359 PPCTargetStreamer &TS = 1360 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1361 1362 if (!TOC.empty()) { 1363 MCSectionELF *Section; 1364 1365 if (isPPC64) 1366 Section = OutStreamer->getContext().getELFSection( 1367 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1368 else 1369 Section = OutStreamer->getContext().getELFSection( 1370 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1371 OutStreamer->SwitchSection(Section); 1372 1373 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1374 E = TOC.end(); I != E; ++I) { 1375 OutStreamer->EmitLabel(I->second); 1376 MCSymbol *S = I->first; 1377 if (isPPC64) { 1378 TS.emitTCEntry(*S); 1379 } else { 1380 OutStreamer->EmitValueToAlignment(4); 1381 OutStreamer->EmitSymbolValue(S, 4); 1382 } 1383 } 1384 } 1385 1386 return AsmPrinter::doFinalization(M); 1387 } 1388 1389 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1390 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1391 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1392 // provide two entry points. The ABI guarantees that when calling the 1393 // local entry point, r2 is set up by the caller to contain the TOC base 1394 // for this function, and when calling the global entry point, r12 is set 1395 // up by the caller to hold the address of the global entry point. We 1396 // thus emit a prefix sequence along the following lines: 1397 // 1398 // func: 1399 // .Lfunc_gepNN: 1400 // # global entry point 1401 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1402 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1403 // .Lfunc_lepNN: 1404 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1405 // # local entry point, followed by function body 1406 // 1407 // For the Large code model, we create 1408 // 1409 // .Lfunc_tocNN: 1410 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1411 // func: 1412 // .Lfunc_gepNN: 1413 // # global entry point 1414 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1415 // add r2,r2,r12 1416 // .Lfunc_lepNN: 1417 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1418 // # local entry point, followed by function body 1419 // 1420 // This ensures we have r2 set up correctly while executing the function 1421 // body, no matter which entry point is called. 1422 if (Subtarget->isELFv2ABI() 1423 // Only do all that if the function uses r2 in the first place. 1424 && !MF->getRegInfo().use_empty(PPC::X2)) { 1425 // Note: The logic here must be synchronized with the code in the 1426 // branch-selection pass which sets the offset of the first block in the 1427 // function. This matters because it affects the alignment. 1428 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1429 1430 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1431 OutStreamer->EmitLabel(GlobalEntryLabel); 1432 const MCSymbolRefExpr *GlobalEntryLabelExp = 1433 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1434 1435 if (TM.getCodeModel() != CodeModel::Large) { 1436 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1437 const MCExpr *TOCDeltaExpr = 1438 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1439 GlobalEntryLabelExp, OutContext); 1440 1441 const MCExpr *TOCDeltaHi = 1442 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1443 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1444 .addReg(PPC::X2) 1445 .addReg(PPC::X12) 1446 .addExpr(TOCDeltaHi)); 1447 1448 const MCExpr *TOCDeltaLo = 1449 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1450 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1451 .addReg(PPC::X2) 1452 .addReg(PPC::X2) 1453 .addExpr(TOCDeltaLo)); 1454 } else { 1455 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1456 const MCExpr *TOCOffsetDeltaExpr = 1457 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1458 GlobalEntryLabelExp, OutContext); 1459 1460 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1461 .addReg(PPC::X2) 1462 .addExpr(TOCOffsetDeltaExpr) 1463 .addReg(PPC::X12)); 1464 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1465 .addReg(PPC::X2) 1466 .addReg(PPC::X2) 1467 .addReg(PPC::X12)); 1468 } 1469 1470 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1471 OutStreamer->EmitLabel(LocalEntryLabel); 1472 const MCSymbolRefExpr *LocalEntryLabelExp = 1473 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1474 const MCExpr *LocalOffsetExp = 1475 MCBinaryExpr::createSub(LocalEntryLabelExp, 1476 GlobalEntryLabelExp, OutContext); 1477 1478 PPCTargetStreamer *TS = 1479 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1480 1481 if (TS) 1482 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1483 } 1484 } 1485 1486 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1487 /// directive. 1488 /// 1489 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1490 // Only the 64-bit target requires a traceback table. For now, 1491 // we only emit the word of zeroes that GDB requires to find 1492 // the end of the function, and zeroes for the eight-byte 1493 // mandatory fields. 1494 // FIXME: We should fill in the eight-byte mandatory fields as described in 1495 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1496 // currently make use of these fields). 1497 if (Subtarget->isPPC64()) { 1498 OutStreamer->EmitIntValue(0, 4/*size*/); 1499 OutStreamer->EmitIntValue(0, 8/*size*/); 1500 } 1501 } 1502 1503 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1504 static const char *const CPUDirectives[] = { 1505 "", 1506 "ppc", 1507 "ppc440", 1508 "ppc601", 1509 "ppc602", 1510 "ppc603", 1511 "ppc7400", 1512 "ppc750", 1513 "ppc970", 1514 "ppcA2", 1515 "ppce500", 1516 "ppce500mc", 1517 "ppce5500", 1518 "power3", 1519 "power4", 1520 "power5", 1521 "power5x", 1522 "power6", 1523 "power6x", 1524 "power7", 1525 // FIXME: why is power8 missing here? 1526 "ppc64", 1527 "ppc64le", 1528 "power9" 1529 }; 1530 1531 // Get the numerically largest directive. 1532 // FIXME: How should we merge darwin directives? 1533 unsigned Directive = PPC::DIR_NONE; 1534 for (const Function &F : M) { 1535 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1536 unsigned FDir = STI.getDarwinDirective(); 1537 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1538 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1539 Directive = PPC::DIR_970; 1540 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1541 Directive = PPC::DIR_7400; 1542 if (STI.isPPC64() && Directive < PPC::DIR_64) 1543 Directive = PPC::DIR_64; 1544 } 1545 1546 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1547 1548 assert(Directive < array_lengthof(CPUDirectives) && 1549 "CPUDirectives[] might not be up-to-date!"); 1550 PPCTargetStreamer &TStreamer = 1551 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1552 TStreamer.emitMachine(CPUDirectives[Directive]); 1553 1554 // Prime text sections so they are adjacent. This reduces the likelihood a 1555 // large data or debug section causes a branch to exceed 16M limit. 1556 const TargetLoweringObjectFileMachO &TLOFMacho = 1557 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1558 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1559 if (TM.getRelocationModel() == Reloc::PIC_) { 1560 OutStreamer->SwitchSection( 1561 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1562 MachO::S_SYMBOL_STUBS | 1563 MachO::S_ATTR_PURE_INSTRUCTIONS, 1564 32, SectionKind::getText())); 1565 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1566 OutStreamer->SwitchSection( 1567 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1568 MachO::S_SYMBOL_STUBS | 1569 MachO::S_ATTR_PURE_INSTRUCTIONS, 1570 16, SectionKind::getText())); 1571 } 1572 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1573 } 1574 1575 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1576 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1577 1578 // Darwin/PPC always uses mach-o. 1579 const TargetLoweringObjectFileMachO &TLOFMacho = 1580 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1581 if (MMI) { 1582 MachineModuleInfoMachO &MMIMacho = 1583 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1584 1585 if (MAI->doesSupportExceptionHandling()) { 1586 // Add the (possibly multiple) personalities to the set of global values. 1587 // Only referenced functions get into the Personalities list. 1588 for (const Function *Personality : MMI->getPersonalities()) { 1589 if (Personality) { 1590 MCSymbol *NLPSym = 1591 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1592 MachineModuleInfoImpl::StubValueTy &StubSym = 1593 MMIMacho.getGVStubEntry(NLPSym); 1594 StubSym = 1595 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1596 } 1597 } 1598 } 1599 1600 // Output stubs for dynamically-linked functions. 1601 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1602 1603 // Output macho stubs for external and common global variables. 1604 if (!Stubs.empty()) { 1605 // Switch with ".non_lazy_symbol_pointer" directive. 1606 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1607 EmitAlignment(isPPC64 ? 3 : 2); 1608 1609 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1610 // L_foo$stub: 1611 OutStreamer->EmitLabel(Stubs[i].first); 1612 // .indirect_symbol _foo 1613 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1614 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1615 MCSA_IndirectSymbol); 1616 1617 if (MCSym.getInt()) 1618 // External to current translation unit. 1619 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1620 else 1621 // Internal to current translation unit. 1622 // 1623 // When we place the LSDA into the TEXT section, the type info 1624 // pointers 1625 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1626 // However, sometimes the types are local to the file. So we need to 1627 // fill in the value for the NLP in those cases. 1628 OutStreamer->EmitValue( 1629 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1630 isPPC64 ? 8 : 4 /*size*/); 1631 } 1632 1633 Stubs.clear(); 1634 OutStreamer->AddBlankLine(); 1635 } 1636 } 1637 1638 // Funny Darwin hack: This flag tells the linker that no global symbols 1639 // contain code that falls through to other global symbols (e.g. the obvious 1640 // implementation of multiple entry points). If this doesn't occur, the 1641 // linker can safely perform dead code stripping. Since LLVM never generates 1642 // code that does this, it is always safe to set. 1643 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1644 1645 return AsmPrinter::doFinalization(M); 1646 } 1647 1648 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1649 /// for a MachineFunction to the given output stream, in a format that the 1650 /// Darwin assembler can deal with. 1651 /// 1652 static AsmPrinter * 1653 createPPCAsmPrinterPass(TargetMachine &tm, 1654 std::unique_ptr<MCStreamer> &&Streamer) { 1655 if (tm.getTargetTriple().isMacOSX()) 1656 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1657 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1658 } 1659 1660 // Force static initialization. 1661 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1662 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1663 createPPCAsmPrinterPass); 1664 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1665 createPPCAsmPrinterPass); 1666 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1667 createPPCAsmPrinterPass); 1668 } 1669