1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCStreamer.h" 55 #include "llvm/MC/MCSymbol.h" 56 #include "llvm/MC/MCSymbolELF.h" 57 #include "llvm/MC/SectionKind.h" 58 #include "llvm/Support/Casting.h" 59 #include "llvm/Support/CodeGen.h" 60 #include "llvm/Support/Debug.h" 61 #include "llvm/Support/ErrorHandling.h" 62 #include "llvm/Support/TargetRegistry.h" 63 #include "llvm/Support/raw_ostream.h" 64 #include "llvm/Target/TargetMachine.h" 65 #include <algorithm> 66 #include <cassert> 67 #include <cstdint> 68 #include <memory> 69 #include <new> 70 71 using namespace llvm; 72 73 #define DEBUG_TYPE "asmprinter" 74 75 namespace { 76 77 class PPCAsmPrinter : public AsmPrinter { 78 protected: 79 MapVector<MCSymbol *, MCSymbol *> TOC; 80 const PPCSubtarget *Subtarget; 81 StackMaps SM; 82 83 public: 84 explicit PPCAsmPrinter(TargetMachine &TM, 85 std::unique_ptr<MCStreamer> Streamer) 86 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 87 88 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 89 90 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 91 92 bool doInitialization(Module &M) override { 93 if (!TOC.empty()) 94 TOC.clear(); 95 return AsmPrinter::doInitialization(M); 96 } 97 98 void EmitInstruction(const MachineInstr *MI) override; 99 100 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 101 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 102 /// The \p MI would be INLINEASM ONLY. 103 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 104 105 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 106 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 107 const char *ExtraCode, raw_ostream &O) override; 108 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 111 void EmitEndOfAsmFile(Module &M) override; 112 113 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 114 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 115 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 116 bool runOnMachineFunction(MachineFunction &MF) override { 117 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 118 bool Changed = AsmPrinter::runOnMachineFunction(MF); 119 emitXRayTable(); 120 return Changed; 121 } 122 }; 123 124 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 125 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 126 public: 127 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 128 std::unique_ptr<MCStreamer> Streamer) 129 : PPCAsmPrinter(TM, std::move(Streamer)) {} 130 131 StringRef getPassName() const override { 132 return "Linux PPC Assembly Printer"; 133 } 134 135 bool doFinalization(Module &M) override; 136 void EmitStartOfAsmFile(Module &M) override; 137 138 void EmitFunctionEntryLabel() override; 139 140 void EmitFunctionBodyStart() override; 141 void EmitFunctionBodyEnd() override; 142 void EmitInstruction(const MachineInstr *MI) override; 143 }; 144 145 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 146 /// OS X 147 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 148 public: 149 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 150 std::unique_ptr<MCStreamer> Streamer) 151 : PPCAsmPrinter(TM, std::move(Streamer)) {} 152 153 StringRef getPassName() const override { 154 return "Darwin PPC Assembly Printer"; 155 } 156 157 bool doFinalization(Module &M) override; 158 void EmitStartOfAsmFile(Module &M) override; 159 }; 160 161 } // end anonymous namespace 162 163 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 164 raw_ostream &O) { 165 // Computing the address of a global symbol, not calling it. 166 const GlobalValue *GV = MO.getGlobal(); 167 MCSymbol *SymToPrint; 168 169 // External or weakly linked global variables need non-lazily-resolved stubs 170 if (Subtarget->hasLazyResolverStub(GV)) { 171 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 172 MachineModuleInfoImpl::StubValueTy &StubSym = 173 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 174 SymToPrint); 175 if (!StubSym.getPointer()) 176 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 177 !GV->hasInternalLinkage()); 178 } else { 179 SymToPrint = getSymbol(GV); 180 } 181 182 SymToPrint->print(O, MAI); 183 184 printOffset(MO.getOffset(), O); 185 } 186 187 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 188 raw_ostream &O) { 189 const DataLayout &DL = getDataLayout(); 190 const MachineOperand &MO = MI->getOperand(OpNo); 191 192 switch (MO.getType()) { 193 case MachineOperand::MO_Register: { 194 // The MI is INLINEASM ONLY and UseVSXReg is always false. 195 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 196 197 // Linux assembler (Others?) does not take register mnemonics. 198 // FIXME - What about special registers used in mfspr/mtspr? 199 if (!Subtarget->isDarwin()) 200 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 201 O << RegName; 202 return; 203 } 204 case MachineOperand::MO_Immediate: 205 O << MO.getImm(); 206 return; 207 208 case MachineOperand::MO_MachineBasicBlock: 209 MO.getMBB()->getSymbol()->print(O, MAI); 210 return; 211 case MachineOperand::MO_ConstantPoolIndex: 212 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 213 << MO.getIndex(); 214 return; 215 case MachineOperand::MO_BlockAddress: 216 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 217 return; 218 case MachineOperand::MO_GlobalAddress: { 219 PrintSymbolOperand(MO, O); 220 return; 221 } 222 223 default: 224 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 225 return; 226 } 227 } 228 229 /// PrintAsmOperand - Print out an operand for an inline asm expression. 230 /// 231 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 232 const char *ExtraCode, raw_ostream &O) { 233 // Does this asm operand have a single letter operand modifier? 234 if (ExtraCode && ExtraCode[0]) { 235 if (ExtraCode[1] != 0) return true; // Unknown modifier. 236 237 switch (ExtraCode[0]) { 238 default: 239 // See if this is a generic print operand 240 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 241 case 'L': // Write second word of DImode reference. 242 // Verify that this operand has two consecutive registers. 243 if (!MI->getOperand(OpNo).isReg() || 244 OpNo+1 == MI->getNumOperands() || 245 !MI->getOperand(OpNo+1).isReg()) 246 return true; 247 ++OpNo; // Return the high-part. 248 break; 249 case 'I': 250 // Write 'i' if an integer constant, otherwise nothing. Used to print 251 // addi vs add, etc. 252 if (MI->getOperand(OpNo).isImm()) 253 O << "i"; 254 return false; 255 case 'x': 256 if(!MI->getOperand(OpNo).isReg()) 257 return true; 258 // This operand uses VSX numbering. 259 // If the operand is a VMX register, convert it to a VSX register. 260 unsigned Reg = MI->getOperand(OpNo).getReg(); 261 if (PPCInstrInfo::isVRRegister(Reg)) 262 Reg = PPC::VSX32 + (Reg - PPC::V0); 263 else if (PPCInstrInfo::isVFRegister(Reg)) 264 Reg = PPC::VSX32 + (Reg - PPC::VF0); 265 const char *RegName; 266 RegName = PPCInstPrinter::getRegisterName(Reg); 267 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 268 O << RegName; 269 return false; 270 } 271 } 272 273 printOperand(MI, OpNo, O); 274 return false; 275 } 276 277 // At the moment, all inline asm memory operands are a single register. 278 // In any case, the output of this routine should always be just one 279 // assembler operand. 280 281 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 282 const char *ExtraCode, 283 raw_ostream &O) { 284 if (ExtraCode && ExtraCode[0]) { 285 if (ExtraCode[1] != 0) return true; // Unknown modifier. 286 287 switch (ExtraCode[0]) { 288 default: return true; // Unknown modifier. 289 case 'y': // A memory reference for an X-form instruction 290 { 291 const char *RegName = "r0"; 292 if (!Subtarget->isDarwin()) 293 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 294 O << RegName << ", "; 295 printOperand(MI, OpNo, O); 296 return false; 297 } 298 case 'U': // Print 'u' for update form. 299 case 'X': // Print 'x' for indexed form. 300 { 301 // FIXME: Currently for PowerPC memory operands are always loaded 302 // into a register, so we never get an update or indexed form. 303 // This is bad even for offset forms, since even if we know we 304 // have a value in -16(r1), we will generate a load into r<n> 305 // and then load from 0(r<n>). Until that issue is fixed, 306 // tolerate 'U' and 'X' but don't output anything. 307 assert(MI->getOperand(OpNo).isReg()); 308 return false; 309 } 310 } 311 } 312 313 assert(MI->getOperand(OpNo).isReg()); 314 O << "0("; 315 printOperand(MI, OpNo, O); 316 O << ")"; 317 return false; 318 } 319 320 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 321 /// exists for it. If not, create one. Then return a symbol that references 322 /// the TOC entry. 323 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 324 MCSymbol *&TOCEntry = TOC[Sym]; 325 if (!TOCEntry) 326 TOCEntry = createTempSymbol("C"); 327 return TOCEntry; 328 } 329 330 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 331 emitStackMaps(SM); 332 } 333 334 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 335 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 336 337 SM.recordStackMap(MI); 338 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 339 340 // Scan ahead to trim the shadow. 341 const MachineBasicBlock &MBB = *MI.getParent(); 342 MachineBasicBlock::const_iterator MII(MI); 343 ++MII; 344 while (NumNOPBytes > 0) { 345 if (MII == MBB.end() || MII->isCall() || 346 MII->getOpcode() == PPC::DBG_VALUE || 347 MII->getOpcode() == TargetOpcode::PATCHPOINT || 348 MII->getOpcode() == TargetOpcode::STACKMAP) 349 break; 350 ++MII; 351 NumNOPBytes -= 4; 352 } 353 354 // Emit nops. 355 for (unsigned i = 0; i < NumNOPBytes; i += 4) 356 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 357 } 358 359 // Lower a patchpoint of the form: 360 // [<def>], <id>, <numBytes>, <target>, <numArgs> 361 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 362 SM.recordPatchPoint(MI); 363 PatchPointOpers Opers(&MI); 364 365 unsigned EncodedBytes = 0; 366 const MachineOperand &CalleeMO = Opers.getCallTarget(); 367 368 if (CalleeMO.isImm()) { 369 int64_t CallTarget = CalleeMO.getImm(); 370 if (CallTarget) { 371 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 372 "High 16 bits of call target should be zero."); 373 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 374 EncodedBytes = 0; 375 // Materialize the jump address: 376 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 377 .addReg(ScratchReg) 378 .addImm((CallTarget >> 32) & 0xFFFF)); 379 ++EncodedBytes; 380 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 381 .addReg(ScratchReg) 382 .addReg(ScratchReg) 383 .addImm(32).addImm(16)); 384 ++EncodedBytes; 385 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 386 .addReg(ScratchReg) 387 .addReg(ScratchReg) 388 .addImm((CallTarget >> 16) & 0xFFFF)); 389 ++EncodedBytes; 390 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 391 .addReg(ScratchReg) 392 .addReg(ScratchReg) 393 .addImm(CallTarget & 0xFFFF)); 394 395 // Save the current TOC pointer before the remote call. 396 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 397 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 398 .addReg(PPC::X2) 399 .addImm(TOCSaveOffset) 400 .addReg(PPC::X1)); 401 ++EncodedBytes; 402 403 // If we're on ELFv1, then we need to load the actual function pointer 404 // from the function descriptor. 405 if (!Subtarget->isELFv2ABI()) { 406 // Load the new TOC pointer and the function address, but not r11 407 // (needing this is rare, and loading it here would prevent passing it 408 // via a 'nest' parameter. 409 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 410 .addReg(PPC::X2) 411 .addImm(8) 412 .addReg(ScratchReg)); 413 ++EncodedBytes; 414 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 415 .addReg(ScratchReg) 416 .addImm(0) 417 .addReg(ScratchReg)); 418 ++EncodedBytes; 419 } 420 421 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 422 .addReg(ScratchReg)); 423 ++EncodedBytes; 424 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 425 ++EncodedBytes; 426 427 // Restore the TOC pointer after the call. 428 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 429 .addReg(PPC::X2) 430 .addImm(TOCSaveOffset) 431 .addReg(PPC::X1)); 432 ++EncodedBytes; 433 } 434 } else if (CalleeMO.isGlobal()) { 435 const GlobalValue *GValue = CalleeMO.getGlobal(); 436 MCSymbol *MOSymbol = getSymbol(GValue); 437 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 438 439 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 440 .addExpr(SymVar)); 441 EncodedBytes += 2; 442 } 443 444 // Each instruction is 4 bytes. 445 EncodedBytes *= 4; 446 447 // Emit padding. 448 unsigned NumBytes = Opers.getNumPatchBytes(); 449 assert(NumBytes >= EncodedBytes && 450 "Patchpoint can't request size less than the length of a call."); 451 assert((NumBytes - EncodedBytes) % 4 == 0 && 452 "Invalid number of NOP bytes requested!"); 453 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 454 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 455 } 456 457 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 458 /// call to __tls_get_addr to the current output stream. 459 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 460 MCSymbolRefExpr::VariantKind VK) { 461 StringRef Name = "__tls_get_addr"; 462 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 463 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 464 465 assert(MI->getOperand(0).isReg() && 466 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 467 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 468 "GETtls[ld]ADDR[32] must define GPR3"); 469 assert(MI->getOperand(1).isReg() && 470 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 471 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 472 "GETtls[ld]ADDR[32] must read GPR3"); 473 474 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 475 isPositionIndependent()) 476 Kind = MCSymbolRefExpr::VK_PLT; 477 const MCExpr *TlsRef = 478 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 479 480 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 481 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt()) 482 TlsRef = MCBinaryExpr::createAdd(TlsRef, 483 MCConstantExpr::create(32768, OutContext), 484 OutContext); 485 const MachineOperand &MO = MI->getOperand(2); 486 const GlobalValue *GValue = MO.getGlobal(); 487 MCSymbol *MOSymbol = getSymbol(GValue); 488 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 489 EmitToStreamer(*OutStreamer, 490 MCInstBuilder(Subtarget->isPPC64() ? 491 PPC::BL8_NOP_TLS : PPC::BL_TLS) 492 .addExpr(TlsRef) 493 .addExpr(SymVar)); 494 } 495 496 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 497 /// the current output stream. 498 /// 499 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 500 MCInst TmpInst; 501 bool isPPC64 = Subtarget->isPPC64(); 502 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 503 const Module *M = MF->getFunction().getParent(); 504 PICLevel::Level PL = M->getPICLevel(); 505 506 #ifndef NDEBUG 507 // Validate that SPE and FPU are mutually exclusive in codegen 508 if (!MI->isInlineAsm()) { 509 for (const MachineOperand &MO: MI->operands()) { 510 if (MO.isReg()) { 511 unsigned Reg = MO.getReg(); 512 if (Subtarget->hasSPE()) { 513 if (PPC::F4RCRegClass.contains(Reg) || 514 PPC::F8RCRegClass.contains(Reg) || 515 PPC::QBRCRegClass.contains(Reg) || 516 PPC::QFRCRegClass.contains(Reg) || 517 PPC::QSRCRegClass.contains(Reg) || 518 PPC::VFRCRegClass.contains(Reg) || 519 PPC::VRRCRegClass.contains(Reg) || 520 PPC::VSFRCRegClass.contains(Reg) || 521 PPC::VSSRCRegClass.contains(Reg) 522 ) 523 llvm_unreachable("SPE targets cannot have FPRegs!"); 524 } else { 525 if (PPC::SPERCRegClass.contains(Reg)) 526 llvm_unreachable("SPE register found in FPU-targeted code!"); 527 } 528 } 529 } 530 } 531 #endif 532 // Lower multi-instruction pseudo operations. 533 switch (MI->getOpcode()) { 534 default: break; 535 case TargetOpcode::DBG_VALUE: 536 llvm_unreachable("Should be handled target independently"); 537 case TargetOpcode::STACKMAP: 538 return LowerSTACKMAP(SM, *MI); 539 case TargetOpcode::PATCHPOINT: 540 return LowerPATCHPOINT(SM, *MI); 541 542 case PPC::MoveGOTtoLR: { 543 // Transform %lr = MoveGOTtoLR 544 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 545 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 546 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 547 // blrl 548 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 549 MCSymbol *GOTSymbol = 550 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 551 const MCExpr *OffsExpr = 552 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 553 MCSymbolRefExpr::VK_PPC_LOCAL, 554 OutContext), 555 MCConstantExpr::create(4, OutContext), 556 OutContext); 557 558 // Emit the 'bl'. 559 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 560 return; 561 } 562 case PPC::MovePCtoLR: 563 case PPC::MovePCtoLR8: { 564 // Transform %lr = MovePCtoLR 565 // Into this, where the label is the PIC base: 566 // bl L1$pb 567 // L1$pb: 568 MCSymbol *PICBase = MF->getPICBaseSymbol(); 569 570 // Emit the 'bl'. 571 EmitToStreamer(*OutStreamer, 572 MCInstBuilder(PPC::BL) 573 // FIXME: We would like an efficient form for this, so we 574 // don't have to do a lot of extra uniquing. 575 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 576 577 // Emit the label. 578 OutStreamer->EmitLabel(PICBase); 579 return; 580 } 581 case PPC::UpdateGBR: { 582 // Transform %rd = UpdateGBR(%rt, %ri) 583 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 584 // add %rd, %rt, %ri 585 // or into (if secure plt mode is on): 586 // addis r30, r30, .LTOC - .L0$pb@ha 587 // addi r30, r30, .LTOC - .L0$pb@l 588 // Get the offset from the GOT Base Register to the GOT 589 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 590 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 591 unsigned PICR = TmpInst.getOperand(0).getReg(); 592 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 593 const MCExpr *PB = 594 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 595 OutContext); 596 597 const MCExpr *LTOCDeltaExpr = 598 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 599 PB, OutContext); 600 601 const MCExpr *LTOCDeltaHi = 602 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 603 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 604 .addReg(PICR) 605 .addReg(PICR) 606 .addExpr(LTOCDeltaHi)); 607 608 const MCExpr *LTOCDeltaLo = 609 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 610 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 611 .addReg(PICR) 612 .addReg(PICR) 613 .addExpr(LTOCDeltaLo)); 614 return; 615 } else { 616 MCSymbol *PICOffset = 617 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 618 TmpInst.setOpcode(PPC::LWZ); 619 const MCExpr *Exp = 620 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 621 const MCExpr *PB = 622 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 623 MCSymbolRefExpr::VK_None, 624 OutContext); 625 const MCOperand TR = TmpInst.getOperand(1); 626 const MCOperand PICR = TmpInst.getOperand(0); 627 628 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 629 TmpInst.getOperand(1) = 630 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 631 TmpInst.getOperand(0) = TR; 632 TmpInst.getOperand(2) = PICR; 633 EmitToStreamer(*OutStreamer, TmpInst); 634 635 TmpInst.setOpcode(PPC::ADD4); 636 TmpInst.getOperand(0) = PICR; 637 TmpInst.getOperand(1) = TR; 638 TmpInst.getOperand(2) = PICR; 639 EmitToStreamer(*OutStreamer, TmpInst); 640 return; 641 } 642 } 643 case PPC::LWZtoc: { 644 // Transform %r3 = LWZtoc @min1, %r2 645 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 646 647 // Change the opcode to LWZ, and the global address operand to be a 648 // reference to the GOT entry we will synthesize later. 649 TmpInst.setOpcode(PPC::LWZ); 650 const MachineOperand &MO = MI->getOperand(1); 651 652 // Map symbol -> label of TOC entry 653 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 654 MCSymbol *MOSymbol = nullptr; 655 if (MO.isGlobal()) 656 MOSymbol = getSymbol(MO.getGlobal()); 657 else if (MO.isCPI()) 658 MOSymbol = GetCPISymbol(MO.getIndex()); 659 else if (MO.isJTI()) 660 MOSymbol = GetJTISymbol(MO.getIndex()); 661 else if (MO.isBlockAddress()) 662 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 663 664 if (PL == PICLevel::SmallPIC) { 665 const MCExpr *Exp = 666 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 667 OutContext); 668 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 669 } else { 670 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 671 672 const MCExpr *Exp = 673 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 674 OutContext); 675 const MCExpr *PB = 676 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 677 OutContext); 678 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 679 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 680 } 681 EmitToStreamer(*OutStreamer, TmpInst); 682 return; 683 } 684 case PPC::LDtocJTI: 685 case PPC::LDtocCPT: 686 case PPC::LDtocBA: 687 case PPC::LDtoc: { 688 // Transform %x3 = LDtoc @min1, %x2 689 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 690 691 // Change the opcode to LD, and the global address operand to be a 692 // reference to the TOC entry we will synthesize later. 693 TmpInst.setOpcode(PPC::LD); 694 const MachineOperand &MO = MI->getOperand(1); 695 696 // Map symbol -> label of TOC entry 697 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 698 MCSymbol *MOSymbol = nullptr; 699 if (MO.isGlobal()) 700 MOSymbol = getSymbol(MO.getGlobal()); 701 else if (MO.isCPI()) 702 MOSymbol = GetCPISymbol(MO.getIndex()); 703 else if (MO.isJTI()) 704 MOSymbol = GetJTISymbol(MO.getIndex()); 705 else if (MO.isBlockAddress()) 706 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 707 708 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 709 710 const MCExpr *Exp = 711 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 712 OutContext); 713 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 714 EmitToStreamer(*OutStreamer, TmpInst); 715 return; 716 } 717 718 case PPC::ADDIStocHA: { 719 // Transform %xd = ADDIStocHA %x2, @sym 720 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 721 722 // Change the opcode to ADDIS8. If the global address is external, has 723 // common linkage, is a non-local function address, or is a jump table 724 // address, then generate a TOC entry and reference that. Otherwise 725 // reference the symbol directly. 726 TmpInst.setOpcode(PPC::ADDIS8); 727 const MachineOperand &MO = MI->getOperand(2); 728 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 729 MO.isBlockAddress()) && 730 "Invalid operand for ADDIStocHA!"); 731 MCSymbol *MOSymbol = nullptr; 732 bool GlobalToc = false; 733 734 if (MO.isGlobal()) { 735 const GlobalValue *GV = MO.getGlobal(); 736 MOSymbol = getSymbol(GV); 737 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 738 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 739 } else if (MO.isCPI()) { 740 MOSymbol = GetCPISymbol(MO.getIndex()); 741 } else if (MO.isJTI()) { 742 MOSymbol = GetJTISymbol(MO.getIndex()); 743 } else if (MO.isBlockAddress()) { 744 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 745 } 746 747 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 748 TM.getCodeModel() == CodeModel::Large) 749 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 750 751 const MCExpr *Exp = 752 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 753 OutContext); 754 755 if (!MO.isJTI() && MO.getOffset()) 756 Exp = MCBinaryExpr::createAdd(Exp, 757 MCConstantExpr::create(MO.getOffset(), 758 OutContext), 759 OutContext); 760 761 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 762 EmitToStreamer(*OutStreamer, TmpInst); 763 return; 764 } 765 case PPC::LDtocL: { 766 // Transform %xd = LDtocL @sym, %xs 767 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 768 769 // Change the opcode to LD. If the global address is external, has 770 // common linkage, or is a jump table address, then reference the 771 // associated TOC entry. Otherwise reference the symbol directly. 772 TmpInst.setOpcode(PPC::LD); 773 const MachineOperand &MO = MI->getOperand(1); 774 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 775 MO.isBlockAddress()) && 776 "Invalid operand for LDtocL!"); 777 MCSymbol *MOSymbol = nullptr; 778 779 if (MO.isJTI()) 780 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 781 else if (MO.isBlockAddress()) { 782 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 783 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 784 } 785 else if (MO.isCPI()) { 786 MOSymbol = GetCPISymbol(MO.getIndex()); 787 if (TM.getCodeModel() == CodeModel::Large) 788 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 789 } 790 else if (MO.isGlobal()) { 791 const GlobalValue *GV = MO.getGlobal(); 792 MOSymbol = getSymbol(GV); 793 LLVM_DEBUG( 794 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 795 assert((GVFlags & PPCII::MO_NLP_FLAG) && 796 "LDtocL used on symbol that could be accessed directly is " 797 "invalid. Must match ADDIStocHA.")); 798 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 799 } 800 801 const MCExpr *Exp = 802 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 803 OutContext); 804 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 805 EmitToStreamer(*OutStreamer, TmpInst); 806 return; 807 } 808 case PPC::ADDItocL: { 809 // Transform %xd = ADDItocL %xs, @sym 810 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 811 812 // Change the opcode to ADDI8. If the global address is external, then 813 // generate a TOC entry and reference that. Otherwise reference the 814 // symbol directly. 815 TmpInst.setOpcode(PPC::ADDI8); 816 const MachineOperand &MO = MI->getOperand(2); 817 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 818 MCSymbol *MOSymbol = nullptr; 819 820 if (MO.isGlobal()) { 821 const GlobalValue *GV = MO.getGlobal(); 822 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 823 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 824 "Interposable definitions must use indirect access.")); 825 MOSymbol = getSymbol(GV); 826 } else if (MO.isCPI()) { 827 MOSymbol = GetCPISymbol(MO.getIndex()); 828 } 829 830 const MCExpr *Exp = 831 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 832 OutContext); 833 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 834 EmitToStreamer(*OutStreamer, TmpInst); 835 return; 836 } 837 case PPC::ADDISgotTprelHA: { 838 // Transform: %xd = ADDISgotTprelHA %x2, @sym 839 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 840 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 841 const MachineOperand &MO = MI->getOperand(2); 842 const GlobalValue *GValue = MO.getGlobal(); 843 MCSymbol *MOSymbol = getSymbol(GValue); 844 const MCExpr *SymGotTprel = 845 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 846 OutContext); 847 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 848 .addReg(MI->getOperand(0).getReg()) 849 .addReg(MI->getOperand(1).getReg()) 850 .addExpr(SymGotTprel)); 851 return; 852 } 853 case PPC::LDgotTprelL: 854 case PPC::LDgotTprelL32: { 855 // Transform %xd = LDgotTprelL @sym, %xs 856 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 857 858 // Change the opcode to LD. 859 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 860 const MachineOperand &MO = MI->getOperand(1); 861 const GlobalValue *GValue = MO.getGlobal(); 862 MCSymbol *MOSymbol = getSymbol(GValue); 863 const MCExpr *Exp = 864 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 865 OutContext); 866 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 867 EmitToStreamer(*OutStreamer, TmpInst); 868 return; 869 } 870 871 case PPC::PPC32PICGOT: { 872 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 873 MCSymbol *GOTRef = OutContext.createTempSymbol(); 874 MCSymbol *NextInstr = OutContext.createTempSymbol(); 875 876 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 877 // FIXME: We would like an efficient form for this, so we don't have to do 878 // a lot of extra uniquing. 879 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 880 const MCExpr *OffsExpr = 881 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 882 MCSymbolRefExpr::create(GOTRef, OutContext), 883 OutContext); 884 OutStreamer->EmitLabel(GOTRef); 885 OutStreamer->EmitValue(OffsExpr, 4); 886 OutStreamer->EmitLabel(NextInstr); 887 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 888 .addReg(MI->getOperand(0).getReg())); 889 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 890 .addReg(MI->getOperand(1).getReg()) 891 .addImm(0) 892 .addReg(MI->getOperand(0).getReg())); 893 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 894 .addReg(MI->getOperand(0).getReg()) 895 .addReg(MI->getOperand(1).getReg()) 896 .addReg(MI->getOperand(0).getReg())); 897 return; 898 } 899 case PPC::PPC32GOT: { 900 MCSymbol *GOTSymbol = 901 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 902 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 903 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 904 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 905 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 906 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 907 .addReg(MI->getOperand(0).getReg()) 908 .addExpr(SymGotTlsL)); 909 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 910 .addReg(MI->getOperand(0).getReg()) 911 .addReg(MI->getOperand(0).getReg()) 912 .addExpr(SymGotTlsHA)); 913 return; 914 } 915 case PPC::ADDIStlsgdHA: { 916 // Transform: %xd = ADDIStlsgdHA %x2, @sym 917 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 918 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 919 const MachineOperand &MO = MI->getOperand(2); 920 const GlobalValue *GValue = MO.getGlobal(); 921 MCSymbol *MOSymbol = getSymbol(GValue); 922 const MCExpr *SymGotTlsGD = 923 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 924 OutContext); 925 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 926 .addReg(MI->getOperand(0).getReg()) 927 .addReg(MI->getOperand(1).getReg()) 928 .addExpr(SymGotTlsGD)); 929 return; 930 } 931 case PPC::ADDItlsgdL: 932 // Transform: %xd = ADDItlsgdL %xs, @sym 933 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 934 case PPC::ADDItlsgdL32: { 935 // Transform: %rd = ADDItlsgdL32 %rs, @sym 936 // Into: %rd = ADDI %rs, sym@got@tlsgd 937 const MachineOperand &MO = MI->getOperand(2); 938 const GlobalValue *GValue = MO.getGlobal(); 939 MCSymbol *MOSymbol = getSymbol(GValue); 940 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 941 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 942 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 943 OutContext); 944 EmitToStreamer(*OutStreamer, 945 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 946 .addReg(MI->getOperand(0).getReg()) 947 .addReg(MI->getOperand(1).getReg()) 948 .addExpr(SymGotTlsGD)); 949 return; 950 } 951 case PPC::GETtlsADDR: 952 // Transform: %x3 = GETtlsADDR %x3, @sym 953 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 954 case PPC::GETtlsADDR32: { 955 // Transform: %r3 = GETtlsADDR32 %r3, @sym 956 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 957 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 958 return; 959 } 960 case PPC::ADDIStlsldHA: { 961 // Transform: %xd = ADDIStlsldHA %x2, @sym 962 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 963 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 964 const MachineOperand &MO = MI->getOperand(2); 965 const GlobalValue *GValue = MO.getGlobal(); 966 MCSymbol *MOSymbol = getSymbol(GValue); 967 const MCExpr *SymGotTlsLD = 968 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 969 OutContext); 970 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 971 .addReg(MI->getOperand(0).getReg()) 972 .addReg(MI->getOperand(1).getReg()) 973 .addExpr(SymGotTlsLD)); 974 return; 975 } 976 case PPC::ADDItlsldL: 977 // Transform: %xd = ADDItlsldL %xs, @sym 978 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 979 case PPC::ADDItlsldL32: { 980 // Transform: %rd = ADDItlsldL32 %rs, @sym 981 // Into: %rd = ADDI %rs, sym@got@tlsld 982 const MachineOperand &MO = MI->getOperand(2); 983 const GlobalValue *GValue = MO.getGlobal(); 984 MCSymbol *MOSymbol = getSymbol(GValue); 985 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 986 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 987 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 988 OutContext); 989 EmitToStreamer(*OutStreamer, 990 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 991 .addReg(MI->getOperand(0).getReg()) 992 .addReg(MI->getOperand(1).getReg()) 993 .addExpr(SymGotTlsLD)); 994 return; 995 } 996 case PPC::GETtlsldADDR: 997 // Transform: %x3 = GETtlsldADDR %x3, @sym 998 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 999 case PPC::GETtlsldADDR32: { 1000 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1001 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1002 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1003 return; 1004 } 1005 case PPC::ADDISdtprelHA: 1006 // Transform: %xd = ADDISdtprelHA %xs, @sym 1007 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1008 case PPC::ADDISdtprelHA32: { 1009 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1010 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1011 const MachineOperand &MO = MI->getOperand(2); 1012 const GlobalValue *GValue = MO.getGlobal(); 1013 MCSymbol *MOSymbol = getSymbol(GValue); 1014 const MCExpr *SymDtprel = 1015 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1016 OutContext); 1017 EmitToStreamer( 1018 *OutStreamer, 1019 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1020 .addReg(MI->getOperand(0).getReg()) 1021 .addReg(MI->getOperand(1).getReg()) 1022 .addExpr(SymDtprel)); 1023 return; 1024 } 1025 case PPC::ADDIdtprelL: 1026 // Transform: %xd = ADDIdtprelL %xs, @sym 1027 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1028 case PPC::ADDIdtprelL32: { 1029 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1030 // Into: %rd = ADDI %rs, sym@dtprel@l 1031 const MachineOperand &MO = MI->getOperand(2); 1032 const GlobalValue *GValue = MO.getGlobal(); 1033 MCSymbol *MOSymbol = getSymbol(GValue); 1034 const MCExpr *SymDtprel = 1035 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1036 OutContext); 1037 EmitToStreamer(*OutStreamer, 1038 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1039 .addReg(MI->getOperand(0).getReg()) 1040 .addReg(MI->getOperand(1).getReg()) 1041 .addExpr(SymDtprel)); 1042 return; 1043 } 1044 case PPC::MFOCRF: 1045 case PPC::MFOCRF8: 1046 if (!Subtarget->hasMFOCRF()) { 1047 // Transform: %r3 = MFOCRF %cr7 1048 // Into: %r3 = MFCR ;; cr7 1049 unsigned NewOpcode = 1050 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1051 OutStreamer->AddComment(PPCInstPrinter:: 1052 getRegisterName(MI->getOperand(1).getReg())); 1053 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1054 .addReg(MI->getOperand(0).getReg())); 1055 return; 1056 } 1057 break; 1058 case PPC::MTOCRF: 1059 case PPC::MTOCRF8: 1060 if (!Subtarget->hasMFOCRF()) { 1061 // Transform: %cr7 = MTOCRF %r3 1062 // Into: MTCRF mask, %r3 ;; cr7 1063 unsigned NewOpcode = 1064 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1065 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1066 ->getEncodingValue(MI->getOperand(0).getReg()); 1067 OutStreamer->AddComment(PPCInstPrinter:: 1068 getRegisterName(MI->getOperand(0).getReg())); 1069 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1070 .addImm(Mask) 1071 .addReg(MI->getOperand(1).getReg())); 1072 return; 1073 } 1074 break; 1075 case PPC::LD: 1076 case PPC::STD: 1077 case PPC::LWA_32: 1078 case PPC::LWA: { 1079 // Verify alignment is legal, so we don't create relocations 1080 // that can't be supported. 1081 // FIXME: This test is currently disabled for Darwin. The test 1082 // suite shows a handful of test cases that fail this check for 1083 // Darwin. Those need to be investigated before this sanity test 1084 // can be enabled for those subtargets. 1085 if (!Subtarget->isDarwin()) { 1086 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1087 const MachineOperand &MO = MI->getOperand(OpNum); 1088 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1089 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1090 } 1091 // Now process the instruction normally. 1092 break; 1093 } 1094 } 1095 1096 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1097 EmitToStreamer(*OutStreamer, TmpInst); 1098 } 1099 1100 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1101 if (!Subtarget->isPPC64()) 1102 return PPCAsmPrinter::EmitInstruction(MI); 1103 1104 switch (MI->getOpcode()) { 1105 default: 1106 return PPCAsmPrinter::EmitInstruction(MI); 1107 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1108 // .begin: 1109 // b .end # lis 0, FuncId[16..32] 1110 // nop # li 0, FuncId[0..15] 1111 // std 0, -8(1) 1112 // mflr 0 1113 // bl __xray_FunctionEntry 1114 // mtlr 0 1115 // .end: 1116 // 1117 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1118 // of instructions change. 1119 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1120 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1121 OutStreamer->EmitLabel(BeginOfSled); 1122 EmitToStreamer(*OutStreamer, 1123 MCInstBuilder(PPC::B).addExpr( 1124 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1125 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1126 EmitToStreamer( 1127 *OutStreamer, 1128 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1129 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1130 EmitToStreamer(*OutStreamer, 1131 MCInstBuilder(PPC::BL8_NOP) 1132 .addExpr(MCSymbolRefExpr::create( 1133 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1134 OutContext))); 1135 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1136 OutStreamer->EmitLabel(EndOfSled); 1137 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1138 break; 1139 } 1140 case TargetOpcode::PATCHABLE_RET: { 1141 unsigned RetOpcode = MI->getOperand(0).getImm(); 1142 MCInst RetInst; 1143 RetInst.setOpcode(RetOpcode); 1144 for (const auto &MO : 1145 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1146 MCOperand MCOp; 1147 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1148 RetInst.addOperand(MCOp); 1149 } 1150 1151 bool IsConditional; 1152 if (RetOpcode == PPC::BCCLR) { 1153 IsConditional = true; 1154 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1155 RetOpcode == PPC::TCRETURNai8) { 1156 break; 1157 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1158 IsConditional = false; 1159 } else { 1160 EmitToStreamer(*OutStreamer, RetInst); 1161 break; 1162 } 1163 1164 MCSymbol *FallthroughLabel; 1165 if (IsConditional) { 1166 // Before: 1167 // bgtlr cr0 1168 // 1169 // After: 1170 // ble cr0, .end 1171 // .p2align 3 1172 // .begin: 1173 // blr # lis 0, FuncId[16..32] 1174 // nop # li 0, FuncId[0..15] 1175 // std 0, -8(1) 1176 // mflr 0 1177 // bl __xray_FunctionExit 1178 // mtlr 0 1179 // blr 1180 // .end: 1181 // 1182 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1183 // of instructions change. 1184 FallthroughLabel = OutContext.createTempSymbol(); 1185 EmitToStreamer( 1186 *OutStreamer, 1187 MCInstBuilder(PPC::BCC) 1188 .addImm(PPC::InvertPredicate( 1189 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1190 .addReg(MI->getOperand(2).getReg()) 1191 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1192 RetInst = MCInst(); 1193 RetInst.setOpcode(PPC::BLR8); 1194 } 1195 // .p2align 3 1196 // .begin: 1197 // b(lr)? # lis 0, FuncId[16..32] 1198 // nop # li 0, FuncId[0..15] 1199 // std 0, -8(1) 1200 // mflr 0 1201 // bl __xray_FunctionExit 1202 // mtlr 0 1203 // b(lr)? 1204 // 1205 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1206 // of instructions change. 1207 OutStreamer->EmitCodeAlignment(8); 1208 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1209 OutStreamer->EmitLabel(BeginOfSled); 1210 EmitToStreamer(*OutStreamer, RetInst); 1211 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1212 EmitToStreamer( 1213 *OutStreamer, 1214 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1215 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1216 EmitToStreamer(*OutStreamer, 1217 MCInstBuilder(PPC::BL8_NOP) 1218 .addExpr(MCSymbolRefExpr::create( 1219 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1220 OutContext))); 1221 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1222 EmitToStreamer(*OutStreamer, RetInst); 1223 if (IsConditional) 1224 OutStreamer->EmitLabel(FallthroughLabel); 1225 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1226 break; 1227 } 1228 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1229 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1230 case TargetOpcode::PATCHABLE_TAIL_CALL: 1231 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1232 // normal function exit from a tail exit. 1233 llvm_unreachable("Tail call is handled in the normal case. See comments " 1234 "around this assert."); 1235 } 1236 } 1237 1238 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1239 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1240 PPCTargetStreamer *TS = 1241 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1242 1243 if (TS) 1244 TS->emitAbiVersion(2); 1245 } 1246 1247 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1248 !isPositionIndependent()) 1249 return AsmPrinter::EmitStartOfAsmFile(M); 1250 1251 if (M.getPICLevel() == PICLevel::SmallPIC) 1252 return AsmPrinter::EmitStartOfAsmFile(M); 1253 1254 OutStreamer->SwitchSection(OutContext.getELFSection( 1255 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1256 1257 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1258 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1259 1260 OutStreamer->EmitLabel(CurrentPos); 1261 1262 // The GOT pointer points to the middle of the GOT, in order to reference the 1263 // entire 64kB range. 0x8000 is the midpoint. 1264 const MCExpr *tocExpr = 1265 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1266 MCConstantExpr::create(0x8000, OutContext), 1267 OutContext); 1268 1269 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1270 1271 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1272 } 1273 1274 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1275 // linux/ppc32 - Normal entry label. 1276 if (!Subtarget->isPPC64() && 1277 (!isPositionIndependent() || 1278 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1279 return AsmPrinter::EmitFunctionEntryLabel(); 1280 1281 if (!Subtarget->isPPC64()) { 1282 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1283 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1284 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1285 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1286 OutStreamer->EmitLabel(RelocSymbol); 1287 1288 const MCExpr *OffsExpr = 1289 MCBinaryExpr::createSub( 1290 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1291 OutContext), 1292 MCSymbolRefExpr::create(PICBase, OutContext), 1293 OutContext); 1294 OutStreamer->EmitValue(OffsExpr, 4); 1295 OutStreamer->EmitLabel(CurrentFnSym); 1296 return; 1297 } else 1298 return AsmPrinter::EmitFunctionEntryLabel(); 1299 } 1300 1301 // ELFv2 ABI - Normal entry label. 1302 if (Subtarget->isELFv2ABI()) { 1303 // In the Large code model, we allow arbitrary displacements between 1304 // the text section and its associated TOC section. We place the 1305 // full 8-byte offset to the TOC in memory immediately preceding 1306 // the function global entry point. 1307 if (TM.getCodeModel() == CodeModel::Large 1308 && !MF->getRegInfo().use_empty(PPC::X2)) { 1309 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1310 1311 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1312 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1313 const MCExpr *TOCDeltaExpr = 1314 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1315 MCSymbolRefExpr::create(GlobalEPSymbol, 1316 OutContext), 1317 OutContext); 1318 1319 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1320 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1321 } 1322 return AsmPrinter::EmitFunctionEntryLabel(); 1323 } 1324 1325 // Emit an official procedure descriptor. 1326 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1327 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1328 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1329 OutStreamer->SwitchSection(Section); 1330 OutStreamer->EmitLabel(CurrentFnSym); 1331 OutStreamer->EmitValueToAlignment(8); 1332 MCSymbol *Symbol1 = CurrentFnSymForSize; 1333 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1334 // entry point. 1335 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1336 8 /*size*/); 1337 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1338 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1339 OutStreamer->EmitValue( 1340 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1341 8/*size*/); 1342 // Emit a null environment pointer. 1343 OutStreamer->EmitIntValue(0, 8 /* size */); 1344 OutStreamer->SwitchSection(Current.first, Current.second); 1345 } 1346 1347 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1348 const DataLayout &DL = getDataLayout(); 1349 1350 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1351 1352 PPCTargetStreamer &TS = 1353 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1354 1355 if (!TOC.empty()) { 1356 MCSectionELF *Section; 1357 1358 if (isPPC64) 1359 Section = OutStreamer->getContext().getELFSection( 1360 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1361 else 1362 Section = OutStreamer->getContext().getELFSection( 1363 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1364 OutStreamer->SwitchSection(Section); 1365 1366 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1367 E = TOC.end(); I != E; ++I) { 1368 OutStreamer->EmitLabel(I->second); 1369 MCSymbol *S = I->first; 1370 if (isPPC64) { 1371 TS.emitTCEntry(*S); 1372 } else { 1373 OutStreamer->EmitValueToAlignment(4); 1374 OutStreamer->EmitSymbolValue(S, 4); 1375 } 1376 } 1377 } 1378 1379 return AsmPrinter::doFinalization(M); 1380 } 1381 1382 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1383 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1384 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1385 // provide two entry points. The ABI guarantees that when calling the 1386 // local entry point, r2 is set up by the caller to contain the TOC base 1387 // for this function, and when calling the global entry point, r12 is set 1388 // up by the caller to hold the address of the global entry point. We 1389 // thus emit a prefix sequence along the following lines: 1390 // 1391 // func: 1392 // .Lfunc_gepNN: 1393 // # global entry point 1394 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1395 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1396 // .Lfunc_lepNN: 1397 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1398 // # local entry point, followed by function body 1399 // 1400 // For the Large code model, we create 1401 // 1402 // .Lfunc_tocNN: 1403 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1404 // func: 1405 // .Lfunc_gepNN: 1406 // # global entry point 1407 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1408 // add r2,r2,r12 1409 // .Lfunc_lepNN: 1410 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1411 // # local entry point, followed by function body 1412 // 1413 // This ensures we have r2 set up correctly while executing the function 1414 // body, no matter which entry point is called. 1415 if (Subtarget->isELFv2ABI() 1416 // Only do all that if the function uses r2 in the first place. 1417 && !MF->getRegInfo().use_empty(PPC::X2)) { 1418 // Note: The logic here must be synchronized with the code in the 1419 // branch-selection pass which sets the offset of the first block in the 1420 // function. This matters because it affects the alignment. 1421 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1422 1423 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1424 OutStreamer->EmitLabel(GlobalEntryLabel); 1425 const MCSymbolRefExpr *GlobalEntryLabelExp = 1426 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1427 1428 if (TM.getCodeModel() != CodeModel::Large) { 1429 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1430 const MCExpr *TOCDeltaExpr = 1431 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1432 GlobalEntryLabelExp, OutContext); 1433 1434 const MCExpr *TOCDeltaHi = 1435 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1436 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1437 .addReg(PPC::X2) 1438 .addReg(PPC::X12) 1439 .addExpr(TOCDeltaHi)); 1440 1441 const MCExpr *TOCDeltaLo = 1442 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1443 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1444 .addReg(PPC::X2) 1445 .addReg(PPC::X2) 1446 .addExpr(TOCDeltaLo)); 1447 } else { 1448 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1449 const MCExpr *TOCOffsetDeltaExpr = 1450 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1451 GlobalEntryLabelExp, OutContext); 1452 1453 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1454 .addReg(PPC::X2) 1455 .addExpr(TOCOffsetDeltaExpr) 1456 .addReg(PPC::X12)); 1457 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1458 .addReg(PPC::X2) 1459 .addReg(PPC::X2) 1460 .addReg(PPC::X12)); 1461 } 1462 1463 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1464 OutStreamer->EmitLabel(LocalEntryLabel); 1465 const MCSymbolRefExpr *LocalEntryLabelExp = 1466 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1467 const MCExpr *LocalOffsetExp = 1468 MCBinaryExpr::createSub(LocalEntryLabelExp, 1469 GlobalEntryLabelExp, OutContext); 1470 1471 PPCTargetStreamer *TS = 1472 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1473 1474 if (TS) 1475 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1476 } 1477 } 1478 1479 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1480 /// directive. 1481 /// 1482 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1483 // Only the 64-bit target requires a traceback table. For now, 1484 // we only emit the word of zeroes that GDB requires to find 1485 // the end of the function, and zeroes for the eight-byte 1486 // mandatory fields. 1487 // FIXME: We should fill in the eight-byte mandatory fields as described in 1488 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1489 // currently make use of these fields). 1490 if (Subtarget->isPPC64()) { 1491 OutStreamer->EmitIntValue(0, 4/*size*/); 1492 OutStreamer->EmitIntValue(0, 8/*size*/); 1493 } 1494 } 1495 1496 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1497 static const char *const CPUDirectives[] = { 1498 "", 1499 "ppc", 1500 "ppc440", 1501 "ppc601", 1502 "ppc602", 1503 "ppc603", 1504 "ppc7400", 1505 "ppc750", 1506 "ppc970", 1507 "ppcA2", 1508 "ppce500", 1509 "ppce500mc", 1510 "ppce5500", 1511 "power3", 1512 "power4", 1513 "power5", 1514 "power5x", 1515 "power6", 1516 "power6x", 1517 "power7", 1518 // FIXME: why is power8 missing here? 1519 "ppc64", 1520 "ppc64le", 1521 "power9" 1522 }; 1523 1524 // Get the numerically largest directive. 1525 // FIXME: How should we merge darwin directives? 1526 unsigned Directive = PPC::DIR_NONE; 1527 for (const Function &F : M) { 1528 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1529 unsigned FDir = STI.getDarwinDirective(); 1530 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1531 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1532 Directive = PPC::DIR_970; 1533 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1534 Directive = PPC::DIR_7400; 1535 if (STI.isPPC64() && Directive < PPC::DIR_64) 1536 Directive = PPC::DIR_64; 1537 } 1538 1539 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1540 1541 assert(Directive < array_lengthof(CPUDirectives) && 1542 "CPUDirectives[] might not be up-to-date!"); 1543 PPCTargetStreamer &TStreamer = 1544 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1545 TStreamer.emitMachine(CPUDirectives[Directive]); 1546 1547 // Prime text sections so they are adjacent. This reduces the likelihood a 1548 // large data or debug section causes a branch to exceed 16M limit. 1549 const TargetLoweringObjectFileMachO &TLOFMacho = 1550 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1551 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1552 if (TM.getRelocationModel() == Reloc::PIC_) { 1553 OutStreamer->SwitchSection( 1554 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1555 MachO::S_SYMBOL_STUBS | 1556 MachO::S_ATTR_PURE_INSTRUCTIONS, 1557 32, SectionKind::getText())); 1558 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1559 OutStreamer->SwitchSection( 1560 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1561 MachO::S_SYMBOL_STUBS | 1562 MachO::S_ATTR_PURE_INSTRUCTIONS, 1563 16, SectionKind::getText())); 1564 } 1565 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1566 } 1567 1568 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1569 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1570 1571 // Darwin/PPC always uses mach-o. 1572 const TargetLoweringObjectFileMachO &TLOFMacho = 1573 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1574 if (MMI) { 1575 MachineModuleInfoMachO &MMIMacho = 1576 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1577 1578 if (MAI->doesSupportExceptionHandling()) { 1579 // Add the (possibly multiple) personalities to the set of global values. 1580 // Only referenced functions get into the Personalities list. 1581 for (const Function *Personality : MMI->getPersonalities()) { 1582 if (Personality) { 1583 MCSymbol *NLPSym = 1584 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1585 MachineModuleInfoImpl::StubValueTy &StubSym = 1586 MMIMacho.getGVStubEntry(NLPSym); 1587 StubSym = 1588 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1589 } 1590 } 1591 } 1592 1593 // Output stubs for dynamically-linked functions. 1594 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1595 1596 // Output macho stubs for external and common global variables. 1597 if (!Stubs.empty()) { 1598 // Switch with ".non_lazy_symbol_pointer" directive. 1599 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1600 EmitAlignment(isPPC64 ? 3 : 2); 1601 1602 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1603 // L_foo$stub: 1604 OutStreamer->EmitLabel(Stubs[i].first); 1605 // .indirect_symbol _foo 1606 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1607 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1608 MCSA_IndirectSymbol); 1609 1610 if (MCSym.getInt()) 1611 // External to current translation unit. 1612 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1613 else 1614 // Internal to current translation unit. 1615 // 1616 // When we place the LSDA into the TEXT section, the type info 1617 // pointers 1618 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1619 // However, sometimes the types are local to the file. So we need to 1620 // fill in the value for the NLP in those cases. 1621 OutStreamer->EmitValue( 1622 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1623 isPPC64 ? 8 : 4 /*size*/); 1624 } 1625 1626 Stubs.clear(); 1627 OutStreamer->AddBlankLine(); 1628 } 1629 } 1630 1631 // Funny Darwin hack: This flag tells the linker that no global symbols 1632 // contain code that falls through to other global symbols (e.g. the obvious 1633 // implementation of multiple entry points). If this doesn't occur, the 1634 // linker can safely perform dead code stripping. Since LLVM never generates 1635 // code that does this, it is always safe to set. 1636 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1637 1638 return AsmPrinter::doFinalization(M); 1639 } 1640 1641 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1642 /// for a MachineFunction to the given output stream, in a format that the 1643 /// Darwin assembler can deal with. 1644 /// 1645 static AsmPrinter * 1646 createPPCAsmPrinterPass(TargetMachine &tm, 1647 std::unique_ptr<MCStreamer> &&Streamer) { 1648 if (tm.getTargetTriple().isMacOSX()) 1649 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1650 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1651 } 1652 1653 // Force static initialization. 1654 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1655 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1656 createPPCAsmPrinterPass); 1657 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1658 createPPCAsmPrinterPass); 1659 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1660 createPPCAsmPrinterPass); 1661 } 1662