1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCSectionXCOFF.h" 55 #include "llvm/MC/MCStreamer.h" 56 #include "llvm/MC/MCSymbol.h" 57 #include "llvm/MC/MCSymbolELF.h" 58 #include "llvm/MC/MCSymbolXCOFF.h" 59 #include "llvm/MC/SectionKind.h" 60 #include "llvm/Support/Casting.h" 61 #include "llvm/Support/CodeGen.h" 62 #include "llvm/Support/Debug.h" 63 #include "llvm/Support/ErrorHandling.h" 64 #include "llvm/Support/TargetRegistry.h" 65 #include "llvm/Support/raw_ostream.h" 66 #include "llvm/Target/TargetMachine.h" 67 #include <algorithm> 68 #include <cassert> 69 #include <cstdint> 70 #include <memory> 71 #include <new> 72 73 using namespace llvm; 74 75 #define DEBUG_TYPE "asmprinter" 76 77 namespace { 78 79 class PPCAsmPrinter : public AsmPrinter { 80 protected: 81 MapVector<MCSymbol *, MCSymbol *> TOC; 82 const PPCSubtarget *Subtarget; 83 StackMaps SM; 84 85 public: 86 explicit PPCAsmPrinter(TargetMachine &TM, 87 std::unique_ptr<MCStreamer> Streamer) 88 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 89 90 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 91 92 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 93 94 bool doInitialization(Module &M) override { 95 if (!TOC.empty()) 96 TOC.clear(); 97 return AsmPrinter::doInitialization(M); 98 } 99 100 void EmitInstruction(const MachineInstr *MI) override; 101 102 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 103 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 104 /// The \p MI would be INLINEASM ONLY. 105 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 106 107 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 108 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 111 const char *ExtraCode, raw_ostream &O) override; 112 113 void EmitEndOfAsmFile(Module &M) override; 114 115 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 116 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 117 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 118 bool runOnMachineFunction(MachineFunction &MF) override { 119 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 120 bool Changed = AsmPrinter::runOnMachineFunction(MF); 121 emitXRayTable(); 122 return Changed; 123 } 124 }; 125 126 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 127 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 128 public: 129 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 130 std::unique_ptr<MCStreamer> Streamer) 131 : PPCAsmPrinter(TM, std::move(Streamer)) {} 132 133 StringRef getPassName() const override { 134 return "Linux PPC Assembly Printer"; 135 } 136 137 bool doFinalization(Module &M) override; 138 void EmitStartOfAsmFile(Module &M) override; 139 140 void EmitFunctionEntryLabel() override; 141 142 void EmitFunctionBodyStart() override; 143 void EmitFunctionBodyEnd() override; 144 void EmitInstruction(const MachineInstr *MI) override; 145 }; 146 147 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 148 /// OS X 149 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 150 public: 151 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 152 std::unique_ptr<MCStreamer> Streamer) 153 : PPCAsmPrinter(TM, std::move(Streamer)) {} 154 155 StringRef getPassName() const override { 156 return "Darwin PPC Assembly Printer"; 157 } 158 159 bool doFinalization(Module &M) override; 160 void EmitStartOfAsmFile(Module &M) override; 161 }; 162 163 class PPCAIXAsmPrinter : public PPCAsmPrinter { 164 public: 165 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 166 : PPCAsmPrinter(TM, std::move(Streamer)) {} 167 168 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 169 170 void SetupMachineFunction(MachineFunction &MF) override; 171 172 void EmitGlobalVariable(const GlobalVariable *GV) override; 173 174 void EmitFunctionDescriptor() override; 175 176 void EmitEndOfAsmFile(Module &) override; 177 }; 178 179 } // end anonymous namespace 180 181 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 182 raw_ostream &O) { 183 // Computing the address of a global symbol, not calling it. 184 const GlobalValue *GV = MO.getGlobal(); 185 MCSymbol *SymToPrint; 186 187 // External or weakly linked global variables need non-lazily-resolved stubs 188 if (Subtarget->hasLazyResolverStub(GV)) { 189 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 190 MachineModuleInfoImpl::StubValueTy &StubSym = 191 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 192 SymToPrint); 193 if (!StubSym.getPointer()) 194 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 195 !GV->hasInternalLinkage()); 196 } else { 197 SymToPrint = getSymbol(GV); 198 } 199 200 SymToPrint->print(O, MAI); 201 202 printOffset(MO.getOffset(), O); 203 } 204 205 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 206 raw_ostream &O) { 207 const DataLayout &DL = getDataLayout(); 208 const MachineOperand &MO = MI->getOperand(OpNo); 209 210 switch (MO.getType()) { 211 case MachineOperand::MO_Register: { 212 // The MI is INLINEASM ONLY and UseVSXReg is always false. 213 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 214 215 // Linux assembler (Others?) does not take register mnemonics. 216 // FIXME - What about special registers used in mfspr/mtspr? 217 if (!Subtarget->isDarwin()) 218 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 219 O << RegName; 220 return; 221 } 222 case MachineOperand::MO_Immediate: 223 O << MO.getImm(); 224 return; 225 226 case MachineOperand::MO_MachineBasicBlock: 227 MO.getMBB()->getSymbol()->print(O, MAI); 228 return; 229 case MachineOperand::MO_ConstantPoolIndex: 230 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 231 << MO.getIndex(); 232 return; 233 case MachineOperand::MO_BlockAddress: 234 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 235 return; 236 case MachineOperand::MO_GlobalAddress: { 237 PrintSymbolOperand(MO, O); 238 return; 239 } 240 241 default: 242 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 243 return; 244 } 245 } 246 247 /// PrintAsmOperand - Print out an operand for an inline asm expression. 248 /// 249 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 250 const char *ExtraCode, raw_ostream &O) { 251 // Does this asm operand have a single letter operand modifier? 252 if (ExtraCode && ExtraCode[0]) { 253 if (ExtraCode[1] != 0) return true; // Unknown modifier. 254 255 switch (ExtraCode[0]) { 256 default: 257 // See if this is a generic print operand 258 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 259 case 'L': // Write second word of DImode reference. 260 // Verify that this operand has two consecutive registers. 261 if (!MI->getOperand(OpNo).isReg() || 262 OpNo+1 == MI->getNumOperands() || 263 !MI->getOperand(OpNo+1).isReg()) 264 return true; 265 ++OpNo; // Return the high-part. 266 break; 267 case 'I': 268 // Write 'i' if an integer constant, otherwise nothing. Used to print 269 // addi vs add, etc. 270 if (MI->getOperand(OpNo).isImm()) 271 O << "i"; 272 return false; 273 case 'x': 274 if(!MI->getOperand(OpNo).isReg()) 275 return true; 276 // This operand uses VSX numbering. 277 // If the operand is a VMX register, convert it to a VSX register. 278 Register Reg = MI->getOperand(OpNo).getReg(); 279 if (PPCInstrInfo::isVRRegister(Reg)) 280 Reg = PPC::VSX32 + (Reg - PPC::V0); 281 else if (PPCInstrInfo::isVFRegister(Reg)) 282 Reg = PPC::VSX32 + (Reg - PPC::VF0); 283 const char *RegName; 284 RegName = PPCInstPrinter::getRegisterName(Reg); 285 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 286 O << RegName; 287 return false; 288 } 289 } 290 291 printOperand(MI, OpNo, O); 292 return false; 293 } 294 295 // At the moment, all inline asm memory operands are a single register. 296 // In any case, the output of this routine should always be just one 297 // assembler operand. 298 299 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 300 const char *ExtraCode, 301 raw_ostream &O) { 302 if (ExtraCode && ExtraCode[0]) { 303 if (ExtraCode[1] != 0) return true; // Unknown modifier. 304 305 switch (ExtraCode[0]) { 306 default: return true; // Unknown modifier. 307 case 'y': // A memory reference for an X-form instruction 308 { 309 const char *RegName = "r0"; 310 if (!Subtarget->isDarwin()) 311 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 312 O << RegName << ", "; 313 printOperand(MI, OpNo, O); 314 return false; 315 } 316 case 'U': // Print 'u' for update form. 317 case 'X': // Print 'x' for indexed form. 318 { 319 // FIXME: Currently for PowerPC memory operands are always loaded 320 // into a register, so we never get an update or indexed form. 321 // This is bad even for offset forms, since even if we know we 322 // have a value in -16(r1), we will generate a load into r<n> 323 // and then load from 0(r<n>). Until that issue is fixed, 324 // tolerate 'U' and 'X' but don't output anything. 325 assert(MI->getOperand(OpNo).isReg()); 326 return false; 327 } 328 } 329 } 330 331 assert(MI->getOperand(OpNo).isReg()); 332 O << "0("; 333 printOperand(MI, OpNo, O); 334 O << ")"; 335 return false; 336 } 337 338 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 339 /// exists for it. If not, create one. Then return a symbol that references 340 /// the TOC entry. 341 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 342 MCSymbol *&TOCEntry = TOC[Sym]; 343 if (!TOCEntry) 344 TOCEntry = createTempSymbol("C"); 345 return TOCEntry; 346 } 347 348 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 349 emitStackMaps(SM); 350 } 351 352 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 353 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 354 355 SM.recordStackMap(MI); 356 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 357 358 // Scan ahead to trim the shadow. 359 const MachineBasicBlock &MBB = *MI.getParent(); 360 MachineBasicBlock::const_iterator MII(MI); 361 ++MII; 362 while (NumNOPBytes > 0) { 363 if (MII == MBB.end() || MII->isCall() || 364 MII->getOpcode() == PPC::DBG_VALUE || 365 MII->getOpcode() == TargetOpcode::PATCHPOINT || 366 MII->getOpcode() == TargetOpcode::STACKMAP) 367 break; 368 ++MII; 369 NumNOPBytes -= 4; 370 } 371 372 // Emit nops. 373 for (unsigned i = 0; i < NumNOPBytes; i += 4) 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 375 } 376 377 // Lower a patchpoint of the form: 378 // [<def>], <id>, <numBytes>, <target>, <numArgs> 379 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 380 SM.recordPatchPoint(MI); 381 PatchPointOpers Opers(&MI); 382 383 unsigned EncodedBytes = 0; 384 const MachineOperand &CalleeMO = Opers.getCallTarget(); 385 386 if (CalleeMO.isImm()) { 387 int64_t CallTarget = CalleeMO.getImm(); 388 if (CallTarget) { 389 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 390 "High 16 bits of call target should be zero."); 391 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 392 EncodedBytes = 0; 393 // Materialize the jump address: 394 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 395 .addReg(ScratchReg) 396 .addImm((CallTarget >> 32) & 0xFFFF)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 399 .addReg(ScratchReg) 400 .addReg(ScratchReg) 401 .addImm(32).addImm(16)); 402 ++EncodedBytes; 403 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 404 .addReg(ScratchReg) 405 .addReg(ScratchReg) 406 .addImm((CallTarget >> 16) & 0xFFFF)); 407 ++EncodedBytes; 408 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 409 .addReg(ScratchReg) 410 .addReg(ScratchReg) 411 .addImm(CallTarget & 0xFFFF)); 412 413 // Save the current TOC pointer before the remote call. 414 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 415 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 416 .addReg(PPC::X2) 417 .addImm(TOCSaveOffset) 418 .addReg(PPC::X1)); 419 ++EncodedBytes; 420 421 // If we're on ELFv1, then we need to load the actual function pointer 422 // from the function descriptor. 423 if (!Subtarget->isELFv2ABI()) { 424 // Load the new TOC pointer and the function address, but not r11 425 // (needing this is rare, and loading it here would prevent passing it 426 // via a 'nest' parameter. 427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 428 .addReg(PPC::X2) 429 .addImm(8) 430 .addReg(ScratchReg)); 431 ++EncodedBytes; 432 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 433 .addReg(ScratchReg) 434 .addImm(0) 435 .addReg(ScratchReg)); 436 ++EncodedBytes; 437 } 438 439 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 440 .addReg(ScratchReg)); 441 ++EncodedBytes; 442 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 443 ++EncodedBytes; 444 445 // Restore the TOC pointer after the call. 446 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 447 .addReg(PPC::X2) 448 .addImm(TOCSaveOffset) 449 .addReg(PPC::X1)); 450 ++EncodedBytes; 451 } 452 } else if (CalleeMO.isGlobal()) { 453 const GlobalValue *GValue = CalleeMO.getGlobal(); 454 MCSymbol *MOSymbol = getSymbol(GValue); 455 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 456 457 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 458 .addExpr(SymVar)); 459 EncodedBytes += 2; 460 } 461 462 // Each instruction is 4 bytes. 463 EncodedBytes *= 4; 464 465 // Emit padding. 466 unsigned NumBytes = Opers.getNumPatchBytes(); 467 assert(NumBytes >= EncodedBytes && 468 "Patchpoint can't request size less than the length of a call."); 469 assert((NumBytes - EncodedBytes) % 4 == 0 && 470 "Invalid number of NOP bytes requested!"); 471 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 472 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 473 } 474 475 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 476 /// call to __tls_get_addr to the current output stream. 477 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 478 MCSymbolRefExpr::VariantKind VK) { 479 StringRef Name = "__tls_get_addr"; 480 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 481 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 482 const Module *M = MF->getFunction().getParent(); 483 484 assert(MI->getOperand(0).isReg() && 485 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 486 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 487 "GETtls[ld]ADDR[32] must define GPR3"); 488 assert(MI->getOperand(1).isReg() && 489 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 490 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 491 "GETtls[ld]ADDR[32] must read GPR3"); 492 493 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 494 isPositionIndependent()) 495 Kind = MCSymbolRefExpr::VK_PLT; 496 const MCExpr *TlsRef = 497 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 498 499 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 500 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 501 M->getPICLevel() == PICLevel::BigPIC) 502 TlsRef = MCBinaryExpr::createAdd( 503 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 504 const MachineOperand &MO = MI->getOperand(2); 505 const GlobalValue *GValue = MO.getGlobal(); 506 MCSymbol *MOSymbol = getSymbol(GValue); 507 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 508 EmitToStreamer(*OutStreamer, 509 MCInstBuilder(Subtarget->isPPC64() ? 510 PPC::BL8_NOP_TLS : PPC::BL_TLS) 511 .addExpr(TlsRef) 512 .addExpr(SymVar)); 513 } 514 515 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 516 /// the current output stream. 517 /// 518 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 519 MCInst TmpInst; 520 const bool IsDarwin = TM.getTargetTriple().isOSDarwin(); 521 const Module *M = MF->getFunction().getParent(); 522 PICLevel::Level PL = M->getPICLevel(); 523 524 #ifndef NDEBUG 525 // Validate that SPE and FPU are mutually exclusive in codegen 526 if (!MI->isInlineAsm()) { 527 for (const MachineOperand &MO: MI->operands()) { 528 if (MO.isReg()) { 529 Register Reg = MO.getReg(); 530 if (Subtarget->hasSPE()) { 531 if (PPC::F4RCRegClass.contains(Reg) || 532 PPC::F8RCRegClass.contains(Reg) || 533 PPC::QBRCRegClass.contains(Reg) || 534 PPC::QFRCRegClass.contains(Reg) || 535 PPC::QSRCRegClass.contains(Reg) || 536 PPC::VFRCRegClass.contains(Reg) || 537 PPC::VRRCRegClass.contains(Reg) || 538 PPC::VSFRCRegClass.contains(Reg) || 539 PPC::VSSRCRegClass.contains(Reg) 540 ) 541 llvm_unreachable("SPE targets cannot have FPRegs!"); 542 } else { 543 if (PPC::SPERCRegClass.contains(Reg)) 544 llvm_unreachable("SPE register found in FPU-targeted code!"); 545 } 546 } 547 } 548 } 549 #endif 550 // Lower multi-instruction pseudo operations. 551 switch (MI->getOpcode()) { 552 default: break; 553 case TargetOpcode::DBG_VALUE: 554 llvm_unreachable("Should be handled target independently"); 555 case TargetOpcode::STACKMAP: 556 return LowerSTACKMAP(SM, *MI); 557 case TargetOpcode::PATCHPOINT: 558 return LowerPATCHPOINT(SM, *MI); 559 560 case PPC::MoveGOTtoLR: { 561 // Transform %lr = MoveGOTtoLR 562 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 563 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 564 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 565 // blrl 566 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 567 MCSymbol *GOTSymbol = 568 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 569 const MCExpr *OffsExpr = 570 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 571 MCSymbolRefExpr::VK_PPC_LOCAL, 572 OutContext), 573 MCConstantExpr::create(4, OutContext), 574 OutContext); 575 576 // Emit the 'bl'. 577 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 578 return; 579 } 580 case PPC::MovePCtoLR: 581 case PPC::MovePCtoLR8: { 582 // Transform %lr = MovePCtoLR 583 // Into this, where the label is the PIC base: 584 // bl L1$pb 585 // L1$pb: 586 MCSymbol *PICBase = MF->getPICBaseSymbol(); 587 588 // Emit the 'bl'. 589 EmitToStreamer(*OutStreamer, 590 MCInstBuilder(PPC::BL) 591 // FIXME: We would like an efficient form for this, so we 592 // don't have to do a lot of extra uniquing. 593 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 594 595 // Emit the label. 596 OutStreamer->EmitLabel(PICBase); 597 return; 598 } 599 case PPC::UpdateGBR: { 600 // Transform %rd = UpdateGBR(%rt, %ri) 601 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 602 // add %rd, %rt, %ri 603 // or into (if secure plt mode is on): 604 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 605 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 606 // Get the offset from the GOT Base Register to the GOT 607 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 608 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 609 unsigned PICR = TmpInst.getOperand(0).getReg(); 610 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 611 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 612 : ".LTOC"); 613 const MCExpr *PB = 614 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 615 616 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 617 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 618 619 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 620 EmitToStreamer( 621 *OutStreamer, 622 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 623 624 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 625 EmitToStreamer( 626 *OutStreamer, 627 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 628 return; 629 } else { 630 MCSymbol *PICOffset = 631 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 632 TmpInst.setOpcode(PPC::LWZ); 633 const MCExpr *Exp = 634 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 635 const MCExpr *PB = 636 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 637 MCSymbolRefExpr::VK_None, 638 OutContext); 639 const MCOperand TR = TmpInst.getOperand(1); 640 const MCOperand PICR = TmpInst.getOperand(0); 641 642 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 643 TmpInst.getOperand(1) = 644 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 645 TmpInst.getOperand(0) = TR; 646 TmpInst.getOperand(2) = PICR; 647 EmitToStreamer(*OutStreamer, TmpInst); 648 649 TmpInst.setOpcode(PPC::ADD4); 650 TmpInst.getOperand(0) = PICR; 651 TmpInst.getOperand(1) = TR; 652 TmpInst.getOperand(2) = PICR; 653 EmitToStreamer(*OutStreamer, TmpInst); 654 return; 655 } 656 } 657 case PPC::LWZtoc: { 658 assert(!IsDarwin && "TOC is an ELF/XCOFF construct."); 659 660 // Transform %rN = LWZtoc @op1, %r2 661 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 662 663 // Change the opcode to LWZ. 664 TmpInst.setOpcode(PPC::LWZ); 665 666 const MachineOperand &MO = MI->getOperand(1); 667 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 668 "Unexpected operand type for LWZtoc pseudo."); 669 670 // Map the operand to its corresponding MCSymbol. 671 MCSymbol *MOSymbol = nullptr; 672 if (MO.isGlobal()) 673 MOSymbol = getSymbol(MO.getGlobal()); 674 else if (MO.isCPI()) 675 MOSymbol = GetCPISymbol(MO.getIndex()); 676 else if (MO.isJTI()) 677 MOSymbol = GetJTISymbol(MO.getIndex()); 678 else if (MO.isBlockAddress()) 679 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 680 681 const bool IsAIX = TM.getTargetTriple().isOSAIX(); 682 683 // Create a reference to the GOT entry for the symbol. The GOT entry will be 684 // synthesized later. 685 if (PL == PICLevel::SmallPIC && !IsAIX) { 686 const MCExpr *Exp = 687 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 688 OutContext); 689 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 690 EmitToStreamer(*OutStreamer, TmpInst); 691 return; 692 } 693 694 // Otherwise use the TOC. 'TOCEntry' is a label used to reference the 695 // storage allocated in the TOC which contains the address of 696 // 'MOSymbol'. Said TOC entry will be synthesized later. 697 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 698 const MCExpr *Exp = 699 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 700 701 // AIX uses the label directly as the lwz displacement operand for 702 // references into the toc section. The displacement value will be generated 703 // relative to the toc-base. 704 if (IsAIX) { 705 assert( 706 TM.getCodeModel() == CodeModel::Small && 707 "This pseudo should only be selected for 32-bit small code model."); 708 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 709 EmitToStreamer(*OutStreamer, TmpInst); 710 return; 711 } 712 713 // Create an explicit subtract expression between the local symbol and 714 // '.LTOC' to manifest the toc-relative offset. 715 const MCExpr *PB = MCSymbolRefExpr::create( 716 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 717 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 718 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 719 EmitToStreamer(*OutStreamer, TmpInst); 720 return; 721 } 722 case PPC::LDtocJTI: 723 case PPC::LDtocCPT: 724 case PPC::LDtocBA: 725 case PPC::LDtoc: { 726 // Transform %x3 = LDtoc @min1, %x2 727 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 728 729 // Change the opcode to LD, and the global address operand to be a 730 // reference to the TOC entry we will synthesize later. 731 TmpInst.setOpcode(PPC::LD); 732 const MachineOperand &MO = MI->getOperand(1); 733 734 // Map symbol -> label of TOC entry 735 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 736 MCSymbol *MOSymbol = nullptr; 737 if (MO.isGlobal()) 738 MOSymbol = getSymbol(MO.getGlobal()); 739 else if (MO.isCPI()) 740 MOSymbol = GetCPISymbol(MO.getIndex()); 741 else if (MO.isJTI()) 742 MOSymbol = GetJTISymbol(MO.getIndex()); 743 else if (MO.isBlockAddress()) 744 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 745 746 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 747 748 const MCExpr *Exp = 749 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 750 OutContext); 751 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 752 EmitToStreamer(*OutStreamer, TmpInst); 753 return; 754 } 755 756 case PPC::ADDIStocHA8: { 757 // Transform %xd = ADDIStocHA8 %x2, @sym 758 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 759 760 // Change the opcode to ADDIS8. If the global address is external, has 761 // common linkage, is a non-local function address, or is a jump table 762 // address, then generate a TOC entry and reference that. Otherwise 763 // reference the symbol directly. 764 TmpInst.setOpcode(PPC::ADDIS8); 765 const MachineOperand &MO = MI->getOperand(2); 766 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 767 MO.isBlockAddress()) && 768 "Invalid operand for ADDIStocHA8!"); 769 MCSymbol *MOSymbol = nullptr; 770 bool GlobalToc = false; 771 772 if (MO.isGlobal()) { 773 const GlobalValue *GV = MO.getGlobal(); 774 MOSymbol = getSymbol(GV); 775 GlobalToc = Subtarget->isGVIndirectSymbol(GV); 776 } else if (MO.isCPI()) { 777 MOSymbol = GetCPISymbol(MO.getIndex()); 778 } else if (MO.isJTI()) { 779 MOSymbol = GetJTISymbol(MO.getIndex()); 780 } else if (MO.isBlockAddress()) { 781 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 782 } 783 784 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 785 TM.getCodeModel() == CodeModel::Large) 786 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 787 788 const MCExpr *Exp = 789 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 790 OutContext); 791 792 if (!MO.isJTI() && MO.getOffset()) 793 Exp = MCBinaryExpr::createAdd(Exp, 794 MCConstantExpr::create(MO.getOffset(), 795 OutContext), 796 OutContext); 797 798 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 799 EmitToStreamer(*OutStreamer, TmpInst); 800 return; 801 } 802 case PPC::LDtocL: { 803 // Transform %xd = LDtocL @sym, %xs 804 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 805 806 // Change the opcode to LD. If the global address is external, has 807 // common linkage, or is a jump table address, then reference the 808 // associated TOC entry. Otherwise reference the symbol directly. 809 TmpInst.setOpcode(PPC::LD); 810 const MachineOperand &MO = MI->getOperand(1); 811 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 812 MO.isBlockAddress()) && 813 "Invalid operand for LDtocL!"); 814 MCSymbol *MOSymbol = nullptr; 815 816 if (MO.isJTI()) 817 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 818 else if (MO.isBlockAddress()) { 819 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 820 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 821 } 822 else if (MO.isCPI()) { 823 MOSymbol = GetCPISymbol(MO.getIndex()); 824 if (TM.getCodeModel() == CodeModel::Large) 825 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 826 } 827 else if (MO.isGlobal()) { 828 const GlobalValue *GV = MO.getGlobal(); 829 MOSymbol = getSymbol(GV); 830 LLVM_DEBUG( 831 assert((Subtarget->isGVIndirectSymbol(GV)) && 832 "LDtocL used on symbol that could be accessed directly is " 833 "invalid. Must match ADDIStocHA8.")); 834 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 835 } 836 837 const MCExpr *Exp = 838 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 839 OutContext); 840 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 841 EmitToStreamer(*OutStreamer, TmpInst); 842 return; 843 } 844 case PPC::ADDItocL: { 845 // Transform %xd = ADDItocL %xs, @sym 846 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 847 848 // Change the opcode to ADDI8. If the global address is external, then 849 // generate a TOC entry and reference that. Otherwise reference the 850 // symbol directly. 851 TmpInst.setOpcode(PPC::ADDI8); 852 const MachineOperand &MO = MI->getOperand(2); 853 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 854 MCSymbol *MOSymbol = nullptr; 855 856 if (MO.isGlobal()) { 857 const GlobalValue *GV = MO.getGlobal(); 858 LLVM_DEBUG(assert(!(Subtarget->isGVIndirectSymbol(GV)) && 859 "Interposable definitions must use indirect access.")); 860 MOSymbol = getSymbol(GV); 861 } else if (MO.isCPI()) { 862 MOSymbol = GetCPISymbol(MO.getIndex()); 863 } 864 865 const MCExpr *Exp = 866 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 867 OutContext); 868 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 869 EmitToStreamer(*OutStreamer, TmpInst); 870 return; 871 } 872 case PPC::ADDISgotTprelHA: { 873 // Transform: %xd = ADDISgotTprelHA %x2, @sym 874 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 875 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 876 const MachineOperand &MO = MI->getOperand(2); 877 const GlobalValue *GValue = MO.getGlobal(); 878 MCSymbol *MOSymbol = getSymbol(GValue); 879 const MCExpr *SymGotTprel = 880 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 881 OutContext); 882 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 883 .addReg(MI->getOperand(0).getReg()) 884 .addReg(MI->getOperand(1).getReg()) 885 .addExpr(SymGotTprel)); 886 return; 887 } 888 case PPC::LDgotTprelL: 889 case PPC::LDgotTprelL32: { 890 // Transform %xd = LDgotTprelL @sym, %xs 891 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 892 893 // Change the opcode to LD. 894 TmpInst.setOpcode(Subtarget->isPPC64() ? PPC::LD : PPC::LWZ); 895 const MachineOperand &MO = MI->getOperand(1); 896 const GlobalValue *GValue = MO.getGlobal(); 897 MCSymbol *MOSymbol = getSymbol(GValue); 898 const MCExpr *Exp = MCSymbolRefExpr::create( 899 MOSymbol, 900 Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 901 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 902 OutContext); 903 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 904 EmitToStreamer(*OutStreamer, TmpInst); 905 return; 906 } 907 908 case PPC::PPC32PICGOT: { 909 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 910 MCSymbol *GOTRef = OutContext.createTempSymbol(); 911 MCSymbol *NextInstr = OutContext.createTempSymbol(); 912 913 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 914 // FIXME: We would like an efficient form for this, so we don't have to do 915 // a lot of extra uniquing. 916 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 917 const MCExpr *OffsExpr = 918 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 919 MCSymbolRefExpr::create(GOTRef, OutContext), 920 OutContext); 921 OutStreamer->EmitLabel(GOTRef); 922 OutStreamer->EmitValue(OffsExpr, 4); 923 OutStreamer->EmitLabel(NextInstr); 924 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 925 .addReg(MI->getOperand(0).getReg())); 926 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 927 .addReg(MI->getOperand(1).getReg()) 928 .addImm(0) 929 .addReg(MI->getOperand(0).getReg())); 930 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 931 .addReg(MI->getOperand(0).getReg()) 932 .addReg(MI->getOperand(1).getReg()) 933 .addReg(MI->getOperand(0).getReg())); 934 return; 935 } 936 case PPC::PPC32GOT: { 937 MCSymbol *GOTSymbol = 938 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 939 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 940 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 941 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 942 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 943 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 944 .addReg(MI->getOperand(0).getReg()) 945 .addExpr(SymGotTlsL)); 946 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 947 .addReg(MI->getOperand(0).getReg()) 948 .addReg(MI->getOperand(0).getReg()) 949 .addExpr(SymGotTlsHA)); 950 return; 951 } 952 case PPC::ADDIStlsgdHA: { 953 // Transform: %xd = ADDIStlsgdHA %x2, @sym 954 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 955 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 956 const MachineOperand &MO = MI->getOperand(2); 957 const GlobalValue *GValue = MO.getGlobal(); 958 MCSymbol *MOSymbol = getSymbol(GValue); 959 const MCExpr *SymGotTlsGD = 960 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 961 OutContext); 962 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 963 .addReg(MI->getOperand(0).getReg()) 964 .addReg(MI->getOperand(1).getReg()) 965 .addExpr(SymGotTlsGD)); 966 return; 967 } 968 case PPC::ADDItlsgdL: 969 // Transform: %xd = ADDItlsgdL %xs, @sym 970 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 971 case PPC::ADDItlsgdL32: { 972 // Transform: %rd = ADDItlsgdL32 %rs, @sym 973 // Into: %rd = ADDI %rs, sym@got@tlsgd 974 const MachineOperand &MO = MI->getOperand(2); 975 const GlobalValue *GValue = MO.getGlobal(); 976 MCSymbol *MOSymbol = getSymbol(GValue); 977 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 978 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 979 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 980 OutContext); 981 EmitToStreamer(*OutStreamer, 982 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 983 .addReg(MI->getOperand(0).getReg()) 984 .addReg(MI->getOperand(1).getReg()) 985 .addExpr(SymGotTlsGD)); 986 return; 987 } 988 case PPC::GETtlsADDR: 989 // Transform: %x3 = GETtlsADDR %x3, @sym 990 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 991 case PPC::GETtlsADDR32: { 992 // Transform: %r3 = GETtlsADDR32 %r3, @sym 993 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 994 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 995 return; 996 } 997 case PPC::ADDIStlsldHA: { 998 // Transform: %xd = ADDIStlsldHA %x2, @sym 999 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 1000 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 1001 const MachineOperand &MO = MI->getOperand(2); 1002 const GlobalValue *GValue = MO.getGlobal(); 1003 MCSymbol *MOSymbol = getSymbol(GValue); 1004 const MCExpr *SymGotTlsLD = 1005 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 1006 OutContext); 1007 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1008 .addReg(MI->getOperand(0).getReg()) 1009 .addReg(MI->getOperand(1).getReg()) 1010 .addExpr(SymGotTlsLD)); 1011 return; 1012 } 1013 case PPC::ADDItlsldL: 1014 // Transform: %xd = ADDItlsldL %xs, @sym 1015 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 1016 case PPC::ADDItlsldL32: { 1017 // Transform: %rd = ADDItlsldL32 %rs, @sym 1018 // Into: %rd = ADDI %rs, sym@got@tlsld 1019 const MachineOperand &MO = MI->getOperand(2); 1020 const GlobalValue *GValue = MO.getGlobal(); 1021 MCSymbol *MOSymbol = getSymbol(GValue); 1022 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1023 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1024 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1025 OutContext); 1026 EmitToStreamer(*OutStreamer, 1027 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1028 .addReg(MI->getOperand(0).getReg()) 1029 .addReg(MI->getOperand(1).getReg()) 1030 .addExpr(SymGotTlsLD)); 1031 return; 1032 } 1033 case PPC::GETtlsldADDR: 1034 // Transform: %x3 = GETtlsldADDR %x3, @sym 1035 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1036 case PPC::GETtlsldADDR32: { 1037 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1038 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1039 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1040 return; 1041 } 1042 case PPC::ADDISdtprelHA: 1043 // Transform: %xd = ADDISdtprelHA %xs, @sym 1044 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1045 case PPC::ADDISdtprelHA32: { 1046 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1047 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1048 const MachineOperand &MO = MI->getOperand(2); 1049 const GlobalValue *GValue = MO.getGlobal(); 1050 MCSymbol *MOSymbol = getSymbol(GValue); 1051 const MCExpr *SymDtprel = 1052 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1053 OutContext); 1054 EmitToStreamer( 1055 *OutStreamer, 1056 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1057 .addReg(MI->getOperand(0).getReg()) 1058 .addReg(MI->getOperand(1).getReg()) 1059 .addExpr(SymDtprel)); 1060 return; 1061 } 1062 case PPC::ADDIdtprelL: 1063 // Transform: %xd = ADDIdtprelL %xs, @sym 1064 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1065 case PPC::ADDIdtprelL32: { 1066 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1067 // Into: %rd = ADDI %rs, sym@dtprel@l 1068 const MachineOperand &MO = MI->getOperand(2); 1069 const GlobalValue *GValue = MO.getGlobal(); 1070 MCSymbol *MOSymbol = getSymbol(GValue); 1071 const MCExpr *SymDtprel = 1072 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1073 OutContext); 1074 EmitToStreamer(*OutStreamer, 1075 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1076 .addReg(MI->getOperand(0).getReg()) 1077 .addReg(MI->getOperand(1).getReg()) 1078 .addExpr(SymDtprel)); 1079 return; 1080 } 1081 case PPC::MFOCRF: 1082 case PPC::MFOCRF8: 1083 if (!Subtarget->hasMFOCRF()) { 1084 // Transform: %r3 = MFOCRF %cr7 1085 // Into: %r3 = MFCR ;; cr7 1086 unsigned NewOpcode = 1087 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1088 OutStreamer->AddComment(PPCInstPrinter:: 1089 getRegisterName(MI->getOperand(1).getReg())); 1090 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1091 .addReg(MI->getOperand(0).getReg())); 1092 return; 1093 } 1094 break; 1095 case PPC::MTOCRF: 1096 case PPC::MTOCRF8: 1097 if (!Subtarget->hasMFOCRF()) { 1098 // Transform: %cr7 = MTOCRF %r3 1099 // Into: MTCRF mask, %r3 ;; cr7 1100 unsigned NewOpcode = 1101 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1102 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1103 ->getEncodingValue(MI->getOperand(0).getReg()); 1104 OutStreamer->AddComment(PPCInstPrinter:: 1105 getRegisterName(MI->getOperand(0).getReg())); 1106 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1107 .addImm(Mask) 1108 .addReg(MI->getOperand(1).getReg())); 1109 return; 1110 } 1111 break; 1112 case PPC::LD: 1113 case PPC::STD: 1114 case PPC::LWA_32: 1115 case PPC::LWA: { 1116 // Verify alignment is legal, so we don't create relocations 1117 // that can't be supported. 1118 // FIXME: This test is currently disabled for Darwin. The test 1119 // suite shows a handful of test cases that fail this check for 1120 // Darwin. Those need to be investigated before this sanity test 1121 // can be enabled for those subtargets. 1122 if (!Subtarget->isDarwin()) { 1123 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1124 const MachineOperand &MO = MI->getOperand(OpNum); 1125 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1126 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1127 } 1128 // Now process the instruction normally. 1129 break; 1130 } 1131 } 1132 1133 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 1134 EmitToStreamer(*OutStreamer, TmpInst); 1135 } 1136 1137 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1138 if (!Subtarget->isPPC64()) 1139 return PPCAsmPrinter::EmitInstruction(MI); 1140 1141 switch (MI->getOpcode()) { 1142 default: 1143 return PPCAsmPrinter::EmitInstruction(MI); 1144 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1145 // .begin: 1146 // b .end # lis 0, FuncId[16..32] 1147 // nop # li 0, FuncId[0..15] 1148 // std 0, -8(1) 1149 // mflr 0 1150 // bl __xray_FunctionEntry 1151 // mtlr 0 1152 // .end: 1153 // 1154 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1155 // of instructions change. 1156 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1157 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1158 OutStreamer->EmitLabel(BeginOfSled); 1159 EmitToStreamer(*OutStreamer, 1160 MCInstBuilder(PPC::B).addExpr( 1161 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1162 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1163 EmitToStreamer( 1164 *OutStreamer, 1165 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1166 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1167 EmitToStreamer(*OutStreamer, 1168 MCInstBuilder(PPC::BL8_NOP) 1169 .addExpr(MCSymbolRefExpr::create( 1170 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1171 OutContext))); 1172 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1173 OutStreamer->EmitLabel(EndOfSled); 1174 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1175 break; 1176 } 1177 case TargetOpcode::PATCHABLE_RET: { 1178 unsigned RetOpcode = MI->getOperand(0).getImm(); 1179 MCInst RetInst; 1180 RetInst.setOpcode(RetOpcode); 1181 for (const auto &MO : 1182 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1183 MCOperand MCOp; 1184 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1185 RetInst.addOperand(MCOp); 1186 } 1187 1188 bool IsConditional; 1189 if (RetOpcode == PPC::BCCLR) { 1190 IsConditional = true; 1191 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1192 RetOpcode == PPC::TCRETURNai8) { 1193 break; 1194 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1195 IsConditional = false; 1196 } else { 1197 EmitToStreamer(*OutStreamer, RetInst); 1198 break; 1199 } 1200 1201 MCSymbol *FallthroughLabel; 1202 if (IsConditional) { 1203 // Before: 1204 // bgtlr cr0 1205 // 1206 // After: 1207 // ble cr0, .end 1208 // .p2align 3 1209 // .begin: 1210 // blr # lis 0, FuncId[16..32] 1211 // nop # li 0, FuncId[0..15] 1212 // std 0, -8(1) 1213 // mflr 0 1214 // bl __xray_FunctionExit 1215 // mtlr 0 1216 // blr 1217 // .end: 1218 // 1219 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1220 // of instructions change. 1221 FallthroughLabel = OutContext.createTempSymbol(); 1222 EmitToStreamer( 1223 *OutStreamer, 1224 MCInstBuilder(PPC::BCC) 1225 .addImm(PPC::InvertPredicate( 1226 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1227 .addReg(MI->getOperand(2).getReg()) 1228 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1229 RetInst = MCInst(); 1230 RetInst.setOpcode(PPC::BLR8); 1231 } 1232 // .p2align 3 1233 // .begin: 1234 // b(lr)? # lis 0, FuncId[16..32] 1235 // nop # li 0, FuncId[0..15] 1236 // std 0, -8(1) 1237 // mflr 0 1238 // bl __xray_FunctionExit 1239 // mtlr 0 1240 // b(lr)? 1241 // 1242 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1243 // of instructions change. 1244 OutStreamer->EmitCodeAlignment(8); 1245 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1246 OutStreamer->EmitLabel(BeginOfSled); 1247 EmitToStreamer(*OutStreamer, RetInst); 1248 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1249 EmitToStreamer( 1250 *OutStreamer, 1251 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1252 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1253 EmitToStreamer(*OutStreamer, 1254 MCInstBuilder(PPC::BL8_NOP) 1255 .addExpr(MCSymbolRefExpr::create( 1256 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1257 OutContext))); 1258 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1259 EmitToStreamer(*OutStreamer, RetInst); 1260 if (IsConditional) 1261 OutStreamer->EmitLabel(FallthroughLabel); 1262 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1263 break; 1264 } 1265 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1266 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1267 case TargetOpcode::PATCHABLE_TAIL_CALL: 1268 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1269 // normal function exit from a tail exit. 1270 llvm_unreachable("Tail call is handled in the normal case. See comments " 1271 "around this assert."); 1272 } 1273 } 1274 1275 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1276 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1277 PPCTargetStreamer *TS = 1278 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1279 1280 if (TS) 1281 TS->emitAbiVersion(2); 1282 } 1283 1284 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1285 !isPositionIndependent()) 1286 return AsmPrinter::EmitStartOfAsmFile(M); 1287 1288 if (M.getPICLevel() == PICLevel::SmallPIC) 1289 return AsmPrinter::EmitStartOfAsmFile(M); 1290 1291 OutStreamer->SwitchSection(OutContext.getELFSection( 1292 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1293 1294 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1295 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1296 1297 OutStreamer->EmitLabel(CurrentPos); 1298 1299 // The GOT pointer points to the middle of the GOT, in order to reference the 1300 // entire 64kB range. 0x8000 is the midpoint. 1301 const MCExpr *tocExpr = 1302 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1303 MCConstantExpr::create(0x8000, OutContext), 1304 OutContext); 1305 1306 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1307 1308 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1309 } 1310 1311 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1312 // linux/ppc32 - Normal entry label. 1313 if (!Subtarget->isPPC64() && 1314 (!isPositionIndependent() || 1315 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1316 return AsmPrinter::EmitFunctionEntryLabel(); 1317 1318 if (!Subtarget->isPPC64()) { 1319 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1320 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1321 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1322 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1323 OutStreamer->EmitLabel(RelocSymbol); 1324 1325 const MCExpr *OffsExpr = 1326 MCBinaryExpr::createSub( 1327 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1328 OutContext), 1329 MCSymbolRefExpr::create(PICBase, OutContext), 1330 OutContext); 1331 OutStreamer->EmitValue(OffsExpr, 4); 1332 OutStreamer->EmitLabel(CurrentFnSym); 1333 return; 1334 } else 1335 return AsmPrinter::EmitFunctionEntryLabel(); 1336 } 1337 1338 // ELFv2 ABI - Normal entry label. 1339 if (Subtarget->isELFv2ABI()) { 1340 // In the Large code model, we allow arbitrary displacements between 1341 // the text section and its associated TOC section. We place the 1342 // full 8-byte offset to the TOC in memory immediately preceding 1343 // the function global entry point. 1344 if (TM.getCodeModel() == CodeModel::Large 1345 && !MF->getRegInfo().use_empty(PPC::X2)) { 1346 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1347 1348 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1349 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1350 const MCExpr *TOCDeltaExpr = 1351 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1352 MCSymbolRefExpr::create(GlobalEPSymbol, 1353 OutContext), 1354 OutContext); 1355 1356 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1357 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1358 } 1359 return AsmPrinter::EmitFunctionEntryLabel(); 1360 } 1361 1362 // Emit an official procedure descriptor. 1363 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1364 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1365 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1366 OutStreamer->SwitchSection(Section); 1367 OutStreamer->EmitLabel(CurrentFnSym); 1368 OutStreamer->EmitValueToAlignment(8); 1369 MCSymbol *Symbol1 = CurrentFnSymForSize; 1370 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1371 // entry point. 1372 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1373 8 /*size*/); 1374 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1375 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1376 OutStreamer->EmitValue( 1377 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1378 8/*size*/); 1379 // Emit a null environment pointer. 1380 OutStreamer->EmitIntValue(0, 8 /* size */); 1381 OutStreamer->SwitchSection(Current.first, Current.second); 1382 } 1383 1384 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1385 const DataLayout &DL = getDataLayout(); 1386 1387 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1388 1389 PPCTargetStreamer &TS = 1390 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1391 1392 if (!TOC.empty()) { 1393 MCSectionELF *Section; 1394 1395 if (isPPC64) 1396 Section = OutStreamer->getContext().getELFSection( 1397 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1398 else 1399 Section = OutStreamer->getContext().getELFSection( 1400 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1401 OutStreamer->SwitchSection(Section); 1402 1403 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1404 E = TOC.end(); I != E; ++I) { 1405 OutStreamer->EmitLabel(I->second); 1406 MCSymbol *S = I->first; 1407 if (isPPC64) { 1408 TS.emitTCEntry(*S); 1409 } else { 1410 OutStreamer->EmitValueToAlignment(4); 1411 OutStreamer->EmitSymbolValue(S, 4); 1412 } 1413 } 1414 } 1415 1416 return AsmPrinter::doFinalization(M); 1417 } 1418 1419 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1420 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1421 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1422 // provide two entry points. The ABI guarantees that when calling the 1423 // local entry point, r2 is set up by the caller to contain the TOC base 1424 // for this function, and when calling the global entry point, r12 is set 1425 // up by the caller to hold the address of the global entry point. We 1426 // thus emit a prefix sequence along the following lines: 1427 // 1428 // func: 1429 // .Lfunc_gepNN: 1430 // # global entry point 1431 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1432 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1433 // .Lfunc_lepNN: 1434 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1435 // # local entry point, followed by function body 1436 // 1437 // For the Large code model, we create 1438 // 1439 // .Lfunc_tocNN: 1440 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1441 // func: 1442 // .Lfunc_gepNN: 1443 // # global entry point 1444 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1445 // add r2,r2,r12 1446 // .Lfunc_lepNN: 1447 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1448 // # local entry point, followed by function body 1449 // 1450 // This ensures we have r2 set up correctly while executing the function 1451 // body, no matter which entry point is called. 1452 if (Subtarget->isELFv2ABI() 1453 // Only do all that if the function uses r2 in the first place. 1454 && !MF->getRegInfo().use_empty(PPC::X2)) { 1455 // Note: The logic here must be synchronized with the code in the 1456 // branch-selection pass which sets the offset of the first block in the 1457 // function. This matters because it affects the alignment. 1458 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1459 1460 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1461 OutStreamer->EmitLabel(GlobalEntryLabel); 1462 const MCSymbolRefExpr *GlobalEntryLabelExp = 1463 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1464 1465 if (TM.getCodeModel() != CodeModel::Large) { 1466 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1467 const MCExpr *TOCDeltaExpr = 1468 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1469 GlobalEntryLabelExp, OutContext); 1470 1471 const MCExpr *TOCDeltaHi = 1472 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1473 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1474 .addReg(PPC::X2) 1475 .addReg(PPC::X12) 1476 .addExpr(TOCDeltaHi)); 1477 1478 const MCExpr *TOCDeltaLo = 1479 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1480 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1481 .addReg(PPC::X2) 1482 .addReg(PPC::X2) 1483 .addExpr(TOCDeltaLo)); 1484 } else { 1485 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1486 const MCExpr *TOCOffsetDeltaExpr = 1487 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1488 GlobalEntryLabelExp, OutContext); 1489 1490 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1491 .addReg(PPC::X2) 1492 .addExpr(TOCOffsetDeltaExpr) 1493 .addReg(PPC::X12)); 1494 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1495 .addReg(PPC::X2) 1496 .addReg(PPC::X2) 1497 .addReg(PPC::X12)); 1498 } 1499 1500 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1501 OutStreamer->EmitLabel(LocalEntryLabel); 1502 const MCSymbolRefExpr *LocalEntryLabelExp = 1503 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1504 const MCExpr *LocalOffsetExp = 1505 MCBinaryExpr::createSub(LocalEntryLabelExp, 1506 GlobalEntryLabelExp, OutContext); 1507 1508 PPCTargetStreamer *TS = 1509 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1510 1511 if (TS) 1512 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1513 } 1514 } 1515 1516 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1517 /// directive. 1518 /// 1519 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1520 // Only the 64-bit target requires a traceback table. For now, 1521 // we only emit the word of zeroes that GDB requires to find 1522 // the end of the function, and zeroes for the eight-byte 1523 // mandatory fields. 1524 // FIXME: We should fill in the eight-byte mandatory fields as described in 1525 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1526 // currently make use of these fields). 1527 if (Subtarget->isPPC64()) { 1528 OutStreamer->EmitIntValue(0, 4/*size*/); 1529 OutStreamer->EmitIntValue(0, 8/*size*/); 1530 } 1531 } 1532 1533 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1534 static const char *const CPUDirectives[] = { 1535 "", 1536 "ppc", 1537 "ppc440", 1538 "ppc601", 1539 "ppc602", 1540 "ppc603", 1541 "ppc7400", 1542 "ppc750", 1543 "ppc970", 1544 "ppcA2", 1545 "ppce500", 1546 "ppce500mc", 1547 "ppce5500", 1548 "power3", 1549 "power4", 1550 "power5", 1551 "power5x", 1552 "power6", 1553 "power6x", 1554 "power7", 1555 // FIXME: why is power8 missing here? 1556 "ppc64", 1557 "ppc64le", 1558 "power9" 1559 }; 1560 1561 // Get the numerically largest directive. 1562 // FIXME: How should we merge darwin directives? 1563 unsigned Directive = PPC::DIR_NONE; 1564 for (const Function &F : M) { 1565 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1566 unsigned FDir = STI.getDarwinDirective(); 1567 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1568 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1569 Directive = PPC::DIR_970; 1570 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1571 Directive = PPC::DIR_7400; 1572 if (STI.isPPC64() && Directive < PPC::DIR_64) 1573 Directive = PPC::DIR_64; 1574 } 1575 1576 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1577 1578 assert(Directive < array_lengthof(CPUDirectives) && 1579 "CPUDirectives[] might not be up-to-date!"); 1580 PPCTargetStreamer &TStreamer = 1581 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1582 TStreamer.emitMachine(CPUDirectives[Directive]); 1583 1584 // Prime text sections so they are adjacent. This reduces the likelihood a 1585 // large data or debug section causes a branch to exceed 16M limit. 1586 const TargetLoweringObjectFileMachO &TLOFMacho = 1587 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1588 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1589 if (TM.getRelocationModel() == Reloc::PIC_) { 1590 OutStreamer->SwitchSection( 1591 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1592 MachO::S_SYMBOL_STUBS | 1593 MachO::S_ATTR_PURE_INSTRUCTIONS, 1594 32, SectionKind::getText())); 1595 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1596 OutStreamer->SwitchSection( 1597 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1598 MachO::S_SYMBOL_STUBS | 1599 MachO::S_ATTR_PURE_INSTRUCTIONS, 1600 16, SectionKind::getText())); 1601 } 1602 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1603 } 1604 1605 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1606 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1607 1608 // Darwin/PPC always uses mach-o. 1609 const TargetLoweringObjectFileMachO &TLOFMacho = 1610 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1611 if (MMI) { 1612 MachineModuleInfoMachO &MMIMacho = 1613 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1614 1615 if (MAI->doesSupportExceptionHandling()) { 1616 // Add the (possibly multiple) personalities to the set of global values. 1617 // Only referenced functions get into the Personalities list. 1618 for (const Function *Personality : MMI->getPersonalities()) { 1619 if (Personality) { 1620 MCSymbol *NLPSym = 1621 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1622 MachineModuleInfoImpl::StubValueTy &StubSym = 1623 MMIMacho.getGVStubEntry(NLPSym); 1624 StubSym = 1625 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1626 } 1627 } 1628 } 1629 1630 // Output stubs for dynamically-linked functions. 1631 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1632 1633 // Output macho stubs for external and common global variables. 1634 if (!Stubs.empty()) { 1635 // Switch with ".non_lazy_symbol_pointer" directive. 1636 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1637 EmitAlignment(isPPC64 ? Align(8) : Align(4)); 1638 1639 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1640 // L_foo$stub: 1641 OutStreamer->EmitLabel(Stubs[i].first); 1642 // .indirect_symbol _foo 1643 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1644 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1645 MCSA_IndirectSymbol); 1646 1647 if (MCSym.getInt()) 1648 // External to current translation unit. 1649 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1650 else 1651 // Internal to current translation unit. 1652 // 1653 // When we place the LSDA into the TEXT section, the type info 1654 // pointers 1655 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1656 // However, sometimes the types are local to the file. So we need to 1657 // fill in the value for the NLP in those cases. 1658 OutStreamer->EmitValue( 1659 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1660 isPPC64 ? 8 : 4 /*size*/); 1661 } 1662 1663 Stubs.clear(); 1664 OutStreamer->AddBlankLine(); 1665 } 1666 } 1667 1668 // Funny Darwin hack: This flag tells the linker that no global symbols 1669 // contain code that falls through to other global symbols (e.g. the obvious 1670 // implementation of multiple entry points). If this doesn't occur, the 1671 // linker can safely perform dead code stripping. Since LLVM never generates 1672 // code that does this, it is always safe to set. 1673 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1674 1675 return AsmPrinter::doFinalization(M); 1676 } 1677 1678 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) { 1679 // Get the function descriptor symbol. 1680 CurrentFnDescSym = getSymbol(&MF.getFunction()); 1681 // Set the containing csect. 1682 MCSectionXCOFF *FnDescSec = OutStreamer->getContext().getXCOFFSection( 1683 CurrentFnDescSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD, 1684 XCOFF::C_HIDEXT, SectionKind::getData()); 1685 cast<MCSymbolXCOFF>(CurrentFnDescSym)->setContainingCsect(FnDescSec); 1686 1687 return AsmPrinter::SetupMachineFunction(MF); 1688 } 1689 1690 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { 1691 // Early error checking limiting what is supported. 1692 if (GV->isThreadLocal()) 1693 report_fatal_error("Thread local not yet supported on AIX."); 1694 1695 if (GV->hasSection()) 1696 report_fatal_error("Custom section for Data not yet supported."); 1697 1698 if (GV->hasComdat()) 1699 report_fatal_error("COMDAT not yet supported by AIX."); 1700 1701 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1702 if (!GVKind.isCommon() && !GVKind.isBSSLocal() && !GVKind.isData()) 1703 report_fatal_error("Encountered a global variable kind that is " 1704 "not supported yet."); 1705 1706 // Create the containing csect and switch to it. 1707 MCSectionXCOFF *CSect = cast<MCSectionXCOFF>( 1708 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1709 OutStreamer->SwitchSection(CSect); 1710 1711 // Create the symbol, set its storage class, and emit it. 1712 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 1713 GVSym->setStorageClass( 1714 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 1715 GVSym->setContainingCsect(CSect); 1716 1717 const DataLayout &DL = GV->getParent()->getDataLayout(); 1718 1719 // Handle common symbols. 1720 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1721 unsigned Align = 1722 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV); 1723 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType()); 1724 1725 if (GVKind.isBSSLocal()) 1726 OutStreamer->EmitXCOFFLocalCommonSymbol(GVSym, Size, Align); 1727 else 1728 OutStreamer->EmitCommonSymbol(GVSym, Size, Align); 1729 return; 1730 } 1731 1732 MCSymbol *EmittedInitSym = GVSym; 1733 EmitLinkage(GV, EmittedInitSym); 1734 EmitAlignment(getGVAlignment(GV, DL), GV); 1735 OutStreamer->EmitLabel(EmittedInitSym); 1736 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 1737 } 1738 1739 void PPCAIXAsmPrinter::EmitFunctionDescriptor() { 1740 const DataLayout &DL = getDataLayout(); 1741 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4; 1742 1743 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1744 // Emit function descriptor. 1745 OutStreamer->SwitchSection( 1746 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getContainingCsect()); 1747 OutStreamer->EmitLabel(CurrentFnDescSym); 1748 // Emit function entry point address. 1749 OutStreamer->EmitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext), 1750 PointerSize); 1751 // Emit TOC base address. 1752 MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]")); 1753 OutStreamer->EmitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext), 1754 PointerSize); 1755 // Emit a null environment pointer. 1756 OutStreamer->EmitIntValue(0, PointerSize); 1757 1758 OutStreamer->SwitchSection(Current.first, Current.second); 1759 } 1760 1761 void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) { 1762 // If there are no functions in this module, we will never need to reference 1763 // the TOC base. 1764 if (M.empty()) 1765 return; 1766 1767 // Emit TOC base. 1768 MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]")); 1769 MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection( 1770 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1771 SectionKind::getData()); 1772 cast<MCSymbolXCOFF>(TOCBaseSym)->setContainingCsect(TOCBaseSection); 1773 // Switch to section to emit TOC base. 1774 OutStreamer->SwitchSection(TOCBaseSection); 1775 } 1776 1777 1778 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1779 /// for a MachineFunction to the given output stream, in a format that the 1780 /// Darwin assembler can deal with. 1781 /// 1782 static AsmPrinter * 1783 createPPCAsmPrinterPass(TargetMachine &tm, 1784 std::unique_ptr<MCStreamer> &&Streamer) { 1785 if (tm.getTargetTriple().isMacOSX()) 1786 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1787 if (tm.getTargetTriple().isOSAIX()) 1788 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1789 1790 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1791 } 1792 1793 // Force static initialization. 1794 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1795 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1796 createPPCAsmPrinterPass); 1797 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1798 createPPCAsmPrinterPass); 1799 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1800 createPPCAsmPrinterPass); 1801 } 1802