1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCSectionXCOFF.h" 55 #include "llvm/MC/MCStreamer.h" 56 #include "llvm/MC/MCSymbol.h" 57 #include "llvm/MC/MCSymbolELF.h" 58 #include "llvm/MC/MCSymbolXCOFF.h" 59 #include "llvm/MC/SectionKind.h" 60 #include "llvm/Support/Casting.h" 61 #include "llvm/Support/CodeGen.h" 62 #include "llvm/Support/Debug.h" 63 #include "llvm/Support/ErrorHandling.h" 64 #include "llvm/Support/TargetRegistry.h" 65 #include "llvm/Support/raw_ostream.h" 66 #include "llvm/Target/TargetMachine.h" 67 #include <algorithm> 68 #include <cassert> 69 #include <cstdint> 70 #include <memory> 71 #include <new> 72 73 using namespace llvm; 74 75 #define DEBUG_TYPE "asmprinter" 76 77 namespace { 78 79 class PPCAsmPrinter : public AsmPrinter { 80 protected: 81 MapVector<const MCSymbol *, MCSymbol *> TOC; 82 const PPCSubtarget *Subtarget; 83 StackMaps SM; 84 85 public: 86 explicit PPCAsmPrinter(TargetMachine &TM, 87 std::unique_ptr<MCStreamer> Streamer) 88 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 89 90 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 91 92 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym); 93 94 bool doInitialization(Module &M) override { 95 if (!TOC.empty()) 96 TOC.clear(); 97 return AsmPrinter::doInitialization(M); 98 } 99 100 void EmitInstruction(const MachineInstr *MI) override; 101 102 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 103 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 104 /// The \p MI would be INLINEASM ONLY. 105 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 106 107 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 108 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 111 const char *ExtraCode, raw_ostream &O) override; 112 113 void EmitEndOfAsmFile(Module &M) override; 114 115 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 116 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 117 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 118 bool runOnMachineFunction(MachineFunction &MF) override { 119 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 120 bool Changed = AsmPrinter::runOnMachineFunction(MF); 121 emitXRayTable(); 122 return Changed; 123 } 124 }; 125 126 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 127 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 128 public: 129 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 130 std::unique_ptr<MCStreamer> Streamer) 131 : PPCAsmPrinter(TM, std::move(Streamer)) {} 132 133 StringRef getPassName() const override { 134 return "Linux PPC Assembly Printer"; 135 } 136 137 bool doFinalization(Module &M) override; 138 void EmitStartOfAsmFile(Module &M) override; 139 140 void EmitFunctionEntryLabel() override; 141 142 void EmitFunctionBodyStart() override; 143 void EmitFunctionBodyEnd() override; 144 void EmitInstruction(const MachineInstr *MI) override; 145 }; 146 147 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 148 /// OS X 149 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 150 public: 151 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 152 std::unique_ptr<MCStreamer> Streamer) 153 : PPCAsmPrinter(TM, std::move(Streamer)) {} 154 155 StringRef getPassName() const override { 156 return "Darwin PPC Assembly Printer"; 157 } 158 159 bool doFinalization(Module &M) override; 160 void EmitStartOfAsmFile(Module &M) override; 161 }; 162 163 class PPCAIXAsmPrinter : public PPCAsmPrinter { 164 public: 165 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 166 : PPCAsmPrinter(TM, std::move(Streamer)) {} 167 168 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 169 170 void SetupMachineFunction(MachineFunction &MF) override; 171 172 void EmitGlobalVariable(const GlobalVariable *GV) override; 173 174 void EmitFunctionDescriptor() override; 175 176 void EmitEndOfAsmFile(Module &) override; 177 }; 178 179 } // end anonymous namespace 180 181 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 182 raw_ostream &O) { 183 // Computing the address of a global symbol, not calling it. 184 const GlobalValue *GV = MO.getGlobal(); 185 MCSymbol *SymToPrint; 186 187 // External or weakly linked global variables need non-lazily-resolved stubs 188 if (Subtarget->hasLazyResolverStub(GV)) { 189 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 190 MachineModuleInfoImpl::StubValueTy &StubSym = 191 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 192 SymToPrint); 193 if (!StubSym.getPointer()) 194 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 195 !GV->hasInternalLinkage()); 196 } else { 197 SymToPrint = getSymbol(GV); 198 } 199 200 SymToPrint->print(O, MAI); 201 202 printOffset(MO.getOffset(), O); 203 } 204 205 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 206 raw_ostream &O) { 207 const DataLayout &DL = getDataLayout(); 208 const MachineOperand &MO = MI->getOperand(OpNo); 209 210 switch (MO.getType()) { 211 case MachineOperand::MO_Register: { 212 // The MI is INLINEASM ONLY and UseVSXReg is always false. 213 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 214 215 // Linux assembler (Others?) does not take register mnemonics. 216 // FIXME - What about special registers used in mfspr/mtspr? 217 if (!Subtarget->isDarwin()) 218 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 219 O << RegName; 220 return; 221 } 222 case MachineOperand::MO_Immediate: 223 O << MO.getImm(); 224 return; 225 226 case MachineOperand::MO_MachineBasicBlock: 227 MO.getMBB()->getSymbol()->print(O, MAI); 228 return; 229 case MachineOperand::MO_ConstantPoolIndex: 230 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 231 << MO.getIndex(); 232 return; 233 case MachineOperand::MO_BlockAddress: 234 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 235 return; 236 case MachineOperand::MO_GlobalAddress: { 237 PrintSymbolOperand(MO, O); 238 return; 239 } 240 241 default: 242 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 243 return; 244 } 245 } 246 247 /// PrintAsmOperand - Print out an operand for an inline asm expression. 248 /// 249 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 250 const char *ExtraCode, raw_ostream &O) { 251 // Does this asm operand have a single letter operand modifier? 252 if (ExtraCode && ExtraCode[0]) { 253 if (ExtraCode[1] != 0) return true; // Unknown modifier. 254 255 switch (ExtraCode[0]) { 256 default: 257 // See if this is a generic print operand 258 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 259 case 'L': // Write second word of DImode reference. 260 // Verify that this operand has two consecutive registers. 261 if (!MI->getOperand(OpNo).isReg() || 262 OpNo+1 == MI->getNumOperands() || 263 !MI->getOperand(OpNo+1).isReg()) 264 return true; 265 ++OpNo; // Return the high-part. 266 break; 267 case 'I': 268 // Write 'i' if an integer constant, otherwise nothing. Used to print 269 // addi vs add, etc. 270 if (MI->getOperand(OpNo).isImm()) 271 O << "i"; 272 return false; 273 case 'x': 274 if(!MI->getOperand(OpNo).isReg()) 275 return true; 276 // This operand uses VSX numbering. 277 // If the operand is a VMX register, convert it to a VSX register. 278 Register Reg = MI->getOperand(OpNo).getReg(); 279 if (PPCInstrInfo::isVRRegister(Reg)) 280 Reg = PPC::VSX32 + (Reg - PPC::V0); 281 else if (PPCInstrInfo::isVFRegister(Reg)) 282 Reg = PPC::VSX32 + (Reg - PPC::VF0); 283 const char *RegName; 284 RegName = PPCInstPrinter::getRegisterName(Reg); 285 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 286 O << RegName; 287 return false; 288 } 289 } 290 291 printOperand(MI, OpNo, O); 292 return false; 293 } 294 295 // At the moment, all inline asm memory operands are a single register. 296 // In any case, the output of this routine should always be just one 297 // assembler operand. 298 299 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 300 const char *ExtraCode, 301 raw_ostream &O) { 302 if (ExtraCode && ExtraCode[0]) { 303 if (ExtraCode[1] != 0) return true; // Unknown modifier. 304 305 switch (ExtraCode[0]) { 306 default: return true; // Unknown modifier. 307 case 'y': // A memory reference for an X-form instruction 308 { 309 const char *RegName = "r0"; 310 if (!Subtarget->isDarwin()) 311 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 312 O << RegName << ", "; 313 printOperand(MI, OpNo, O); 314 return false; 315 } 316 case 'U': // Print 'u' for update form. 317 case 'X': // Print 'x' for indexed form. 318 { 319 // FIXME: Currently for PowerPC memory operands are always loaded 320 // into a register, so we never get an update or indexed form. 321 // This is bad even for offset forms, since even if we know we 322 // have a value in -16(r1), we will generate a load into r<n> 323 // and then load from 0(r<n>). Until that issue is fixed, 324 // tolerate 'U' and 'X' but don't output anything. 325 assert(MI->getOperand(OpNo).isReg()); 326 return false; 327 } 328 } 329 } 330 331 assert(MI->getOperand(OpNo).isReg()); 332 O << "0("; 333 printOperand(MI, OpNo, O); 334 O << ")"; 335 return false; 336 } 337 338 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 339 /// exists for it. If not, create one. Then return a symbol that references 340 /// the TOC entry. 341 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym) { 342 MCSymbol *&TOCEntry = TOC[Sym]; 343 if (!TOCEntry) 344 TOCEntry = createTempSymbol("C"); 345 return TOCEntry; 346 } 347 348 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 349 emitStackMaps(SM); 350 } 351 352 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 353 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 354 355 SM.recordStackMap(MI); 356 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 357 358 // Scan ahead to trim the shadow. 359 const MachineBasicBlock &MBB = *MI.getParent(); 360 MachineBasicBlock::const_iterator MII(MI); 361 ++MII; 362 while (NumNOPBytes > 0) { 363 if (MII == MBB.end() || MII->isCall() || 364 MII->getOpcode() == PPC::DBG_VALUE || 365 MII->getOpcode() == TargetOpcode::PATCHPOINT || 366 MII->getOpcode() == TargetOpcode::STACKMAP) 367 break; 368 ++MII; 369 NumNOPBytes -= 4; 370 } 371 372 // Emit nops. 373 for (unsigned i = 0; i < NumNOPBytes; i += 4) 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 375 } 376 377 // Lower a patchpoint of the form: 378 // [<def>], <id>, <numBytes>, <target>, <numArgs> 379 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 380 SM.recordPatchPoint(MI); 381 PatchPointOpers Opers(&MI); 382 383 unsigned EncodedBytes = 0; 384 const MachineOperand &CalleeMO = Opers.getCallTarget(); 385 386 if (CalleeMO.isImm()) { 387 int64_t CallTarget = CalleeMO.getImm(); 388 if (CallTarget) { 389 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 390 "High 16 bits of call target should be zero."); 391 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 392 EncodedBytes = 0; 393 // Materialize the jump address: 394 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 395 .addReg(ScratchReg) 396 .addImm((CallTarget >> 32) & 0xFFFF)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 399 .addReg(ScratchReg) 400 .addReg(ScratchReg) 401 .addImm(32).addImm(16)); 402 ++EncodedBytes; 403 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 404 .addReg(ScratchReg) 405 .addReg(ScratchReg) 406 .addImm((CallTarget >> 16) & 0xFFFF)); 407 ++EncodedBytes; 408 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 409 .addReg(ScratchReg) 410 .addReg(ScratchReg) 411 .addImm(CallTarget & 0xFFFF)); 412 413 // Save the current TOC pointer before the remote call. 414 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 415 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 416 .addReg(PPC::X2) 417 .addImm(TOCSaveOffset) 418 .addReg(PPC::X1)); 419 ++EncodedBytes; 420 421 // If we're on ELFv1, then we need to load the actual function pointer 422 // from the function descriptor. 423 if (!Subtarget->isELFv2ABI()) { 424 // Load the new TOC pointer and the function address, but not r11 425 // (needing this is rare, and loading it here would prevent passing it 426 // via a 'nest' parameter. 427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 428 .addReg(PPC::X2) 429 .addImm(8) 430 .addReg(ScratchReg)); 431 ++EncodedBytes; 432 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 433 .addReg(ScratchReg) 434 .addImm(0) 435 .addReg(ScratchReg)); 436 ++EncodedBytes; 437 } 438 439 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 440 .addReg(ScratchReg)); 441 ++EncodedBytes; 442 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 443 ++EncodedBytes; 444 445 // Restore the TOC pointer after the call. 446 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 447 .addReg(PPC::X2) 448 .addImm(TOCSaveOffset) 449 .addReg(PPC::X1)); 450 ++EncodedBytes; 451 } 452 } else if (CalleeMO.isGlobal()) { 453 const GlobalValue *GValue = CalleeMO.getGlobal(); 454 MCSymbol *MOSymbol = getSymbol(GValue); 455 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 456 457 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 458 .addExpr(SymVar)); 459 EncodedBytes += 2; 460 } 461 462 // Each instruction is 4 bytes. 463 EncodedBytes *= 4; 464 465 // Emit padding. 466 unsigned NumBytes = Opers.getNumPatchBytes(); 467 assert(NumBytes >= EncodedBytes && 468 "Patchpoint can't request size less than the length of a call."); 469 assert((NumBytes - EncodedBytes) % 4 == 0 && 470 "Invalid number of NOP bytes requested!"); 471 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 472 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 473 } 474 475 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 476 /// call to __tls_get_addr to the current output stream. 477 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 478 MCSymbolRefExpr::VariantKind VK) { 479 StringRef Name = "__tls_get_addr"; 480 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 481 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 482 const Module *M = MF->getFunction().getParent(); 483 484 assert(MI->getOperand(0).isReg() && 485 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 486 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 487 "GETtls[ld]ADDR[32] must define GPR3"); 488 assert(MI->getOperand(1).isReg() && 489 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 490 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 491 "GETtls[ld]ADDR[32] must read GPR3"); 492 493 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 494 isPositionIndependent()) 495 Kind = MCSymbolRefExpr::VK_PLT; 496 const MCExpr *TlsRef = 497 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 498 499 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 500 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 501 M->getPICLevel() == PICLevel::BigPIC) 502 TlsRef = MCBinaryExpr::createAdd( 503 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 504 const MachineOperand &MO = MI->getOperand(2); 505 const GlobalValue *GValue = MO.getGlobal(); 506 MCSymbol *MOSymbol = getSymbol(GValue); 507 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 508 EmitToStreamer(*OutStreamer, 509 MCInstBuilder(Subtarget->isPPC64() ? 510 PPC::BL8_NOP_TLS : PPC::BL_TLS) 511 .addExpr(TlsRef) 512 .addExpr(SymVar)); 513 } 514 515 /// Map a machine operand for a TOC pseudo-machine instruction to its 516 /// corresponding MCSymbol. 517 static MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO, 518 AsmPrinter &AP) { 519 switch (MO.getType()) { 520 case MachineOperand::MO_GlobalAddress: 521 return AP.getSymbol(MO.getGlobal()); 522 case MachineOperand::MO_ConstantPoolIndex: 523 return AP.GetCPISymbol(MO.getIndex()); 524 case MachineOperand::MO_JumpTableIndex: 525 return AP.GetJTISymbol(MO.getIndex()); 526 case MachineOperand::MO_BlockAddress: 527 return AP.GetBlockAddressSymbol(MO.getBlockAddress()); 528 default: 529 llvm_unreachable("Unexpected operand type to get symbol."); 530 } 531 } 532 533 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 534 /// the current output stream. 535 /// 536 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 537 MCInst TmpInst; 538 const bool IsDarwin = TM.getTargetTriple().isOSDarwin(); 539 const Module *M = MF->getFunction().getParent(); 540 PICLevel::Level PL = M->getPICLevel(); 541 542 #ifndef NDEBUG 543 // Validate that SPE and FPU are mutually exclusive in codegen 544 if (!MI->isInlineAsm()) { 545 for (const MachineOperand &MO: MI->operands()) { 546 if (MO.isReg()) { 547 Register Reg = MO.getReg(); 548 if (Subtarget->hasSPE()) { 549 if (PPC::F4RCRegClass.contains(Reg) || 550 PPC::F8RCRegClass.contains(Reg) || 551 PPC::QBRCRegClass.contains(Reg) || 552 PPC::QFRCRegClass.contains(Reg) || 553 PPC::QSRCRegClass.contains(Reg) || 554 PPC::VFRCRegClass.contains(Reg) || 555 PPC::VRRCRegClass.contains(Reg) || 556 PPC::VSFRCRegClass.contains(Reg) || 557 PPC::VSSRCRegClass.contains(Reg) 558 ) 559 llvm_unreachable("SPE targets cannot have FPRegs!"); 560 } else { 561 if (PPC::SPERCRegClass.contains(Reg)) 562 llvm_unreachable("SPE register found in FPU-targeted code!"); 563 } 564 } 565 } 566 } 567 #endif 568 // Lower multi-instruction pseudo operations. 569 switch (MI->getOpcode()) { 570 default: break; 571 case TargetOpcode::DBG_VALUE: 572 llvm_unreachable("Should be handled target independently"); 573 case TargetOpcode::STACKMAP: 574 return LowerSTACKMAP(SM, *MI); 575 case TargetOpcode::PATCHPOINT: 576 return LowerPATCHPOINT(SM, *MI); 577 578 case PPC::MoveGOTtoLR: { 579 // Transform %lr = MoveGOTtoLR 580 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 581 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 582 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 583 // blrl 584 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 585 MCSymbol *GOTSymbol = 586 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 587 const MCExpr *OffsExpr = 588 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 589 MCSymbolRefExpr::VK_PPC_LOCAL, 590 OutContext), 591 MCConstantExpr::create(4, OutContext), 592 OutContext); 593 594 // Emit the 'bl'. 595 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 596 return; 597 } 598 case PPC::MovePCtoLR: 599 case PPC::MovePCtoLR8: { 600 // Transform %lr = MovePCtoLR 601 // Into this, where the label is the PIC base: 602 // bl L1$pb 603 // L1$pb: 604 MCSymbol *PICBase = MF->getPICBaseSymbol(); 605 606 // Emit the 'bl'. 607 EmitToStreamer(*OutStreamer, 608 MCInstBuilder(PPC::BL) 609 // FIXME: We would like an efficient form for this, so we 610 // don't have to do a lot of extra uniquing. 611 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 612 613 // Emit the label. 614 OutStreamer->EmitLabel(PICBase); 615 return; 616 } 617 case PPC::UpdateGBR: { 618 // Transform %rd = UpdateGBR(%rt, %ri) 619 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 620 // add %rd, %rt, %ri 621 // or into (if secure plt mode is on): 622 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 623 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 624 // Get the offset from the GOT Base Register to the GOT 625 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 626 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 627 unsigned PICR = TmpInst.getOperand(0).getReg(); 628 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 629 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 630 : ".LTOC"); 631 const MCExpr *PB = 632 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 633 634 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 635 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 636 637 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 638 EmitToStreamer( 639 *OutStreamer, 640 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 641 642 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 643 EmitToStreamer( 644 *OutStreamer, 645 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 646 return; 647 } else { 648 MCSymbol *PICOffset = 649 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 650 TmpInst.setOpcode(PPC::LWZ); 651 const MCExpr *Exp = 652 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 653 const MCExpr *PB = 654 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 655 MCSymbolRefExpr::VK_None, 656 OutContext); 657 const MCOperand TR = TmpInst.getOperand(1); 658 const MCOperand PICR = TmpInst.getOperand(0); 659 660 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 661 TmpInst.getOperand(1) = 662 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 663 TmpInst.getOperand(0) = TR; 664 TmpInst.getOperand(2) = PICR; 665 EmitToStreamer(*OutStreamer, TmpInst); 666 667 TmpInst.setOpcode(PPC::ADD4); 668 TmpInst.getOperand(0) = PICR; 669 TmpInst.getOperand(1) = TR; 670 TmpInst.getOperand(2) = PICR; 671 EmitToStreamer(*OutStreamer, TmpInst); 672 return; 673 } 674 } 675 case PPC::LWZtoc: { 676 assert(!IsDarwin && "TOC is an ELF/XCOFF construct."); 677 678 // Transform %rN = LWZtoc @op1, %r2 679 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 680 681 // Change the opcode to LWZ. 682 TmpInst.setOpcode(PPC::LWZ); 683 684 const MachineOperand &MO = MI->getOperand(1); 685 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 686 "Unexpected operand type for LWZtoc pseudo."); 687 688 // Map the operand to its corresponding MCSymbol. 689 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 690 const bool IsAIX = TM.getTargetTriple().isOSAIX(); 691 692 // Create a reference to the GOT entry for the symbol. The GOT entry will be 693 // synthesized later. 694 if (PL == PICLevel::SmallPIC && !IsAIX) { 695 const MCExpr *Exp = 696 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 697 OutContext); 698 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 699 EmitToStreamer(*OutStreamer, TmpInst); 700 return; 701 } 702 703 // Otherwise use the TOC. 'TOCEntry' is a label used to reference the 704 // storage allocated in the TOC which contains the address of 705 // 'MOSymbol'. Said TOC entry will be synthesized later. 706 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 707 const MCExpr *Exp = 708 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 709 710 // AIX uses the label directly as the lwz displacement operand for 711 // references into the toc section. The displacement value will be generated 712 // relative to the toc-base. 713 if (IsAIX) { 714 assert( 715 TM.getCodeModel() == CodeModel::Small && 716 "This pseudo should only be selected for 32-bit small code model."); 717 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 718 EmitToStreamer(*OutStreamer, TmpInst); 719 return; 720 } 721 722 // Create an explicit subtract expression between the local symbol and 723 // '.LTOC' to manifest the toc-relative offset. 724 const MCExpr *PB = MCSymbolRefExpr::create( 725 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 726 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 727 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 728 EmitToStreamer(*OutStreamer, TmpInst); 729 return; 730 } 731 case PPC::LDtocJTI: 732 case PPC::LDtocCPT: 733 case PPC::LDtocBA: 734 case PPC::LDtoc: { 735 // Transform %x3 = LDtoc @min1, %x2 736 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 737 738 // Change the opcode to LD. 739 TmpInst.setOpcode(PPC::LD); 740 741 const MachineOperand &MO = MI->getOperand(1); 742 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 743 "Invalid operand!"); 744 745 // Map the machine operand to its corresponding MCSymbol, then map the 746 // global address operand to be a reference to the TOC entry we will 747 // synthesize later. 748 MCSymbol *TOCEntry = 749 lookUpOrCreateTOCEntry(getMCSymbolForTOCPseudoMO(MO, *this)); 750 751 const MCExpr *Exp = 752 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 753 OutContext); 754 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 755 EmitToStreamer(*OutStreamer, TmpInst); 756 return; 757 } 758 759 case PPC::ADDIStocHA8: { 760 // Transform %xd = ADDIStocHA8 %x2, @sym 761 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 762 763 // Change the opcode to ADDIS8. If the global address is the address of 764 // an external symbol, is a jump table address, is a block address, or is a 765 // constant pool index with large code model enabled, then generate a TOC 766 // entry and reference that. Otherwise, reference the symbol directly. 767 TmpInst.setOpcode(PPC::ADDIS8); 768 769 const MachineOperand &MO = MI->getOperand(2); 770 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 771 "Invalid operand for ADDIStocHA8!"); 772 773 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 774 775 const bool GlobalToc = 776 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal()); 777 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 778 (MO.isCPI() && TM.getCodeModel() == CodeModel::Large)) 779 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 780 781 const MCExpr *Exp = 782 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 783 OutContext); 784 785 if (!MO.isJTI() && MO.getOffset()) 786 Exp = MCBinaryExpr::createAdd(Exp, 787 MCConstantExpr::create(MO.getOffset(), 788 OutContext), 789 OutContext); 790 791 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 792 EmitToStreamer(*OutStreamer, TmpInst); 793 return; 794 } 795 case PPC::LDtocL: { 796 // Transform %xd = LDtocL @sym, %xs 797 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 798 799 // Change the opcode to LD. If the global address is the address of 800 // an external symbol, is a jump table address, is a block address, or is 801 // a constant pool index with large code model enabled, then generate a 802 // TOC entry and reference that. Otherwise, reference the symbol directly. 803 TmpInst.setOpcode(PPC::LD); 804 805 const MachineOperand &MO = MI->getOperand(1); 806 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 807 MO.isBlockAddress()) && 808 "Invalid operand for LDtocL!"); 809 810 LLVM_DEBUG(assert( 811 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 812 "LDtocL used on symbol that could be accessed directly is " 813 "invalid. Must match ADDIStocHA8.")); 814 815 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 816 817 if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large) 818 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 819 820 const MCExpr *Exp = 821 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 822 OutContext); 823 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 824 EmitToStreamer(*OutStreamer, TmpInst); 825 return; 826 } 827 case PPC::ADDItocL: { 828 // Transform %xd = ADDItocL %xs, @sym 829 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 830 831 // Change the opcode to ADDI8. If the global address is external, then 832 // generate a TOC entry and reference that. Otherwise, reference the 833 // symbol directly. 834 TmpInst.setOpcode(PPC::ADDI8); 835 836 const MachineOperand &MO = MI->getOperand(2); 837 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL."); 838 839 LLVM_DEBUG(assert( 840 !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 841 "Interposable definitions must use indirect access.")); 842 843 const MCExpr *Exp = 844 MCSymbolRefExpr::create(getMCSymbolForTOCPseudoMO(MO, *this), 845 MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext); 846 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 847 EmitToStreamer(*OutStreamer, TmpInst); 848 return; 849 } 850 case PPC::ADDISgotTprelHA: { 851 // Transform: %xd = ADDISgotTprelHA %x2, @sym 852 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 853 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 854 const MachineOperand &MO = MI->getOperand(2); 855 const GlobalValue *GValue = MO.getGlobal(); 856 MCSymbol *MOSymbol = getSymbol(GValue); 857 const MCExpr *SymGotTprel = 858 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 859 OutContext); 860 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 861 .addReg(MI->getOperand(0).getReg()) 862 .addReg(MI->getOperand(1).getReg()) 863 .addExpr(SymGotTprel)); 864 return; 865 } 866 case PPC::LDgotTprelL: 867 case PPC::LDgotTprelL32: { 868 // Transform %xd = LDgotTprelL @sym, %xs 869 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 870 871 // Change the opcode to LD. 872 TmpInst.setOpcode(Subtarget->isPPC64() ? PPC::LD : PPC::LWZ); 873 const MachineOperand &MO = MI->getOperand(1); 874 const GlobalValue *GValue = MO.getGlobal(); 875 MCSymbol *MOSymbol = getSymbol(GValue); 876 const MCExpr *Exp = MCSymbolRefExpr::create( 877 MOSymbol, 878 Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 879 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 880 OutContext); 881 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 882 EmitToStreamer(*OutStreamer, TmpInst); 883 return; 884 } 885 886 case PPC::PPC32PICGOT: { 887 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 888 MCSymbol *GOTRef = OutContext.createTempSymbol(); 889 MCSymbol *NextInstr = OutContext.createTempSymbol(); 890 891 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 892 // FIXME: We would like an efficient form for this, so we don't have to do 893 // a lot of extra uniquing. 894 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 895 const MCExpr *OffsExpr = 896 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 897 MCSymbolRefExpr::create(GOTRef, OutContext), 898 OutContext); 899 OutStreamer->EmitLabel(GOTRef); 900 OutStreamer->EmitValue(OffsExpr, 4); 901 OutStreamer->EmitLabel(NextInstr); 902 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 903 .addReg(MI->getOperand(0).getReg())); 904 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 905 .addReg(MI->getOperand(1).getReg()) 906 .addImm(0) 907 .addReg(MI->getOperand(0).getReg())); 908 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 909 .addReg(MI->getOperand(0).getReg()) 910 .addReg(MI->getOperand(1).getReg()) 911 .addReg(MI->getOperand(0).getReg())); 912 return; 913 } 914 case PPC::PPC32GOT: { 915 MCSymbol *GOTSymbol = 916 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 917 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 918 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 919 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 920 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 921 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 922 .addReg(MI->getOperand(0).getReg()) 923 .addExpr(SymGotTlsL)); 924 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 925 .addReg(MI->getOperand(0).getReg()) 926 .addReg(MI->getOperand(0).getReg()) 927 .addExpr(SymGotTlsHA)); 928 return; 929 } 930 case PPC::ADDIStlsgdHA: { 931 // Transform: %xd = ADDIStlsgdHA %x2, @sym 932 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 933 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 934 const MachineOperand &MO = MI->getOperand(2); 935 const GlobalValue *GValue = MO.getGlobal(); 936 MCSymbol *MOSymbol = getSymbol(GValue); 937 const MCExpr *SymGotTlsGD = 938 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 939 OutContext); 940 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 941 .addReg(MI->getOperand(0).getReg()) 942 .addReg(MI->getOperand(1).getReg()) 943 .addExpr(SymGotTlsGD)); 944 return; 945 } 946 case PPC::ADDItlsgdL: 947 // Transform: %xd = ADDItlsgdL %xs, @sym 948 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 949 case PPC::ADDItlsgdL32: { 950 // Transform: %rd = ADDItlsgdL32 %rs, @sym 951 // Into: %rd = ADDI %rs, sym@got@tlsgd 952 const MachineOperand &MO = MI->getOperand(2); 953 const GlobalValue *GValue = MO.getGlobal(); 954 MCSymbol *MOSymbol = getSymbol(GValue); 955 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 956 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 957 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 958 OutContext); 959 EmitToStreamer(*OutStreamer, 960 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 961 .addReg(MI->getOperand(0).getReg()) 962 .addReg(MI->getOperand(1).getReg()) 963 .addExpr(SymGotTlsGD)); 964 return; 965 } 966 case PPC::GETtlsADDR: 967 // Transform: %x3 = GETtlsADDR %x3, @sym 968 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 969 case PPC::GETtlsADDR32: { 970 // Transform: %r3 = GETtlsADDR32 %r3, @sym 971 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 972 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 973 return; 974 } 975 case PPC::ADDIStlsldHA: { 976 // Transform: %xd = ADDIStlsldHA %x2, @sym 977 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 978 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 979 const MachineOperand &MO = MI->getOperand(2); 980 const GlobalValue *GValue = MO.getGlobal(); 981 MCSymbol *MOSymbol = getSymbol(GValue); 982 const MCExpr *SymGotTlsLD = 983 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 984 OutContext); 985 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 986 .addReg(MI->getOperand(0).getReg()) 987 .addReg(MI->getOperand(1).getReg()) 988 .addExpr(SymGotTlsLD)); 989 return; 990 } 991 case PPC::ADDItlsldL: 992 // Transform: %xd = ADDItlsldL %xs, @sym 993 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 994 case PPC::ADDItlsldL32: { 995 // Transform: %rd = ADDItlsldL32 %rs, @sym 996 // Into: %rd = ADDI %rs, sym@got@tlsld 997 const MachineOperand &MO = MI->getOperand(2); 998 const GlobalValue *GValue = MO.getGlobal(); 999 MCSymbol *MOSymbol = getSymbol(GValue); 1000 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1001 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1002 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1003 OutContext); 1004 EmitToStreamer(*OutStreamer, 1005 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1006 .addReg(MI->getOperand(0).getReg()) 1007 .addReg(MI->getOperand(1).getReg()) 1008 .addExpr(SymGotTlsLD)); 1009 return; 1010 } 1011 case PPC::GETtlsldADDR: 1012 // Transform: %x3 = GETtlsldADDR %x3, @sym 1013 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1014 case PPC::GETtlsldADDR32: { 1015 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1016 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1017 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1018 return; 1019 } 1020 case PPC::ADDISdtprelHA: 1021 // Transform: %xd = ADDISdtprelHA %xs, @sym 1022 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1023 case PPC::ADDISdtprelHA32: { 1024 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1025 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1026 const MachineOperand &MO = MI->getOperand(2); 1027 const GlobalValue *GValue = MO.getGlobal(); 1028 MCSymbol *MOSymbol = getSymbol(GValue); 1029 const MCExpr *SymDtprel = 1030 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1031 OutContext); 1032 EmitToStreamer( 1033 *OutStreamer, 1034 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1035 .addReg(MI->getOperand(0).getReg()) 1036 .addReg(MI->getOperand(1).getReg()) 1037 .addExpr(SymDtprel)); 1038 return; 1039 } 1040 case PPC::ADDIdtprelL: 1041 // Transform: %xd = ADDIdtprelL %xs, @sym 1042 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1043 case PPC::ADDIdtprelL32: { 1044 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1045 // Into: %rd = ADDI %rs, sym@dtprel@l 1046 const MachineOperand &MO = MI->getOperand(2); 1047 const GlobalValue *GValue = MO.getGlobal(); 1048 MCSymbol *MOSymbol = getSymbol(GValue); 1049 const MCExpr *SymDtprel = 1050 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1051 OutContext); 1052 EmitToStreamer(*OutStreamer, 1053 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1054 .addReg(MI->getOperand(0).getReg()) 1055 .addReg(MI->getOperand(1).getReg()) 1056 .addExpr(SymDtprel)); 1057 return; 1058 } 1059 case PPC::MFOCRF: 1060 case PPC::MFOCRF8: 1061 if (!Subtarget->hasMFOCRF()) { 1062 // Transform: %r3 = MFOCRF %cr7 1063 // Into: %r3 = MFCR ;; cr7 1064 unsigned NewOpcode = 1065 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1066 OutStreamer->AddComment(PPCInstPrinter:: 1067 getRegisterName(MI->getOperand(1).getReg())); 1068 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1069 .addReg(MI->getOperand(0).getReg())); 1070 return; 1071 } 1072 break; 1073 case PPC::MTOCRF: 1074 case PPC::MTOCRF8: 1075 if (!Subtarget->hasMFOCRF()) { 1076 // Transform: %cr7 = MTOCRF %r3 1077 // Into: MTCRF mask, %r3 ;; cr7 1078 unsigned NewOpcode = 1079 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1080 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1081 ->getEncodingValue(MI->getOperand(0).getReg()); 1082 OutStreamer->AddComment(PPCInstPrinter:: 1083 getRegisterName(MI->getOperand(0).getReg())); 1084 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1085 .addImm(Mask) 1086 .addReg(MI->getOperand(1).getReg())); 1087 return; 1088 } 1089 break; 1090 case PPC::LD: 1091 case PPC::STD: 1092 case PPC::LWA_32: 1093 case PPC::LWA: { 1094 // Verify alignment is legal, so we don't create relocations 1095 // that can't be supported. 1096 // FIXME: This test is currently disabled for Darwin. The test 1097 // suite shows a handful of test cases that fail this check for 1098 // Darwin. Those need to be investigated before this sanity test 1099 // can be enabled for those subtargets. 1100 if (!Subtarget->isDarwin()) { 1101 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1102 const MachineOperand &MO = MI->getOperand(OpNum); 1103 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1104 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1105 } 1106 // Now process the instruction normally. 1107 break; 1108 } 1109 } 1110 1111 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 1112 EmitToStreamer(*OutStreamer, TmpInst); 1113 } 1114 1115 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1116 if (!Subtarget->isPPC64()) 1117 return PPCAsmPrinter::EmitInstruction(MI); 1118 1119 switch (MI->getOpcode()) { 1120 default: 1121 return PPCAsmPrinter::EmitInstruction(MI); 1122 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1123 // .begin: 1124 // b .end # lis 0, FuncId[16..32] 1125 // nop # li 0, FuncId[0..15] 1126 // std 0, -8(1) 1127 // mflr 0 1128 // bl __xray_FunctionEntry 1129 // mtlr 0 1130 // .end: 1131 // 1132 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1133 // of instructions change. 1134 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1135 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1136 OutStreamer->EmitLabel(BeginOfSled); 1137 EmitToStreamer(*OutStreamer, 1138 MCInstBuilder(PPC::B).addExpr( 1139 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1140 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1141 EmitToStreamer( 1142 *OutStreamer, 1143 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1144 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1145 EmitToStreamer(*OutStreamer, 1146 MCInstBuilder(PPC::BL8_NOP) 1147 .addExpr(MCSymbolRefExpr::create( 1148 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1149 OutContext))); 1150 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1151 OutStreamer->EmitLabel(EndOfSled); 1152 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1153 break; 1154 } 1155 case TargetOpcode::PATCHABLE_RET: { 1156 unsigned RetOpcode = MI->getOperand(0).getImm(); 1157 MCInst RetInst; 1158 RetInst.setOpcode(RetOpcode); 1159 for (const auto &MO : 1160 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1161 MCOperand MCOp; 1162 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1163 RetInst.addOperand(MCOp); 1164 } 1165 1166 bool IsConditional; 1167 if (RetOpcode == PPC::BCCLR) { 1168 IsConditional = true; 1169 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1170 RetOpcode == PPC::TCRETURNai8) { 1171 break; 1172 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1173 IsConditional = false; 1174 } else { 1175 EmitToStreamer(*OutStreamer, RetInst); 1176 break; 1177 } 1178 1179 MCSymbol *FallthroughLabel; 1180 if (IsConditional) { 1181 // Before: 1182 // bgtlr cr0 1183 // 1184 // After: 1185 // ble cr0, .end 1186 // .p2align 3 1187 // .begin: 1188 // blr # lis 0, FuncId[16..32] 1189 // nop # li 0, FuncId[0..15] 1190 // std 0, -8(1) 1191 // mflr 0 1192 // bl __xray_FunctionExit 1193 // mtlr 0 1194 // blr 1195 // .end: 1196 // 1197 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1198 // of instructions change. 1199 FallthroughLabel = OutContext.createTempSymbol(); 1200 EmitToStreamer( 1201 *OutStreamer, 1202 MCInstBuilder(PPC::BCC) 1203 .addImm(PPC::InvertPredicate( 1204 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1205 .addReg(MI->getOperand(2).getReg()) 1206 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1207 RetInst = MCInst(); 1208 RetInst.setOpcode(PPC::BLR8); 1209 } 1210 // .p2align 3 1211 // .begin: 1212 // b(lr)? # lis 0, FuncId[16..32] 1213 // nop # li 0, FuncId[0..15] 1214 // std 0, -8(1) 1215 // mflr 0 1216 // bl __xray_FunctionExit 1217 // mtlr 0 1218 // b(lr)? 1219 // 1220 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1221 // of instructions change. 1222 OutStreamer->EmitCodeAlignment(8); 1223 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1224 OutStreamer->EmitLabel(BeginOfSled); 1225 EmitToStreamer(*OutStreamer, RetInst); 1226 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1227 EmitToStreamer( 1228 *OutStreamer, 1229 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1230 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1231 EmitToStreamer(*OutStreamer, 1232 MCInstBuilder(PPC::BL8_NOP) 1233 .addExpr(MCSymbolRefExpr::create( 1234 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1235 OutContext))); 1236 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1237 EmitToStreamer(*OutStreamer, RetInst); 1238 if (IsConditional) 1239 OutStreamer->EmitLabel(FallthroughLabel); 1240 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1241 break; 1242 } 1243 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1244 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1245 case TargetOpcode::PATCHABLE_TAIL_CALL: 1246 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1247 // normal function exit from a tail exit. 1248 llvm_unreachable("Tail call is handled in the normal case. See comments " 1249 "around this assert."); 1250 } 1251 } 1252 1253 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1254 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1255 PPCTargetStreamer *TS = 1256 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1257 1258 if (TS) 1259 TS->emitAbiVersion(2); 1260 } 1261 1262 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1263 !isPositionIndependent()) 1264 return AsmPrinter::EmitStartOfAsmFile(M); 1265 1266 if (M.getPICLevel() == PICLevel::SmallPIC) 1267 return AsmPrinter::EmitStartOfAsmFile(M); 1268 1269 OutStreamer->SwitchSection(OutContext.getELFSection( 1270 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1271 1272 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1273 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1274 1275 OutStreamer->EmitLabel(CurrentPos); 1276 1277 // The GOT pointer points to the middle of the GOT, in order to reference the 1278 // entire 64kB range. 0x8000 is the midpoint. 1279 const MCExpr *tocExpr = 1280 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1281 MCConstantExpr::create(0x8000, OutContext), 1282 OutContext); 1283 1284 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1285 1286 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1287 } 1288 1289 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1290 // linux/ppc32 - Normal entry label. 1291 if (!Subtarget->isPPC64() && 1292 (!isPositionIndependent() || 1293 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1294 return AsmPrinter::EmitFunctionEntryLabel(); 1295 1296 if (!Subtarget->isPPC64()) { 1297 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1298 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1299 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1300 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1301 OutStreamer->EmitLabel(RelocSymbol); 1302 1303 const MCExpr *OffsExpr = 1304 MCBinaryExpr::createSub( 1305 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1306 OutContext), 1307 MCSymbolRefExpr::create(PICBase, OutContext), 1308 OutContext); 1309 OutStreamer->EmitValue(OffsExpr, 4); 1310 OutStreamer->EmitLabel(CurrentFnSym); 1311 return; 1312 } else 1313 return AsmPrinter::EmitFunctionEntryLabel(); 1314 } 1315 1316 // ELFv2 ABI - Normal entry label. 1317 if (Subtarget->isELFv2ABI()) { 1318 // In the Large code model, we allow arbitrary displacements between 1319 // the text section and its associated TOC section. We place the 1320 // full 8-byte offset to the TOC in memory immediately preceding 1321 // the function global entry point. 1322 if (TM.getCodeModel() == CodeModel::Large 1323 && !MF->getRegInfo().use_empty(PPC::X2)) { 1324 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1325 1326 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1327 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1328 const MCExpr *TOCDeltaExpr = 1329 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1330 MCSymbolRefExpr::create(GlobalEPSymbol, 1331 OutContext), 1332 OutContext); 1333 1334 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1335 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1336 } 1337 return AsmPrinter::EmitFunctionEntryLabel(); 1338 } 1339 1340 // Emit an official procedure descriptor. 1341 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1342 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1343 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1344 OutStreamer->SwitchSection(Section); 1345 OutStreamer->EmitLabel(CurrentFnSym); 1346 OutStreamer->EmitValueToAlignment(8); 1347 MCSymbol *Symbol1 = CurrentFnSymForSize; 1348 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1349 // entry point. 1350 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1351 8 /*size*/); 1352 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1353 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1354 OutStreamer->EmitValue( 1355 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1356 8/*size*/); 1357 // Emit a null environment pointer. 1358 OutStreamer->EmitIntValue(0, 8 /* size */); 1359 OutStreamer->SwitchSection(Current.first, Current.second); 1360 } 1361 1362 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1363 const DataLayout &DL = getDataLayout(); 1364 1365 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1366 1367 PPCTargetStreamer &TS = 1368 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1369 1370 if (!TOC.empty()) { 1371 MCSectionELF *Section; 1372 1373 if (isPPC64) 1374 Section = OutStreamer->getContext().getELFSection( 1375 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1376 else 1377 Section = OutStreamer->getContext().getELFSection( 1378 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1379 OutStreamer->SwitchSection(Section); 1380 1381 for (const auto &TOCMapPair : TOC) { 1382 const MCSymbol *const TOCEntryTarget = TOCMapPair.first; 1383 MCSymbol *const TOCEntryLabel = TOCMapPair.second; 1384 1385 OutStreamer->EmitLabel(TOCEntryLabel); 1386 if (isPPC64) { 1387 TS.emitTCEntry(*TOCEntryTarget); 1388 } else { 1389 OutStreamer->EmitValueToAlignment(4); 1390 OutStreamer->EmitSymbolValue(TOCEntryTarget, 4); 1391 } 1392 } 1393 } 1394 1395 return AsmPrinter::doFinalization(M); 1396 } 1397 1398 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1399 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1400 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1401 // provide two entry points. The ABI guarantees that when calling the 1402 // local entry point, r2 is set up by the caller to contain the TOC base 1403 // for this function, and when calling the global entry point, r12 is set 1404 // up by the caller to hold the address of the global entry point. We 1405 // thus emit a prefix sequence along the following lines: 1406 // 1407 // func: 1408 // .Lfunc_gepNN: 1409 // # global entry point 1410 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1411 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1412 // .Lfunc_lepNN: 1413 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1414 // # local entry point, followed by function body 1415 // 1416 // For the Large code model, we create 1417 // 1418 // .Lfunc_tocNN: 1419 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1420 // func: 1421 // .Lfunc_gepNN: 1422 // # global entry point 1423 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1424 // add r2,r2,r12 1425 // .Lfunc_lepNN: 1426 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1427 // # local entry point, followed by function body 1428 // 1429 // This ensures we have r2 set up correctly while executing the function 1430 // body, no matter which entry point is called. 1431 if (Subtarget->isELFv2ABI() 1432 // Only do all that if the function uses r2 in the first place. 1433 && !MF->getRegInfo().use_empty(PPC::X2)) { 1434 // Note: The logic here must be synchronized with the code in the 1435 // branch-selection pass which sets the offset of the first block in the 1436 // function. This matters because it affects the alignment. 1437 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1438 1439 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1440 OutStreamer->EmitLabel(GlobalEntryLabel); 1441 const MCSymbolRefExpr *GlobalEntryLabelExp = 1442 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1443 1444 if (TM.getCodeModel() != CodeModel::Large) { 1445 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1446 const MCExpr *TOCDeltaExpr = 1447 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1448 GlobalEntryLabelExp, OutContext); 1449 1450 const MCExpr *TOCDeltaHi = 1451 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1453 .addReg(PPC::X2) 1454 .addReg(PPC::X12) 1455 .addExpr(TOCDeltaHi)); 1456 1457 const MCExpr *TOCDeltaLo = 1458 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1459 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1460 .addReg(PPC::X2) 1461 .addReg(PPC::X2) 1462 .addExpr(TOCDeltaLo)); 1463 } else { 1464 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1465 const MCExpr *TOCOffsetDeltaExpr = 1466 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1467 GlobalEntryLabelExp, OutContext); 1468 1469 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1470 .addReg(PPC::X2) 1471 .addExpr(TOCOffsetDeltaExpr) 1472 .addReg(PPC::X12)); 1473 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1474 .addReg(PPC::X2) 1475 .addReg(PPC::X2) 1476 .addReg(PPC::X12)); 1477 } 1478 1479 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1480 OutStreamer->EmitLabel(LocalEntryLabel); 1481 const MCSymbolRefExpr *LocalEntryLabelExp = 1482 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1483 const MCExpr *LocalOffsetExp = 1484 MCBinaryExpr::createSub(LocalEntryLabelExp, 1485 GlobalEntryLabelExp, OutContext); 1486 1487 PPCTargetStreamer *TS = 1488 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1489 1490 if (TS) 1491 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1492 } 1493 } 1494 1495 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1496 /// directive. 1497 /// 1498 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1499 // Only the 64-bit target requires a traceback table. For now, 1500 // we only emit the word of zeroes that GDB requires to find 1501 // the end of the function, and zeroes for the eight-byte 1502 // mandatory fields. 1503 // FIXME: We should fill in the eight-byte mandatory fields as described in 1504 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1505 // currently make use of these fields). 1506 if (Subtarget->isPPC64()) { 1507 OutStreamer->EmitIntValue(0, 4/*size*/); 1508 OutStreamer->EmitIntValue(0, 8/*size*/); 1509 } 1510 } 1511 1512 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1513 static const char *const CPUDirectives[] = { 1514 "", 1515 "ppc", 1516 "ppc440", 1517 "ppc601", 1518 "ppc602", 1519 "ppc603", 1520 "ppc7400", 1521 "ppc750", 1522 "ppc970", 1523 "ppcA2", 1524 "ppce500", 1525 "ppce500mc", 1526 "ppce5500", 1527 "power3", 1528 "power4", 1529 "power5", 1530 "power5x", 1531 "power6", 1532 "power6x", 1533 "power7", 1534 // FIXME: why is power8 missing here? 1535 "ppc64", 1536 "ppc64le", 1537 "power9" 1538 }; 1539 1540 // Get the numerically largest directive. 1541 // FIXME: How should we merge darwin directives? 1542 unsigned Directive = PPC::DIR_NONE; 1543 for (const Function &F : M) { 1544 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1545 unsigned FDir = STI.getDarwinDirective(); 1546 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1547 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1548 Directive = PPC::DIR_970; 1549 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1550 Directive = PPC::DIR_7400; 1551 if (STI.isPPC64() && Directive < PPC::DIR_64) 1552 Directive = PPC::DIR_64; 1553 } 1554 1555 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1556 1557 assert(Directive < array_lengthof(CPUDirectives) && 1558 "CPUDirectives[] might not be up-to-date!"); 1559 PPCTargetStreamer &TStreamer = 1560 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1561 TStreamer.emitMachine(CPUDirectives[Directive]); 1562 1563 // Prime text sections so they are adjacent. This reduces the likelihood a 1564 // large data or debug section causes a branch to exceed 16M limit. 1565 const TargetLoweringObjectFileMachO &TLOFMacho = 1566 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1567 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1568 if (TM.getRelocationModel() == Reloc::PIC_) { 1569 OutStreamer->SwitchSection( 1570 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1571 MachO::S_SYMBOL_STUBS | 1572 MachO::S_ATTR_PURE_INSTRUCTIONS, 1573 32, SectionKind::getText())); 1574 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1575 OutStreamer->SwitchSection( 1576 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1577 MachO::S_SYMBOL_STUBS | 1578 MachO::S_ATTR_PURE_INSTRUCTIONS, 1579 16, SectionKind::getText())); 1580 } 1581 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1582 } 1583 1584 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1585 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1586 1587 // Darwin/PPC always uses mach-o. 1588 const TargetLoweringObjectFileMachO &TLOFMacho = 1589 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1590 if (MMI) { 1591 MachineModuleInfoMachO &MMIMacho = 1592 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1593 1594 if (MAI->doesSupportExceptionHandling()) { 1595 // Add the (possibly multiple) personalities to the set of global values. 1596 // Only referenced functions get into the Personalities list. 1597 for (const Function *Personality : MMI->getPersonalities()) { 1598 if (Personality) { 1599 MCSymbol *NLPSym = 1600 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1601 MachineModuleInfoImpl::StubValueTy &StubSym = 1602 MMIMacho.getGVStubEntry(NLPSym); 1603 StubSym = 1604 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1605 } 1606 } 1607 } 1608 1609 // Output stubs for dynamically-linked functions. 1610 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1611 1612 // Output macho stubs for external and common global variables. 1613 if (!Stubs.empty()) { 1614 // Switch with ".non_lazy_symbol_pointer" directive. 1615 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1616 EmitAlignment(isPPC64 ? Align(8) : Align(4)); 1617 1618 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1619 // L_foo$stub: 1620 OutStreamer->EmitLabel(Stubs[i].first); 1621 // .indirect_symbol _foo 1622 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1623 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1624 MCSA_IndirectSymbol); 1625 1626 if (MCSym.getInt()) 1627 // External to current translation unit. 1628 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1629 else 1630 // Internal to current translation unit. 1631 // 1632 // When we place the LSDA into the TEXT section, the type info 1633 // pointers 1634 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1635 // However, sometimes the types are local to the file. So we need to 1636 // fill in the value for the NLP in those cases. 1637 OutStreamer->EmitValue( 1638 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1639 isPPC64 ? 8 : 4 /*size*/); 1640 } 1641 1642 Stubs.clear(); 1643 OutStreamer->AddBlankLine(); 1644 } 1645 } 1646 1647 // Funny Darwin hack: This flag tells the linker that no global symbols 1648 // contain code that falls through to other global symbols (e.g. the obvious 1649 // implementation of multiple entry points). If this doesn't occur, the 1650 // linker can safely perform dead code stripping. Since LLVM never generates 1651 // code that does this, it is always safe to set. 1652 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1653 1654 return AsmPrinter::doFinalization(M); 1655 } 1656 1657 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) { 1658 // Get the function descriptor symbol. 1659 CurrentFnDescSym = getSymbol(&MF.getFunction()); 1660 // Set the containing csect. 1661 MCSectionXCOFF *FnDescSec = OutStreamer->getContext().getXCOFFSection( 1662 CurrentFnDescSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD, 1663 XCOFF::C_HIDEXT, SectionKind::getData()); 1664 cast<MCSymbolXCOFF>(CurrentFnDescSym)->setContainingCsect(FnDescSec); 1665 1666 return AsmPrinter::SetupMachineFunction(MF); 1667 } 1668 1669 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { 1670 // Early error checking limiting what is supported. 1671 if (GV->isThreadLocal()) 1672 report_fatal_error("Thread local not yet supported on AIX."); 1673 1674 if (GV->hasSection()) 1675 report_fatal_error("Custom section for Data not yet supported."); 1676 1677 if (GV->hasComdat()) 1678 report_fatal_error("COMDAT not yet supported by AIX."); 1679 1680 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1681 if (!GVKind.isCommon() && !GVKind.isBSSLocal() && !GVKind.isData()) 1682 report_fatal_error("Encountered a global variable kind that is " 1683 "not supported yet."); 1684 1685 // Create the containing csect and switch to it. 1686 MCSectionXCOFF *CSect = cast<MCSectionXCOFF>( 1687 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1688 OutStreamer->SwitchSection(CSect); 1689 1690 // Create the symbol, set its storage class, and emit it. 1691 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 1692 GVSym->setStorageClass( 1693 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 1694 GVSym->setContainingCsect(CSect); 1695 1696 const DataLayout &DL = GV->getParent()->getDataLayout(); 1697 1698 // Handle common symbols. 1699 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1700 unsigned Align = 1701 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV); 1702 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType()); 1703 1704 if (GVKind.isBSSLocal()) 1705 OutStreamer->EmitXCOFFLocalCommonSymbol(GVSym, Size, Align); 1706 else 1707 OutStreamer->EmitCommonSymbol(GVSym, Size, Align); 1708 return; 1709 } 1710 1711 MCSymbol *EmittedInitSym = GVSym; 1712 EmitLinkage(GV, EmittedInitSym); 1713 EmitAlignment(getGVAlignment(GV, DL), GV); 1714 OutStreamer->EmitLabel(EmittedInitSym); 1715 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 1716 } 1717 1718 void PPCAIXAsmPrinter::EmitFunctionDescriptor() { 1719 const DataLayout &DL = getDataLayout(); 1720 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4; 1721 1722 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1723 // Emit function descriptor. 1724 OutStreamer->SwitchSection( 1725 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getContainingCsect()); 1726 OutStreamer->EmitLabel(CurrentFnDescSym); 1727 // Emit function entry point address. 1728 OutStreamer->EmitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext), 1729 PointerSize); 1730 // Emit TOC base address. 1731 MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]")); 1732 OutStreamer->EmitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext), 1733 PointerSize); 1734 // Emit a null environment pointer. 1735 OutStreamer->EmitIntValue(0, PointerSize); 1736 1737 OutStreamer->SwitchSection(Current.first, Current.second); 1738 } 1739 1740 void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) { 1741 // If there are no functions in this module, we will never need to reference 1742 // the TOC base. 1743 if (M.empty()) 1744 return; 1745 1746 // Emit TOC base. 1747 MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]")); 1748 MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection( 1749 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1750 SectionKind::getData()); 1751 cast<MCSymbolXCOFF>(TOCBaseSym)->setContainingCsect(TOCBaseSection); 1752 // Switch to section to emit TOC base. 1753 OutStreamer->SwitchSection(TOCBaseSection); 1754 } 1755 1756 1757 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1758 /// for a MachineFunction to the given output stream, in a format that the 1759 /// Darwin assembler can deal with. 1760 /// 1761 static AsmPrinter * 1762 createPPCAsmPrinterPass(TargetMachine &tm, 1763 std::unique_ptr<MCStreamer> &&Streamer) { 1764 if (tm.getTargetTriple().isMacOSX()) 1765 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1766 if (tm.getTargetTriple().isOSAIX()) 1767 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1768 1769 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1770 } 1771 1772 // Force static initialization. 1773 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1774 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1775 createPPCAsmPrinterPass); 1776 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1777 createPPCAsmPrinterPass); 1778 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1779 createPPCAsmPrinterPass); 1780 } 1781