1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "InstPrinter/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "llvm/ADT/MapVector.h" 29 #include "llvm/ADT/StringRef.h" 30 #include "llvm/ADT/Triple.h" 31 #include "llvm/ADT/Twine.h" 32 #include "llvm/BinaryFormat/ELF.h" 33 #include "llvm/BinaryFormat/MachO.h" 34 #include "llvm/CodeGen/AsmPrinter.h" 35 #include "llvm/CodeGen/MachineBasicBlock.h" 36 #include "llvm/CodeGen/MachineFunction.h" 37 #include "llvm/CodeGen/MachineInstr.h" 38 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 39 #include "llvm/CodeGen/MachineOperand.h" 40 #include "llvm/CodeGen/MachineRegisterInfo.h" 41 #include "llvm/CodeGen/StackMaps.h" 42 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 43 #include "llvm/IR/DataLayout.h" 44 #include "llvm/IR/GlobalValue.h" 45 #include "llvm/IR/Module.h" 46 #include "llvm/MC/MCAsmInfo.h" 47 #include "llvm/MC/MCContext.h" 48 #include "llvm/MC/MCExpr.h" 49 #include "llvm/MC/MCInst.h" 50 #include "llvm/MC/MCInstBuilder.h" 51 #include "llvm/MC/MCSectionELF.h" 52 #include "llvm/MC/MCSectionMachO.h" 53 #include "llvm/MC/MCStreamer.h" 54 #include "llvm/MC/MCSymbol.h" 55 #include "llvm/MC/MCSymbolELF.h" 56 #include "llvm/MC/SectionKind.h" 57 #include "llvm/Support/Casting.h" 58 #include "llvm/Support/CodeGen.h" 59 #include "llvm/Support/Debug.h" 60 #include "llvm/Support/ErrorHandling.h" 61 #include "llvm/Support/TargetRegistry.h" 62 #include "llvm/Support/raw_ostream.h" 63 #include "llvm/Target/TargetMachine.h" 64 #include <algorithm> 65 #include <cassert> 66 #include <cstdint> 67 #include <memory> 68 #include <new> 69 70 using namespace llvm; 71 72 #define DEBUG_TYPE "asmprinter" 73 74 namespace { 75 76 class PPCAsmPrinter : public AsmPrinter { 77 protected: 78 MapVector<MCSymbol *, MCSymbol *> TOC; 79 const PPCSubtarget *Subtarget; 80 StackMaps SM; 81 82 public: 83 explicit PPCAsmPrinter(TargetMachine &TM, 84 std::unique_ptr<MCStreamer> Streamer) 85 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 86 87 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 88 89 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 90 91 bool doInitialization(Module &M) override { 92 if (!TOC.empty()) 93 TOC.clear(); 94 return AsmPrinter::doInitialization(M); 95 } 96 97 void EmitInstruction(const MachineInstr *MI) override; 98 99 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 100 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 101 /// The \p MI would be INLINEASM ONLY. 102 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 103 104 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 105 unsigned AsmVariant, const char *ExtraCode, 106 raw_ostream &O) override; 107 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 108 unsigned AsmVariant, const char *ExtraCode, 109 raw_ostream &O) override; 110 111 void EmitEndOfAsmFile(Module &M) override; 112 113 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 114 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 115 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 116 bool runOnMachineFunction(MachineFunction &MF) override { 117 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 118 bool Changed = AsmPrinter::runOnMachineFunction(MF); 119 emitXRayTable(); 120 return Changed; 121 } 122 }; 123 124 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 125 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 126 public: 127 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 128 std::unique_ptr<MCStreamer> Streamer) 129 : PPCAsmPrinter(TM, std::move(Streamer)) {} 130 131 StringRef getPassName() const override { 132 return "Linux PPC Assembly Printer"; 133 } 134 135 bool doFinalization(Module &M) override; 136 void EmitStartOfAsmFile(Module &M) override; 137 138 void EmitFunctionEntryLabel() override; 139 140 void EmitFunctionBodyStart() override; 141 void EmitFunctionBodyEnd() override; 142 void EmitInstruction(const MachineInstr *MI) override; 143 }; 144 145 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 146 /// OS X 147 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 148 public: 149 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 150 std::unique_ptr<MCStreamer> Streamer) 151 : PPCAsmPrinter(TM, std::move(Streamer)) {} 152 153 StringRef getPassName() const override { 154 return "Darwin PPC Assembly Printer"; 155 } 156 157 bool doFinalization(Module &M) override; 158 void EmitStartOfAsmFile(Module &M) override; 159 }; 160 161 } // end anonymous namespace 162 163 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 164 raw_ostream &O) { 165 const DataLayout &DL = getDataLayout(); 166 const MachineOperand &MO = MI->getOperand(OpNo); 167 168 switch (MO.getType()) { 169 case MachineOperand::MO_Register: { 170 // The MI is INLINEASM ONLY and UseVSXReg is always false. 171 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 172 173 // Linux assembler (Others?) does not take register mnemonics. 174 // FIXME - What about special registers used in mfspr/mtspr? 175 if (!Subtarget->isDarwin()) 176 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 177 O << RegName; 178 return; 179 } 180 case MachineOperand::MO_Immediate: 181 O << MO.getImm(); 182 return; 183 184 case MachineOperand::MO_MachineBasicBlock: 185 MO.getMBB()->getSymbol()->print(O, MAI); 186 return; 187 case MachineOperand::MO_ConstantPoolIndex: 188 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 189 << MO.getIndex(); 190 return; 191 case MachineOperand::MO_BlockAddress: 192 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 193 return; 194 case MachineOperand::MO_GlobalAddress: { 195 // Computing the address of a global symbol, not calling it. 196 const GlobalValue *GV = MO.getGlobal(); 197 MCSymbol *SymToPrint; 198 199 // External or weakly linked global variables need non-lazily-resolved stubs 200 if (Subtarget->hasLazyResolverStub(GV)) { 201 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 202 MachineModuleInfoImpl::StubValueTy &StubSym = 203 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 204 SymToPrint); 205 if (!StubSym.getPointer()) 206 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 207 !GV->hasInternalLinkage()); 208 } else { 209 SymToPrint = getSymbol(GV); 210 } 211 212 SymToPrint->print(O, MAI); 213 214 printOffset(MO.getOffset(), O); 215 return; 216 } 217 218 default: 219 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 220 return; 221 } 222 } 223 224 /// PrintAsmOperand - Print out an operand for an inline asm expression. 225 /// 226 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 227 unsigned AsmVariant, 228 const char *ExtraCode, raw_ostream &O) { 229 // Does this asm operand have a single letter operand modifier? 230 if (ExtraCode && ExtraCode[0]) { 231 if (ExtraCode[1] != 0) return true; // Unknown modifier. 232 233 switch (ExtraCode[0]) { 234 default: 235 // See if this is a generic print operand 236 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 237 case 'c': // Don't print "$" before a global var name or constant. 238 break; // PPC never has a prefix. 239 case 'L': // Write second word of DImode reference. 240 // Verify that this operand has two consecutive registers. 241 if (!MI->getOperand(OpNo).isReg() || 242 OpNo+1 == MI->getNumOperands() || 243 !MI->getOperand(OpNo+1).isReg()) 244 return true; 245 ++OpNo; // Return the high-part. 246 break; 247 case 'I': 248 // Write 'i' if an integer constant, otherwise nothing. Used to print 249 // addi vs add, etc. 250 if (MI->getOperand(OpNo).isImm()) 251 O << "i"; 252 return false; 253 case 'x': 254 if(!MI->getOperand(OpNo).isReg()) 255 return true; 256 // This operand uses VSX numbering. 257 // If the operand is a VMX register, convert it to a VSX register. 258 unsigned Reg = MI->getOperand(OpNo).getReg(); 259 if (PPCInstrInfo::isVRRegister(Reg)) 260 Reg = PPC::VSX32 + (Reg - PPC::V0); 261 else if (PPCInstrInfo::isVFRegister(Reg)) 262 Reg = PPC::VSX32 + (Reg - PPC::VF0); 263 const char *RegName; 264 RegName = PPCInstPrinter::getRegisterName(Reg); 265 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 266 O << RegName; 267 return false; 268 } 269 } 270 271 printOperand(MI, OpNo, O); 272 return false; 273 } 274 275 // At the moment, all inline asm memory operands are a single register. 276 // In any case, the output of this routine should always be just one 277 // assembler operand. 278 279 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 280 unsigned AsmVariant, 281 const char *ExtraCode, 282 raw_ostream &O) { 283 if (ExtraCode && ExtraCode[0]) { 284 if (ExtraCode[1] != 0) return true; // Unknown modifier. 285 286 switch (ExtraCode[0]) { 287 default: return true; // Unknown modifier. 288 case 'y': // A memory reference for an X-form instruction 289 { 290 const char *RegName = "r0"; 291 if (!Subtarget->isDarwin()) 292 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 293 O << RegName << ", "; 294 printOperand(MI, OpNo, O); 295 return false; 296 } 297 case 'U': // Print 'u' for update form. 298 case 'X': // Print 'x' for indexed form. 299 { 300 // FIXME: Currently for PowerPC memory operands are always loaded 301 // into a register, so we never get an update or indexed form. 302 // This is bad even for offset forms, since even if we know we 303 // have a value in -16(r1), we will generate a load into r<n> 304 // and then load from 0(r<n>). Until that issue is fixed, 305 // tolerate 'U' and 'X' but don't output anything. 306 assert(MI->getOperand(OpNo).isReg()); 307 return false; 308 } 309 } 310 } 311 312 assert(MI->getOperand(OpNo).isReg()); 313 O << "0("; 314 printOperand(MI, OpNo, O); 315 O << ")"; 316 return false; 317 } 318 319 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 320 /// exists for it. If not, create one. Then return a symbol that references 321 /// the TOC entry. 322 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 323 MCSymbol *&TOCEntry = TOC[Sym]; 324 if (!TOCEntry) 325 TOCEntry = createTempSymbol("C"); 326 return TOCEntry; 327 } 328 329 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 330 emitStackMaps(SM); 331 } 332 333 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 334 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 335 336 SM.recordStackMap(MI); 337 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 338 339 // Scan ahead to trim the shadow. 340 const MachineBasicBlock &MBB = *MI.getParent(); 341 MachineBasicBlock::const_iterator MII(MI); 342 ++MII; 343 while (NumNOPBytes > 0) { 344 if (MII == MBB.end() || MII->isCall() || 345 MII->getOpcode() == PPC::DBG_VALUE || 346 MII->getOpcode() == TargetOpcode::PATCHPOINT || 347 MII->getOpcode() == TargetOpcode::STACKMAP) 348 break; 349 ++MII; 350 NumNOPBytes -= 4; 351 } 352 353 // Emit nops. 354 for (unsigned i = 0; i < NumNOPBytes; i += 4) 355 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 356 } 357 358 // Lower a patchpoint of the form: 359 // [<def>], <id>, <numBytes>, <target>, <numArgs> 360 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 361 SM.recordPatchPoint(MI); 362 PatchPointOpers Opers(&MI); 363 364 unsigned EncodedBytes = 0; 365 const MachineOperand &CalleeMO = Opers.getCallTarget(); 366 367 if (CalleeMO.isImm()) { 368 int64_t CallTarget = CalleeMO.getImm(); 369 if (CallTarget) { 370 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 371 "High 16 bits of call target should be zero."); 372 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 373 EncodedBytes = 0; 374 // Materialize the jump address: 375 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 376 .addReg(ScratchReg) 377 .addImm((CallTarget >> 32) & 0xFFFF)); 378 ++EncodedBytes; 379 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 380 .addReg(ScratchReg) 381 .addReg(ScratchReg) 382 .addImm(32).addImm(16)); 383 ++EncodedBytes; 384 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 385 .addReg(ScratchReg) 386 .addReg(ScratchReg) 387 .addImm((CallTarget >> 16) & 0xFFFF)); 388 ++EncodedBytes; 389 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 390 .addReg(ScratchReg) 391 .addReg(ScratchReg) 392 .addImm(CallTarget & 0xFFFF)); 393 394 // Save the current TOC pointer before the remote call. 395 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 396 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 397 .addReg(PPC::X2) 398 .addImm(TOCSaveOffset) 399 .addReg(PPC::X1)); 400 ++EncodedBytes; 401 402 // If we're on ELFv1, then we need to load the actual function pointer 403 // from the function descriptor. 404 if (!Subtarget->isELFv2ABI()) { 405 // Load the new TOC pointer and the function address, but not r11 406 // (needing this is rare, and loading it here would prevent passing it 407 // via a 'nest' parameter. 408 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 409 .addReg(PPC::X2) 410 .addImm(8) 411 .addReg(ScratchReg)); 412 ++EncodedBytes; 413 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 414 .addReg(ScratchReg) 415 .addImm(0) 416 .addReg(ScratchReg)); 417 ++EncodedBytes; 418 } 419 420 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 421 .addReg(ScratchReg)); 422 ++EncodedBytes; 423 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 424 ++EncodedBytes; 425 426 // Restore the TOC pointer after the call. 427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 428 .addReg(PPC::X2) 429 .addImm(TOCSaveOffset) 430 .addReg(PPC::X1)); 431 ++EncodedBytes; 432 } 433 } else if (CalleeMO.isGlobal()) { 434 const GlobalValue *GValue = CalleeMO.getGlobal(); 435 MCSymbol *MOSymbol = getSymbol(GValue); 436 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 437 438 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 439 .addExpr(SymVar)); 440 EncodedBytes += 2; 441 } 442 443 // Each instruction is 4 bytes. 444 EncodedBytes *= 4; 445 446 // Emit padding. 447 unsigned NumBytes = Opers.getNumPatchBytes(); 448 assert(NumBytes >= EncodedBytes && 449 "Patchpoint can't request size less than the length of a call."); 450 assert((NumBytes - EncodedBytes) % 4 == 0 && 451 "Invalid number of NOP bytes requested!"); 452 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 453 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 454 } 455 456 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 457 /// call to __tls_get_addr to the current output stream. 458 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 459 MCSymbolRefExpr::VariantKind VK) { 460 StringRef Name = "__tls_get_addr"; 461 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 462 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 463 464 assert(MI->getOperand(0).isReg() && 465 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 466 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 467 "GETtls[ld]ADDR[32] must define GPR3"); 468 assert(MI->getOperand(1).isReg() && 469 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 470 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 471 "GETtls[ld]ADDR[32] must read GPR3"); 472 473 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 474 isPositionIndependent()) 475 Kind = MCSymbolRefExpr::VK_PLT; 476 const MCExpr *TlsRef = 477 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 478 479 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 480 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt()) 481 TlsRef = MCBinaryExpr::createAdd(TlsRef, 482 MCConstantExpr::create(32768, OutContext), 483 OutContext); 484 const MachineOperand &MO = MI->getOperand(2); 485 const GlobalValue *GValue = MO.getGlobal(); 486 MCSymbol *MOSymbol = getSymbol(GValue); 487 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 488 EmitToStreamer(*OutStreamer, 489 MCInstBuilder(Subtarget->isPPC64() ? 490 PPC::BL8_NOP_TLS : PPC::BL_TLS) 491 .addExpr(TlsRef) 492 .addExpr(SymVar)); 493 } 494 495 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 496 /// the current output stream. 497 /// 498 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 499 MCInst TmpInst; 500 bool isPPC64 = Subtarget->isPPC64(); 501 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 502 const Module *M = MF->getFunction().getParent(); 503 PICLevel::Level PL = M->getPICLevel(); 504 505 #ifndef NDEBUG 506 // Validate that SPE and FPU are mutually exclusive in codegen 507 if (!MI->isInlineAsm()) { 508 for (const MachineOperand &MO: MI->operands()) { 509 if (MO.isReg()) { 510 unsigned Reg = MO.getReg(); 511 if (Subtarget->hasSPE()) { 512 if (PPC::F4RCRegClass.contains(Reg) || 513 PPC::F8RCRegClass.contains(Reg) || 514 PPC::QBRCRegClass.contains(Reg) || 515 PPC::QFRCRegClass.contains(Reg) || 516 PPC::QSRCRegClass.contains(Reg) || 517 PPC::VFRCRegClass.contains(Reg) || 518 PPC::VRRCRegClass.contains(Reg) || 519 PPC::VSFRCRegClass.contains(Reg) || 520 PPC::VSSRCRegClass.contains(Reg) 521 ) 522 llvm_unreachable("SPE targets cannot have FPRegs!"); 523 } else { 524 if (PPC::SPERCRegClass.contains(Reg)) 525 llvm_unreachable("SPE register found in FPU-targeted code!"); 526 } 527 } 528 } 529 } 530 #endif 531 // Lower multi-instruction pseudo operations. 532 switch (MI->getOpcode()) { 533 default: break; 534 case TargetOpcode::DBG_VALUE: 535 llvm_unreachable("Should be handled target independently"); 536 case TargetOpcode::STACKMAP: 537 return LowerSTACKMAP(SM, *MI); 538 case TargetOpcode::PATCHPOINT: 539 return LowerPATCHPOINT(SM, *MI); 540 541 case PPC::MoveGOTtoLR: { 542 // Transform %lr = MoveGOTtoLR 543 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 544 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 545 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 546 // blrl 547 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 548 MCSymbol *GOTSymbol = 549 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 550 const MCExpr *OffsExpr = 551 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 552 MCSymbolRefExpr::VK_PPC_LOCAL, 553 OutContext), 554 MCConstantExpr::create(4, OutContext), 555 OutContext); 556 557 // Emit the 'bl'. 558 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 559 return; 560 } 561 case PPC::MovePCtoLR: 562 case PPC::MovePCtoLR8: { 563 // Transform %lr = MovePCtoLR 564 // Into this, where the label is the PIC base: 565 // bl L1$pb 566 // L1$pb: 567 MCSymbol *PICBase = MF->getPICBaseSymbol(); 568 569 // Emit the 'bl'. 570 EmitToStreamer(*OutStreamer, 571 MCInstBuilder(PPC::BL) 572 // FIXME: We would like an efficient form for this, so we 573 // don't have to do a lot of extra uniquing. 574 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 575 576 // Emit the label. 577 OutStreamer->EmitLabel(PICBase); 578 return; 579 } 580 case PPC::UpdateGBR: { 581 // Transform %rd = UpdateGBR(%rt, %ri) 582 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 583 // add %rd, %rt, %ri 584 // or into (if secure plt mode is on): 585 // addis r30, r30, .LTOC - .L0$pb@ha 586 // addi r30, r30, .LTOC - .L0$pb@l 587 // Get the offset from the GOT Base Register to the GOT 588 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 589 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 590 unsigned PICR = TmpInst.getOperand(0).getReg(); 591 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 592 const MCExpr *PB = 593 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 594 OutContext); 595 596 const MCExpr *LTOCDeltaExpr = 597 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 598 PB, OutContext); 599 600 const MCExpr *LTOCDeltaHi = 601 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 602 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 603 .addReg(PICR) 604 .addReg(PICR) 605 .addExpr(LTOCDeltaHi)); 606 607 const MCExpr *LTOCDeltaLo = 608 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 609 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 610 .addReg(PICR) 611 .addReg(PICR) 612 .addExpr(LTOCDeltaLo)); 613 return; 614 } else { 615 MCSymbol *PICOffset = 616 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 617 TmpInst.setOpcode(PPC::LWZ); 618 const MCExpr *Exp = 619 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 620 const MCExpr *PB = 621 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 622 MCSymbolRefExpr::VK_None, 623 OutContext); 624 const MCOperand TR = TmpInst.getOperand(1); 625 const MCOperand PICR = TmpInst.getOperand(0); 626 627 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 628 TmpInst.getOperand(1) = 629 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 630 TmpInst.getOperand(0) = TR; 631 TmpInst.getOperand(2) = PICR; 632 EmitToStreamer(*OutStreamer, TmpInst); 633 634 TmpInst.setOpcode(PPC::ADD4); 635 TmpInst.getOperand(0) = PICR; 636 TmpInst.getOperand(1) = TR; 637 TmpInst.getOperand(2) = PICR; 638 EmitToStreamer(*OutStreamer, TmpInst); 639 return; 640 } 641 } 642 case PPC::LWZtoc: { 643 // Transform %r3 = LWZtoc @min1, %r2 644 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 645 646 // Change the opcode to LWZ, and the global address operand to be a 647 // reference to the GOT entry we will synthesize later. 648 TmpInst.setOpcode(PPC::LWZ); 649 const MachineOperand &MO = MI->getOperand(1); 650 651 // Map symbol -> label of TOC entry 652 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 653 MCSymbol *MOSymbol = nullptr; 654 if (MO.isGlobal()) 655 MOSymbol = getSymbol(MO.getGlobal()); 656 else if (MO.isCPI()) 657 MOSymbol = GetCPISymbol(MO.getIndex()); 658 else if (MO.isJTI()) 659 MOSymbol = GetJTISymbol(MO.getIndex()); 660 else if (MO.isBlockAddress()) 661 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 662 663 if (PL == PICLevel::SmallPIC) { 664 const MCExpr *Exp = 665 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 666 OutContext); 667 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 668 } else { 669 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 670 671 const MCExpr *Exp = 672 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 673 OutContext); 674 const MCExpr *PB = 675 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 676 OutContext); 677 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 678 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 679 } 680 EmitToStreamer(*OutStreamer, TmpInst); 681 return; 682 } 683 case PPC::LDtocJTI: 684 case PPC::LDtocCPT: 685 case PPC::LDtocBA: 686 case PPC::LDtoc: { 687 // Transform %x3 = LDtoc @min1, %x2 688 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 689 690 // Change the opcode to LD, and the global address operand to be a 691 // reference to the TOC entry we will synthesize later. 692 TmpInst.setOpcode(PPC::LD); 693 const MachineOperand &MO = MI->getOperand(1); 694 695 // Map symbol -> label of TOC entry 696 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 697 MCSymbol *MOSymbol = nullptr; 698 if (MO.isGlobal()) 699 MOSymbol = getSymbol(MO.getGlobal()); 700 else if (MO.isCPI()) 701 MOSymbol = GetCPISymbol(MO.getIndex()); 702 else if (MO.isJTI()) 703 MOSymbol = GetJTISymbol(MO.getIndex()); 704 else if (MO.isBlockAddress()) 705 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 706 707 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 708 709 const MCExpr *Exp = 710 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 711 OutContext); 712 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 713 EmitToStreamer(*OutStreamer, TmpInst); 714 return; 715 } 716 717 case PPC::ADDIStocHA: { 718 // Transform %xd = ADDIStocHA %x2, @sym 719 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 720 721 // Change the opcode to ADDIS8. If the global address is external, has 722 // common linkage, is a non-local function address, or is a jump table 723 // address, then generate a TOC entry and reference that. Otherwise 724 // reference the symbol directly. 725 TmpInst.setOpcode(PPC::ADDIS8); 726 const MachineOperand &MO = MI->getOperand(2); 727 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 728 MO.isBlockAddress()) && 729 "Invalid operand for ADDIStocHA!"); 730 MCSymbol *MOSymbol = nullptr; 731 bool GlobalToc = false; 732 733 if (MO.isGlobal()) { 734 const GlobalValue *GV = MO.getGlobal(); 735 MOSymbol = getSymbol(GV); 736 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 737 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 738 } else if (MO.isCPI()) { 739 MOSymbol = GetCPISymbol(MO.getIndex()); 740 } else if (MO.isJTI()) { 741 MOSymbol = GetJTISymbol(MO.getIndex()); 742 } else if (MO.isBlockAddress()) { 743 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 744 } 745 746 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 747 TM.getCodeModel() == CodeModel::Large) 748 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 749 750 const MCExpr *Exp = 751 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 752 OutContext); 753 754 if (!MO.isJTI() && MO.getOffset()) 755 Exp = MCBinaryExpr::createAdd(Exp, 756 MCConstantExpr::create(MO.getOffset(), 757 OutContext), 758 OutContext); 759 760 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 761 EmitToStreamer(*OutStreamer, TmpInst); 762 return; 763 } 764 case PPC::LDtocL: { 765 // Transform %xd = LDtocL @sym, %xs 766 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 767 768 // Change the opcode to LD. If the global address is external, has 769 // common linkage, or is a jump table address, then reference the 770 // associated TOC entry. Otherwise reference the symbol directly. 771 TmpInst.setOpcode(PPC::LD); 772 const MachineOperand &MO = MI->getOperand(1); 773 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 774 MO.isBlockAddress()) && 775 "Invalid operand for LDtocL!"); 776 MCSymbol *MOSymbol = nullptr; 777 778 if (MO.isJTI()) 779 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 780 else if (MO.isBlockAddress()) { 781 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 782 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 783 } 784 else if (MO.isCPI()) { 785 MOSymbol = GetCPISymbol(MO.getIndex()); 786 if (TM.getCodeModel() == CodeModel::Large) 787 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 788 } 789 else if (MO.isGlobal()) { 790 const GlobalValue *GV = MO.getGlobal(); 791 MOSymbol = getSymbol(GV); 792 LLVM_DEBUG( 793 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 794 assert((GVFlags & PPCII::MO_NLP_FLAG) && 795 "LDtocL used on symbol that could be accessed directly is " 796 "invalid. Must match ADDIStocHA.")); 797 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 798 } 799 800 const MCExpr *Exp = 801 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 802 OutContext); 803 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 804 EmitToStreamer(*OutStreamer, TmpInst); 805 return; 806 } 807 case PPC::ADDItocL: { 808 // Transform %xd = ADDItocL %xs, @sym 809 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 810 811 // Change the opcode to ADDI8. If the global address is external, then 812 // generate a TOC entry and reference that. Otherwise reference the 813 // symbol directly. 814 TmpInst.setOpcode(PPC::ADDI8); 815 const MachineOperand &MO = MI->getOperand(2); 816 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 817 MCSymbol *MOSymbol = nullptr; 818 819 if (MO.isGlobal()) { 820 const GlobalValue *GV = MO.getGlobal(); 821 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 822 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 823 "Interposable definitions must use indirect access.")); 824 MOSymbol = getSymbol(GV); 825 } else if (MO.isCPI()) { 826 MOSymbol = GetCPISymbol(MO.getIndex()); 827 } 828 829 const MCExpr *Exp = 830 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 831 OutContext); 832 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 833 EmitToStreamer(*OutStreamer, TmpInst); 834 return; 835 } 836 case PPC::ADDISgotTprelHA: { 837 // Transform: %xd = ADDISgotTprelHA %x2, @sym 838 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 839 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 840 const MachineOperand &MO = MI->getOperand(2); 841 const GlobalValue *GValue = MO.getGlobal(); 842 MCSymbol *MOSymbol = getSymbol(GValue); 843 const MCExpr *SymGotTprel = 844 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 845 OutContext); 846 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 847 .addReg(MI->getOperand(0).getReg()) 848 .addReg(MI->getOperand(1).getReg()) 849 .addExpr(SymGotTprel)); 850 return; 851 } 852 case PPC::LDgotTprelL: 853 case PPC::LDgotTprelL32: { 854 // Transform %xd = LDgotTprelL @sym, %xs 855 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 856 857 // Change the opcode to LD. 858 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 859 const MachineOperand &MO = MI->getOperand(1); 860 const GlobalValue *GValue = MO.getGlobal(); 861 MCSymbol *MOSymbol = getSymbol(GValue); 862 const MCExpr *Exp = 863 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 864 OutContext); 865 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 866 EmitToStreamer(*OutStreamer, TmpInst); 867 return; 868 } 869 870 case PPC::PPC32PICGOT: { 871 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 872 MCSymbol *GOTRef = OutContext.createTempSymbol(); 873 MCSymbol *NextInstr = OutContext.createTempSymbol(); 874 875 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 876 // FIXME: We would like an efficient form for this, so we don't have to do 877 // a lot of extra uniquing. 878 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 879 const MCExpr *OffsExpr = 880 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 881 MCSymbolRefExpr::create(GOTRef, OutContext), 882 OutContext); 883 OutStreamer->EmitLabel(GOTRef); 884 OutStreamer->EmitValue(OffsExpr, 4); 885 OutStreamer->EmitLabel(NextInstr); 886 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 887 .addReg(MI->getOperand(0).getReg())); 888 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 889 .addReg(MI->getOperand(1).getReg()) 890 .addImm(0) 891 .addReg(MI->getOperand(0).getReg())); 892 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 893 .addReg(MI->getOperand(0).getReg()) 894 .addReg(MI->getOperand(1).getReg()) 895 .addReg(MI->getOperand(0).getReg())); 896 return; 897 } 898 case PPC::PPC32GOT: { 899 MCSymbol *GOTSymbol = 900 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 901 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 902 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 903 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 904 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 905 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 906 .addReg(MI->getOperand(0).getReg()) 907 .addExpr(SymGotTlsL)); 908 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 909 .addReg(MI->getOperand(0).getReg()) 910 .addReg(MI->getOperand(0).getReg()) 911 .addExpr(SymGotTlsHA)); 912 return; 913 } 914 case PPC::ADDIStlsgdHA: { 915 // Transform: %xd = ADDIStlsgdHA %x2, @sym 916 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 917 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 918 const MachineOperand &MO = MI->getOperand(2); 919 const GlobalValue *GValue = MO.getGlobal(); 920 MCSymbol *MOSymbol = getSymbol(GValue); 921 const MCExpr *SymGotTlsGD = 922 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 923 OutContext); 924 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 925 .addReg(MI->getOperand(0).getReg()) 926 .addReg(MI->getOperand(1).getReg()) 927 .addExpr(SymGotTlsGD)); 928 return; 929 } 930 case PPC::ADDItlsgdL: 931 // Transform: %xd = ADDItlsgdL %xs, @sym 932 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 933 case PPC::ADDItlsgdL32: { 934 // Transform: %rd = ADDItlsgdL32 %rs, @sym 935 // Into: %rd = ADDI %rs, sym@got@tlsgd 936 const MachineOperand &MO = MI->getOperand(2); 937 const GlobalValue *GValue = MO.getGlobal(); 938 MCSymbol *MOSymbol = getSymbol(GValue); 939 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 940 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 941 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 942 OutContext); 943 EmitToStreamer(*OutStreamer, 944 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 945 .addReg(MI->getOperand(0).getReg()) 946 .addReg(MI->getOperand(1).getReg()) 947 .addExpr(SymGotTlsGD)); 948 return; 949 } 950 case PPC::GETtlsADDR: 951 // Transform: %x3 = GETtlsADDR %x3, @sym 952 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 953 case PPC::GETtlsADDR32: { 954 // Transform: %r3 = GETtlsADDR32 %r3, @sym 955 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 956 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 957 return; 958 } 959 case PPC::ADDIStlsldHA: { 960 // Transform: %xd = ADDIStlsldHA %x2, @sym 961 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 962 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 963 const MachineOperand &MO = MI->getOperand(2); 964 const GlobalValue *GValue = MO.getGlobal(); 965 MCSymbol *MOSymbol = getSymbol(GValue); 966 const MCExpr *SymGotTlsLD = 967 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 968 OutContext); 969 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 970 .addReg(MI->getOperand(0).getReg()) 971 .addReg(MI->getOperand(1).getReg()) 972 .addExpr(SymGotTlsLD)); 973 return; 974 } 975 case PPC::ADDItlsldL: 976 // Transform: %xd = ADDItlsldL %xs, @sym 977 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 978 case PPC::ADDItlsldL32: { 979 // Transform: %rd = ADDItlsldL32 %rs, @sym 980 // Into: %rd = ADDI %rs, sym@got@tlsld 981 const MachineOperand &MO = MI->getOperand(2); 982 const GlobalValue *GValue = MO.getGlobal(); 983 MCSymbol *MOSymbol = getSymbol(GValue); 984 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 985 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 986 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 987 OutContext); 988 EmitToStreamer(*OutStreamer, 989 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 990 .addReg(MI->getOperand(0).getReg()) 991 .addReg(MI->getOperand(1).getReg()) 992 .addExpr(SymGotTlsLD)); 993 return; 994 } 995 case PPC::GETtlsldADDR: 996 // Transform: %x3 = GETtlsldADDR %x3, @sym 997 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 998 case PPC::GETtlsldADDR32: { 999 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1000 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1001 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1002 return; 1003 } 1004 case PPC::ADDISdtprelHA: 1005 // Transform: %xd = ADDISdtprelHA %xs, @sym 1006 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1007 case PPC::ADDISdtprelHA32: { 1008 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1009 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1010 const MachineOperand &MO = MI->getOperand(2); 1011 const GlobalValue *GValue = MO.getGlobal(); 1012 MCSymbol *MOSymbol = getSymbol(GValue); 1013 const MCExpr *SymDtprel = 1014 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1015 OutContext); 1016 EmitToStreamer( 1017 *OutStreamer, 1018 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1019 .addReg(MI->getOperand(0).getReg()) 1020 .addReg(MI->getOperand(1).getReg()) 1021 .addExpr(SymDtprel)); 1022 return; 1023 } 1024 case PPC::ADDIdtprelL: 1025 // Transform: %xd = ADDIdtprelL %xs, @sym 1026 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1027 case PPC::ADDIdtprelL32: { 1028 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1029 // Into: %rd = ADDI %rs, sym@dtprel@l 1030 const MachineOperand &MO = MI->getOperand(2); 1031 const GlobalValue *GValue = MO.getGlobal(); 1032 MCSymbol *MOSymbol = getSymbol(GValue); 1033 const MCExpr *SymDtprel = 1034 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1035 OutContext); 1036 EmitToStreamer(*OutStreamer, 1037 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1038 .addReg(MI->getOperand(0).getReg()) 1039 .addReg(MI->getOperand(1).getReg()) 1040 .addExpr(SymDtprel)); 1041 return; 1042 } 1043 case PPC::MFOCRF: 1044 case PPC::MFOCRF8: 1045 if (!Subtarget->hasMFOCRF()) { 1046 // Transform: %r3 = MFOCRF %cr7 1047 // Into: %r3 = MFCR ;; cr7 1048 unsigned NewOpcode = 1049 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1050 OutStreamer->AddComment(PPCInstPrinter:: 1051 getRegisterName(MI->getOperand(1).getReg())); 1052 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1053 .addReg(MI->getOperand(0).getReg())); 1054 return; 1055 } 1056 break; 1057 case PPC::MTOCRF: 1058 case PPC::MTOCRF8: 1059 if (!Subtarget->hasMFOCRF()) { 1060 // Transform: %cr7 = MTOCRF %r3 1061 // Into: MTCRF mask, %r3 ;; cr7 1062 unsigned NewOpcode = 1063 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1064 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1065 ->getEncodingValue(MI->getOperand(0).getReg()); 1066 OutStreamer->AddComment(PPCInstPrinter:: 1067 getRegisterName(MI->getOperand(0).getReg())); 1068 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1069 .addImm(Mask) 1070 .addReg(MI->getOperand(1).getReg())); 1071 return; 1072 } 1073 break; 1074 case PPC::LD: 1075 case PPC::STD: 1076 case PPC::LWA_32: 1077 case PPC::LWA: { 1078 // Verify alignment is legal, so we don't create relocations 1079 // that can't be supported. 1080 // FIXME: This test is currently disabled for Darwin. The test 1081 // suite shows a handful of test cases that fail this check for 1082 // Darwin. Those need to be investigated before this sanity test 1083 // can be enabled for those subtargets. 1084 if (!Subtarget->isDarwin()) { 1085 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1086 const MachineOperand &MO = MI->getOperand(OpNum); 1087 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1088 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1089 } 1090 // Now process the instruction normally. 1091 break; 1092 } 1093 } 1094 1095 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1096 EmitToStreamer(*OutStreamer, TmpInst); 1097 } 1098 1099 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1100 if (!Subtarget->isPPC64()) 1101 return PPCAsmPrinter::EmitInstruction(MI); 1102 1103 switch (MI->getOpcode()) { 1104 default: 1105 return PPCAsmPrinter::EmitInstruction(MI); 1106 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1107 // .begin: 1108 // b .end # lis 0, FuncId[16..32] 1109 // nop # li 0, FuncId[0..15] 1110 // std 0, -8(1) 1111 // mflr 0 1112 // bl __xray_FunctionEntry 1113 // mtlr 0 1114 // .end: 1115 // 1116 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1117 // of instructions change. 1118 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1119 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1120 OutStreamer->EmitLabel(BeginOfSled); 1121 EmitToStreamer(*OutStreamer, 1122 MCInstBuilder(PPC::B).addExpr( 1123 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1124 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1125 EmitToStreamer( 1126 *OutStreamer, 1127 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1128 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1129 EmitToStreamer(*OutStreamer, 1130 MCInstBuilder(PPC::BL8_NOP) 1131 .addExpr(MCSymbolRefExpr::create( 1132 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1133 OutContext))); 1134 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1135 OutStreamer->EmitLabel(EndOfSled); 1136 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1137 break; 1138 } 1139 case TargetOpcode::PATCHABLE_RET: { 1140 unsigned RetOpcode = MI->getOperand(0).getImm(); 1141 MCInst RetInst; 1142 RetInst.setOpcode(RetOpcode); 1143 for (const auto &MO : 1144 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1145 MCOperand MCOp; 1146 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1147 RetInst.addOperand(MCOp); 1148 } 1149 1150 bool IsConditional; 1151 if (RetOpcode == PPC::BCCLR) { 1152 IsConditional = true; 1153 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1154 RetOpcode == PPC::TCRETURNai8) { 1155 break; 1156 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1157 IsConditional = false; 1158 } else { 1159 EmitToStreamer(*OutStreamer, RetInst); 1160 break; 1161 } 1162 1163 MCSymbol *FallthroughLabel; 1164 if (IsConditional) { 1165 // Before: 1166 // bgtlr cr0 1167 // 1168 // After: 1169 // ble cr0, .end 1170 // .p2align 3 1171 // .begin: 1172 // blr # lis 0, FuncId[16..32] 1173 // nop # li 0, FuncId[0..15] 1174 // std 0, -8(1) 1175 // mflr 0 1176 // bl __xray_FunctionExit 1177 // mtlr 0 1178 // blr 1179 // .end: 1180 // 1181 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1182 // of instructions change. 1183 FallthroughLabel = OutContext.createTempSymbol(); 1184 EmitToStreamer( 1185 *OutStreamer, 1186 MCInstBuilder(PPC::BCC) 1187 .addImm(PPC::InvertPredicate( 1188 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1189 .addReg(MI->getOperand(2).getReg()) 1190 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1191 RetInst = MCInst(); 1192 RetInst.setOpcode(PPC::BLR8); 1193 } 1194 // .p2align 3 1195 // .begin: 1196 // b(lr)? # lis 0, FuncId[16..32] 1197 // nop # li 0, FuncId[0..15] 1198 // std 0, -8(1) 1199 // mflr 0 1200 // bl __xray_FunctionExit 1201 // mtlr 0 1202 // b(lr)? 1203 // 1204 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1205 // of instructions change. 1206 OutStreamer->EmitCodeAlignment(8); 1207 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1208 OutStreamer->EmitLabel(BeginOfSled); 1209 EmitToStreamer(*OutStreamer, RetInst); 1210 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1211 EmitToStreamer( 1212 *OutStreamer, 1213 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1214 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1215 EmitToStreamer(*OutStreamer, 1216 MCInstBuilder(PPC::BL8_NOP) 1217 .addExpr(MCSymbolRefExpr::create( 1218 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1219 OutContext))); 1220 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1221 EmitToStreamer(*OutStreamer, RetInst); 1222 if (IsConditional) 1223 OutStreamer->EmitLabel(FallthroughLabel); 1224 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1225 break; 1226 } 1227 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1228 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1229 case TargetOpcode::PATCHABLE_TAIL_CALL: 1230 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1231 // normal function exit from a tail exit. 1232 llvm_unreachable("Tail call is handled in the normal case. See comments " 1233 "around this assert."); 1234 } 1235 } 1236 1237 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1238 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1239 PPCTargetStreamer *TS = 1240 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1241 1242 if (TS) 1243 TS->emitAbiVersion(2); 1244 } 1245 1246 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1247 !isPositionIndependent()) 1248 return AsmPrinter::EmitStartOfAsmFile(M); 1249 1250 if (M.getPICLevel() == PICLevel::SmallPIC) 1251 return AsmPrinter::EmitStartOfAsmFile(M); 1252 1253 OutStreamer->SwitchSection(OutContext.getELFSection( 1254 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1255 1256 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1257 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1258 1259 OutStreamer->EmitLabel(CurrentPos); 1260 1261 // The GOT pointer points to the middle of the GOT, in order to reference the 1262 // entire 64kB range. 0x8000 is the midpoint. 1263 const MCExpr *tocExpr = 1264 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1265 MCConstantExpr::create(0x8000, OutContext), 1266 OutContext); 1267 1268 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1269 1270 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1271 } 1272 1273 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1274 // linux/ppc32 - Normal entry label. 1275 if (!Subtarget->isPPC64() && 1276 (!isPositionIndependent() || 1277 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1278 return AsmPrinter::EmitFunctionEntryLabel(); 1279 1280 if (!Subtarget->isPPC64()) { 1281 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1282 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1283 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1284 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1285 OutStreamer->EmitLabel(RelocSymbol); 1286 1287 const MCExpr *OffsExpr = 1288 MCBinaryExpr::createSub( 1289 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1290 OutContext), 1291 MCSymbolRefExpr::create(PICBase, OutContext), 1292 OutContext); 1293 OutStreamer->EmitValue(OffsExpr, 4); 1294 OutStreamer->EmitLabel(CurrentFnSym); 1295 return; 1296 } else 1297 return AsmPrinter::EmitFunctionEntryLabel(); 1298 } 1299 1300 // ELFv2 ABI - Normal entry label. 1301 if (Subtarget->isELFv2ABI()) { 1302 // In the Large code model, we allow arbitrary displacements between 1303 // the text section and its associated TOC section. We place the 1304 // full 8-byte offset to the TOC in memory immediately preceding 1305 // the function global entry point. 1306 if (TM.getCodeModel() == CodeModel::Large 1307 && !MF->getRegInfo().use_empty(PPC::X2)) { 1308 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1309 1310 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1311 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1312 const MCExpr *TOCDeltaExpr = 1313 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1314 MCSymbolRefExpr::create(GlobalEPSymbol, 1315 OutContext), 1316 OutContext); 1317 1318 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1319 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1320 } 1321 return AsmPrinter::EmitFunctionEntryLabel(); 1322 } 1323 1324 // Emit an official procedure descriptor. 1325 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1326 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1327 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1328 OutStreamer->SwitchSection(Section); 1329 OutStreamer->EmitLabel(CurrentFnSym); 1330 OutStreamer->EmitValueToAlignment(8); 1331 MCSymbol *Symbol1 = CurrentFnSymForSize; 1332 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1333 // entry point. 1334 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1335 8 /*size*/); 1336 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1337 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1338 OutStreamer->EmitValue( 1339 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1340 8/*size*/); 1341 // Emit a null environment pointer. 1342 OutStreamer->EmitIntValue(0, 8 /* size */); 1343 OutStreamer->SwitchSection(Current.first, Current.second); 1344 } 1345 1346 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1347 const DataLayout &DL = getDataLayout(); 1348 1349 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1350 1351 PPCTargetStreamer &TS = 1352 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1353 1354 if (!TOC.empty()) { 1355 MCSectionELF *Section; 1356 1357 if (isPPC64) 1358 Section = OutStreamer->getContext().getELFSection( 1359 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1360 else 1361 Section = OutStreamer->getContext().getELFSection( 1362 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1363 OutStreamer->SwitchSection(Section); 1364 1365 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1366 E = TOC.end(); I != E; ++I) { 1367 OutStreamer->EmitLabel(I->second); 1368 MCSymbol *S = I->first; 1369 if (isPPC64) { 1370 TS.emitTCEntry(*S); 1371 } else { 1372 OutStreamer->EmitValueToAlignment(4); 1373 OutStreamer->EmitSymbolValue(S, 4); 1374 } 1375 } 1376 } 1377 1378 return AsmPrinter::doFinalization(M); 1379 } 1380 1381 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1382 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1383 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1384 // provide two entry points. The ABI guarantees that when calling the 1385 // local entry point, r2 is set up by the caller to contain the TOC base 1386 // for this function, and when calling the global entry point, r12 is set 1387 // up by the caller to hold the address of the global entry point. We 1388 // thus emit a prefix sequence along the following lines: 1389 // 1390 // func: 1391 // .Lfunc_gepNN: 1392 // # global entry point 1393 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1394 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1395 // .Lfunc_lepNN: 1396 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1397 // # local entry point, followed by function body 1398 // 1399 // For the Large code model, we create 1400 // 1401 // .Lfunc_tocNN: 1402 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1403 // func: 1404 // .Lfunc_gepNN: 1405 // # global entry point 1406 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1407 // add r2,r2,r12 1408 // .Lfunc_lepNN: 1409 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1410 // # local entry point, followed by function body 1411 // 1412 // This ensures we have r2 set up correctly while executing the function 1413 // body, no matter which entry point is called. 1414 if (Subtarget->isELFv2ABI() 1415 // Only do all that if the function uses r2 in the first place. 1416 && !MF->getRegInfo().use_empty(PPC::X2)) { 1417 // Note: The logic here must be synchronized with the code in the 1418 // branch-selection pass which sets the offset of the first block in the 1419 // function. This matters because it affects the alignment. 1420 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1421 1422 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1423 OutStreamer->EmitLabel(GlobalEntryLabel); 1424 const MCSymbolRefExpr *GlobalEntryLabelExp = 1425 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1426 1427 if (TM.getCodeModel() != CodeModel::Large) { 1428 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1429 const MCExpr *TOCDeltaExpr = 1430 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1431 GlobalEntryLabelExp, OutContext); 1432 1433 const MCExpr *TOCDeltaHi = 1434 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1435 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1436 .addReg(PPC::X2) 1437 .addReg(PPC::X12) 1438 .addExpr(TOCDeltaHi)); 1439 1440 const MCExpr *TOCDeltaLo = 1441 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1442 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1443 .addReg(PPC::X2) 1444 .addReg(PPC::X2) 1445 .addExpr(TOCDeltaLo)); 1446 } else { 1447 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1448 const MCExpr *TOCOffsetDeltaExpr = 1449 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1450 GlobalEntryLabelExp, OutContext); 1451 1452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1453 .addReg(PPC::X2) 1454 .addExpr(TOCOffsetDeltaExpr) 1455 .addReg(PPC::X12)); 1456 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1457 .addReg(PPC::X2) 1458 .addReg(PPC::X2) 1459 .addReg(PPC::X12)); 1460 } 1461 1462 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1463 OutStreamer->EmitLabel(LocalEntryLabel); 1464 const MCSymbolRefExpr *LocalEntryLabelExp = 1465 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1466 const MCExpr *LocalOffsetExp = 1467 MCBinaryExpr::createSub(LocalEntryLabelExp, 1468 GlobalEntryLabelExp, OutContext); 1469 1470 PPCTargetStreamer *TS = 1471 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1472 1473 if (TS) 1474 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1475 } 1476 } 1477 1478 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1479 /// directive. 1480 /// 1481 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1482 // Only the 64-bit target requires a traceback table. For now, 1483 // we only emit the word of zeroes that GDB requires to find 1484 // the end of the function, and zeroes for the eight-byte 1485 // mandatory fields. 1486 // FIXME: We should fill in the eight-byte mandatory fields as described in 1487 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1488 // currently make use of these fields). 1489 if (Subtarget->isPPC64()) { 1490 OutStreamer->EmitIntValue(0, 4/*size*/); 1491 OutStreamer->EmitIntValue(0, 8/*size*/); 1492 } 1493 } 1494 1495 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1496 static const char *const CPUDirectives[] = { 1497 "", 1498 "ppc", 1499 "ppc440", 1500 "ppc601", 1501 "ppc602", 1502 "ppc603", 1503 "ppc7400", 1504 "ppc750", 1505 "ppc970", 1506 "ppcA2", 1507 "ppce500", 1508 "ppce500mc", 1509 "ppce5500", 1510 "power3", 1511 "power4", 1512 "power5", 1513 "power5x", 1514 "power6", 1515 "power6x", 1516 "power7", 1517 // FIXME: why is power8 missing here? 1518 "ppc64", 1519 "ppc64le", 1520 "power9" 1521 }; 1522 1523 // Get the numerically largest directive. 1524 // FIXME: How should we merge darwin directives? 1525 unsigned Directive = PPC::DIR_NONE; 1526 for (const Function &F : M) { 1527 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1528 unsigned FDir = STI.getDarwinDirective(); 1529 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1530 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1531 Directive = PPC::DIR_970; 1532 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1533 Directive = PPC::DIR_7400; 1534 if (STI.isPPC64() && Directive < PPC::DIR_64) 1535 Directive = PPC::DIR_64; 1536 } 1537 1538 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1539 1540 assert(Directive < array_lengthof(CPUDirectives) && 1541 "CPUDirectives[] might not be up-to-date!"); 1542 PPCTargetStreamer &TStreamer = 1543 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1544 TStreamer.emitMachine(CPUDirectives[Directive]); 1545 1546 // Prime text sections so they are adjacent. This reduces the likelihood a 1547 // large data or debug section causes a branch to exceed 16M limit. 1548 const TargetLoweringObjectFileMachO &TLOFMacho = 1549 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1550 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1551 if (TM.getRelocationModel() == Reloc::PIC_) { 1552 OutStreamer->SwitchSection( 1553 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1554 MachO::S_SYMBOL_STUBS | 1555 MachO::S_ATTR_PURE_INSTRUCTIONS, 1556 32, SectionKind::getText())); 1557 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1558 OutStreamer->SwitchSection( 1559 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1560 MachO::S_SYMBOL_STUBS | 1561 MachO::S_ATTR_PURE_INSTRUCTIONS, 1562 16, SectionKind::getText())); 1563 } 1564 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1565 } 1566 1567 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1568 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1569 1570 // Darwin/PPC always uses mach-o. 1571 const TargetLoweringObjectFileMachO &TLOFMacho = 1572 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1573 if (MMI) { 1574 MachineModuleInfoMachO &MMIMacho = 1575 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1576 1577 if (MAI->doesSupportExceptionHandling()) { 1578 // Add the (possibly multiple) personalities to the set of global values. 1579 // Only referenced functions get into the Personalities list. 1580 for (const Function *Personality : MMI->getPersonalities()) { 1581 if (Personality) { 1582 MCSymbol *NLPSym = 1583 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1584 MachineModuleInfoImpl::StubValueTy &StubSym = 1585 MMIMacho.getGVStubEntry(NLPSym); 1586 StubSym = 1587 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1588 } 1589 } 1590 } 1591 1592 // Output stubs for dynamically-linked functions. 1593 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1594 1595 // Output macho stubs for external and common global variables. 1596 if (!Stubs.empty()) { 1597 // Switch with ".non_lazy_symbol_pointer" directive. 1598 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1599 EmitAlignment(isPPC64 ? 3 : 2); 1600 1601 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1602 // L_foo$stub: 1603 OutStreamer->EmitLabel(Stubs[i].first); 1604 // .indirect_symbol _foo 1605 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1606 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1607 MCSA_IndirectSymbol); 1608 1609 if (MCSym.getInt()) 1610 // External to current translation unit. 1611 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1612 else 1613 // Internal to current translation unit. 1614 // 1615 // When we place the LSDA into the TEXT section, the type info 1616 // pointers 1617 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1618 // However, sometimes the types are local to the file. So we need to 1619 // fill in the value for the NLP in those cases. 1620 OutStreamer->EmitValue( 1621 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1622 isPPC64 ? 8 : 4 /*size*/); 1623 } 1624 1625 Stubs.clear(); 1626 OutStreamer->AddBlankLine(); 1627 } 1628 } 1629 1630 // Funny Darwin hack: This flag tells the linker that no global symbols 1631 // contain code that falls through to other global symbols (e.g. the obvious 1632 // implementation of multiple entry points). If this doesn't occur, the 1633 // linker can safely perform dead code stripping. Since LLVM never generates 1634 // code that does this, it is always safe to set. 1635 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1636 1637 return AsmPrinter::doFinalization(M); 1638 } 1639 1640 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1641 /// for a MachineFunction to the given output stream, in a format that the 1642 /// Darwin assembler can deal with. 1643 /// 1644 static AsmPrinter * 1645 createPPCAsmPrinterPass(TargetMachine &tm, 1646 std::unique_ptr<MCStreamer> &&Streamer) { 1647 if (tm.getTargetTriple().isMacOSX()) 1648 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1649 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1650 } 1651 1652 // Force static initialization. 1653 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1654 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1655 createPPCAsmPrinterPass); 1656 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1657 createPPCAsmPrinterPass); 1658 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1659 createPPCAsmPrinterPass); 1660 } 1661