1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCSectionXCOFF.h" 55 #include "llvm/MC/MCStreamer.h" 56 #include "llvm/MC/MCSymbol.h" 57 #include "llvm/MC/MCSymbolELF.h" 58 #include "llvm/MC/MCSymbolXCOFF.h" 59 #include "llvm/MC/SectionKind.h" 60 #include "llvm/Support/Casting.h" 61 #include "llvm/Support/CodeGen.h" 62 #include "llvm/Support/Debug.h" 63 #include "llvm/Support/ErrorHandling.h" 64 #include "llvm/Support/TargetRegistry.h" 65 #include "llvm/Support/raw_ostream.h" 66 #include "llvm/Target/TargetMachine.h" 67 #include <algorithm> 68 #include <cassert> 69 #include <cstdint> 70 #include <memory> 71 #include <new> 72 73 using namespace llvm; 74 75 #define DEBUG_TYPE "asmprinter" 76 77 namespace { 78 79 class PPCAsmPrinter : public AsmPrinter { 80 protected: 81 MapVector<MCSymbol *, MCSymbol *> TOC; 82 const PPCSubtarget *Subtarget; 83 StackMaps SM; 84 85 public: 86 explicit PPCAsmPrinter(TargetMachine &TM, 87 std::unique_ptr<MCStreamer> Streamer) 88 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 89 90 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 91 92 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 93 94 bool doInitialization(Module &M) override { 95 if (!TOC.empty()) 96 TOC.clear(); 97 return AsmPrinter::doInitialization(M); 98 } 99 100 void EmitInstruction(const MachineInstr *MI) override; 101 102 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 103 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 104 /// The \p MI would be INLINEASM ONLY. 105 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 106 107 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 108 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 111 const char *ExtraCode, raw_ostream &O) override; 112 113 void EmitEndOfAsmFile(Module &M) override; 114 115 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 116 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 117 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 118 bool runOnMachineFunction(MachineFunction &MF) override { 119 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 120 bool Changed = AsmPrinter::runOnMachineFunction(MF); 121 emitXRayTable(); 122 return Changed; 123 } 124 }; 125 126 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 127 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 128 public: 129 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 130 std::unique_ptr<MCStreamer> Streamer) 131 : PPCAsmPrinter(TM, std::move(Streamer)) {} 132 133 StringRef getPassName() const override { 134 return "Linux PPC Assembly Printer"; 135 } 136 137 bool doFinalization(Module &M) override; 138 void EmitStartOfAsmFile(Module &M) override; 139 140 void EmitFunctionEntryLabel() override; 141 142 void EmitFunctionBodyStart() override; 143 void EmitFunctionBodyEnd() override; 144 void EmitInstruction(const MachineInstr *MI) override; 145 }; 146 147 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 148 /// OS X 149 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 150 public: 151 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 152 std::unique_ptr<MCStreamer> Streamer) 153 : PPCAsmPrinter(TM, std::move(Streamer)) {} 154 155 StringRef getPassName() const override { 156 return "Darwin PPC Assembly Printer"; 157 } 158 159 bool doFinalization(Module &M) override; 160 void EmitStartOfAsmFile(Module &M) override; 161 }; 162 163 class PPCAIXAsmPrinter : public PPCAsmPrinter { 164 public: 165 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 166 : PPCAsmPrinter(TM, std::move(Streamer)) {} 167 168 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 169 170 void EmitGlobalVariable(const GlobalVariable *GV) override; 171 }; 172 173 } // end anonymous namespace 174 175 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 176 raw_ostream &O) { 177 // Computing the address of a global symbol, not calling it. 178 const GlobalValue *GV = MO.getGlobal(); 179 MCSymbol *SymToPrint; 180 181 // External or weakly linked global variables need non-lazily-resolved stubs 182 if (Subtarget->hasLazyResolverStub(GV)) { 183 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 184 MachineModuleInfoImpl::StubValueTy &StubSym = 185 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 186 SymToPrint); 187 if (!StubSym.getPointer()) 188 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 189 !GV->hasInternalLinkage()); 190 } else { 191 SymToPrint = getSymbol(GV); 192 } 193 194 SymToPrint->print(O, MAI); 195 196 printOffset(MO.getOffset(), O); 197 } 198 199 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 200 raw_ostream &O) { 201 const DataLayout &DL = getDataLayout(); 202 const MachineOperand &MO = MI->getOperand(OpNo); 203 204 switch (MO.getType()) { 205 case MachineOperand::MO_Register: { 206 // The MI is INLINEASM ONLY and UseVSXReg is always false. 207 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 208 209 // Linux assembler (Others?) does not take register mnemonics. 210 // FIXME - What about special registers used in mfspr/mtspr? 211 if (!Subtarget->isDarwin()) 212 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 213 O << RegName; 214 return; 215 } 216 case MachineOperand::MO_Immediate: 217 O << MO.getImm(); 218 return; 219 220 case MachineOperand::MO_MachineBasicBlock: 221 MO.getMBB()->getSymbol()->print(O, MAI); 222 return; 223 case MachineOperand::MO_ConstantPoolIndex: 224 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 225 << MO.getIndex(); 226 return; 227 case MachineOperand::MO_BlockAddress: 228 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 229 return; 230 case MachineOperand::MO_GlobalAddress: { 231 PrintSymbolOperand(MO, O); 232 return; 233 } 234 235 default: 236 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 237 return; 238 } 239 } 240 241 /// PrintAsmOperand - Print out an operand for an inline asm expression. 242 /// 243 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 244 const char *ExtraCode, raw_ostream &O) { 245 // Does this asm operand have a single letter operand modifier? 246 if (ExtraCode && ExtraCode[0]) { 247 if (ExtraCode[1] != 0) return true; // Unknown modifier. 248 249 switch (ExtraCode[0]) { 250 default: 251 // See if this is a generic print operand 252 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 253 case 'L': // Write second word of DImode reference. 254 // Verify that this operand has two consecutive registers. 255 if (!MI->getOperand(OpNo).isReg() || 256 OpNo+1 == MI->getNumOperands() || 257 !MI->getOperand(OpNo+1).isReg()) 258 return true; 259 ++OpNo; // Return the high-part. 260 break; 261 case 'I': 262 // Write 'i' if an integer constant, otherwise nothing. Used to print 263 // addi vs add, etc. 264 if (MI->getOperand(OpNo).isImm()) 265 O << "i"; 266 return false; 267 case 'x': 268 if(!MI->getOperand(OpNo).isReg()) 269 return true; 270 // This operand uses VSX numbering. 271 // If the operand is a VMX register, convert it to a VSX register. 272 Register Reg = MI->getOperand(OpNo).getReg(); 273 if (PPCInstrInfo::isVRRegister(Reg)) 274 Reg = PPC::VSX32 + (Reg - PPC::V0); 275 else if (PPCInstrInfo::isVFRegister(Reg)) 276 Reg = PPC::VSX32 + (Reg - PPC::VF0); 277 const char *RegName; 278 RegName = PPCInstPrinter::getRegisterName(Reg); 279 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 280 O << RegName; 281 return false; 282 } 283 } 284 285 printOperand(MI, OpNo, O); 286 return false; 287 } 288 289 // At the moment, all inline asm memory operands are a single register. 290 // In any case, the output of this routine should always be just one 291 // assembler operand. 292 293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 294 const char *ExtraCode, 295 raw_ostream &O) { 296 if (ExtraCode && ExtraCode[0]) { 297 if (ExtraCode[1] != 0) return true; // Unknown modifier. 298 299 switch (ExtraCode[0]) { 300 default: return true; // Unknown modifier. 301 case 'y': // A memory reference for an X-form instruction 302 { 303 const char *RegName = "r0"; 304 if (!Subtarget->isDarwin()) 305 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 306 O << RegName << ", "; 307 printOperand(MI, OpNo, O); 308 return false; 309 } 310 case 'U': // Print 'u' for update form. 311 case 'X': // Print 'x' for indexed form. 312 { 313 // FIXME: Currently for PowerPC memory operands are always loaded 314 // into a register, so we never get an update or indexed form. 315 // This is bad even for offset forms, since even if we know we 316 // have a value in -16(r1), we will generate a load into r<n> 317 // and then load from 0(r<n>). Until that issue is fixed, 318 // tolerate 'U' and 'X' but don't output anything. 319 assert(MI->getOperand(OpNo).isReg()); 320 return false; 321 } 322 } 323 } 324 325 assert(MI->getOperand(OpNo).isReg()); 326 O << "0("; 327 printOperand(MI, OpNo, O); 328 O << ")"; 329 return false; 330 } 331 332 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 333 /// exists for it. If not, create one. Then return a symbol that references 334 /// the TOC entry. 335 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 336 MCSymbol *&TOCEntry = TOC[Sym]; 337 if (!TOCEntry) 338 TOCEntry = createTempSymbol("C"); 339 return TOCEntry; 340 } 341 342 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 343 emitStackMaps(SM); 344 } 345 346 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 347 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 348 349 SM.recordStackMap(MI); 350 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 351 352 // Scan ahead to trim the shadow. 353 const MachineBasicBlock &MBB = *MI.getParent(); 354 MachineBasicBlock::const_iterator MII(MI); 355 ++MII; 356 while (NumNOPBytes > 0) { 357 if (MII == MBB.end() || MII->isCall() || 358 MII->getOpcode() == PPC::DBG_VALUE || 359 MII->getOpcode() == TargetOpcode::PATCHPOINT || 360 MII->getOpcode() == TargetOpcode::STACKMAP) 361 break; 362 ++MII; 363 NumNOPBytes -= 4; 364 } 365 366 // Emit nops. 367 for (unsigned i = 0; i < NumNOPBytes; i += 4) 368 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 369 } 370 371 // Lower a patchpoint of the form: 372 // [<def>], <id>, <numBytes>, <target>, <numArgs> 373 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 374 SM.recordPatchPoint(MI); 375 PatchPointOpers Opers(&MI); 376 377 unsigned EncodedBytes = 0; 378 const MachineOperand &CalleeMO = Opers.getCallTarget(); 379 380 if (CalleeMO.isImm()) { 381 int64_t CallTarget = CalleeMO.getImm(); 382 if (CallTarget) { 383 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 384 "High 16 bits of call target should be zero."); 385 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 386 EncodedBytes = 0; 387 // Materialize the jump address: 388 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 389 .addReg(ScratchReg) 390 .addImm((CallTarget >> 32) & 0xFFFF)); 391 ++EncodedBytes; 392 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 393 .addReg(ScratchReg) 394 .addReg(ScratchReg) 395 .addImm(32).addImm(16)); 396 ++EncodedBytes; 397 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 398 .addReg(ScratchReg) 399 .addReg(ScratchReg) 400 .addImm((CallTarget >> 16) & 0xFFFF)); 401 ++EncodedBytes; 402 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 403 .addReg(ScratchReg) 404 .addReg(ScratchReg) 405 .addImm(CallTarget & 0xFFFF)); 406 407 // Save the current TOC pointer before the remote call. 408 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 409 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 410 .addReg(PPC::X2) 411 .addImm(TOCSaveOffset) 412 .addReg(PPC::X1)); 413 ++EncodedBytes; 414 415 // If we're on ELFv1, then we need to load the actual function pointer 416 // from the function descriptor. 417 if (!Subtarget->isELFv2ABI()) { 418 // Load the new TOC pointer and the function address, but not r11 419 // (needing this is rare, and loading it here would prevent passing it 420 // via a 'nest' parameter. 421 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 422 .addReg(PPC::X2) 423 .addImm(8) 424 .addReg(ScratchReg)); 425 ++EncodedBytes; 426 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 427 .addReg(ScratchReg) 428 .addImm(0) 429 .addReg(ScratchReg)); 430 ++EncodedBytes; 431 } 432 433 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 434 .addReg(ScratchReg)); 435 ++EncodedBytes; 436 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 437 ++EncodedBytes; 438 439 // Restore the TOC pointer after the call. 440 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 441 .addReg(PPC::X2) 442 .addImm(TOCSaveOffset) 443 .addReg(PPC::X1)); 444 ++EncodedBytes; 445 } 446 } else if (CalleeMO.isGlobal()) { 447 const GlobalValue *GValue = CalleeMO.getGlobal(); 448 MCSymbol *MOSymbol = getSymbol(GValue); 449 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 450 451 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 452 .addExpr(SymVar)); 453 EncodedBytes += 2; 454 } 455 456 // Each instruction is 4 bytes. 457 EncodedBytes *= 4; 458 459 // Emit padding. 460 unsigned NumBytes = Opers.getNumPatchBytes(); 461 assert(NumBytes >= EncodedBytes && 462 "Patchpoint can't request size less than the length of a call."); 463 assert((NumBytes - EncodedBytes) % 4 == 0 && 464 "Invalid number of NOP bytes requested!"); 465 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 466 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 467 } 468 469 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 470 /// call to __tls_get_addr to the current output stream. 471 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 472 MCSymbolRefExpr::VariantKind VK) { 473 StringRef Name = "__tls_get_addr"; 474 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 475 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 476 const Module *M = MF->getFunction().getParent(); 477 478 assert(MI->getOperand(0).isReg() && 479 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 480 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 481 "GETtls[ld]ADDR[32] must define GPR3"); 482 assert(MI->getOperand(1).isReg() && 483 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 484 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 485 "GETtls[ld]ADDR[32] must read GPR3"); 486 487 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 488 isPositionIndependent()) 489 Kind = MCSymbolRefExpr::VK_PLT; 490 const MCExpr *TlsRef = 491 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 492 493 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 494 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 495 M->getPICLevel() == PICLevel::BigPIC) 496 TlsRef = MCBinaryExpr::createAdd( 497 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 498 const MachineOperand &MO = MI->getOperand(2); 499 const GlobalValue *GValue = MO.getGlobal(); 500 MCSymbol *MOSymbol = getSymbol(GValue); 501 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 502 EmitToStreamer(*OutStreamer, 503 MCInstBuilder(Subtarget->isPPC64() ? 504 PPC::BL8_NOP_TLS : PPC::BL_TLS) 505 .addExpr(TlsRef) 506 .addExpr(SymVar)); 507 } 508 509 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 510 /// the current output stream. 511 /// 512 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 513 MCInst TmpInst; 514 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 515 const Module *M = MF->getFunction().getParent(); 516 PICLevel::Level PL = M->getPICLevel(); 517 518 #ifndef NDEBUG 519 // Validate that SPE and FPU are mutually exclusive in codegen 520 if (!MI->isInlineAsm()) { 521 for (const MachineOperand &MO: MI->operands()) { 522 if (MO.isReg()) { 523 Register Reg = MO.getReg(); 524 if (Subtarget->hasSPE()) { 525 if (PPC::F4RCRegClass.contains(Reg) || 526 PPC::F8RCRegClass.contains(Reg) || 527 PPC::QBRCRegClass.contains(Reg) || 528 PPC::QFRCRegClass.contains(Reg) || 529 PPC::QSRCRegClass.contains(Reg) || 530 PPC::VFRCRegClass.contains(Reg) || 531 PPC::VRRCRegClass.contains(Reg) || 532 PPC::VSFRCRegClass.contains(Reg) || 533 PPC::VSSRCRegClass.contains(Reg) 534 ) 535 llvm_unreachable("SPE targets cannot have FPRegs!"); 536 } else { 537 if (PPC::SPERCRegClass.contains(Reg)) 538 llvm_unreachable("SPE register found in FPU-targeted code!"); 539 } 540 } 541 } 542 } 543 #endif 544 // Lower multi-instruction pseudo operations. 545 switch (MI->getOpcode()) { 546 default: break; 547 case TargetOpcode::DBG_VALUE: 548 llvm_unreachable("Should be handled target independently"); 549 case TargetOpcode::STACKMAP: 550 return LowerSTACKMAP(SM, *MI); 551 case TargetOpcode::PATCHPOINT: 552 return LowerPATCHPOINT(SM, *MI); 553 554 case PPC::MoveGOTtoLR: { 555 // Transform %lr = MoveGOTtoLR 556 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 557 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 558 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 559 // blrl 560 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 561 MCSymbol *GOTSymbol = 562 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 563 const MCExpr *OffsExpr = 564 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 565 MCSymbolRefExpr::VK_PPC_LOCAL, 566 OutContext), 567 MCConstantExpr::create(4, OutContext), 568 OutContext); 569 570 // Emit the 'bl'. 571 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 572 return; 573 } 574 case PPC::MovePCtoLR: 575 case PPC::MovePCtoLR8: { 576 // Transform %lr = MovePCtoLR 577 // Into this, where the label is the PIC base: 578 // bl L1$pb 579 // L1$pb: 580 MCSymbol *PICBase = MF->getPICBaseSymbol(); 581 582 // Emit the 'bl'. 583 EmitToStreamer(*OutStreamer, 584 MCInstBuilder(PPC::BL) 585 // FIXME: We would like an efficient form for this, so we 586 // don't have to do a lot of extra uniquing. 587 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 588 589 // Emit the label. 590 OutStreamer->EmitLabel(PICBase); 591 return; 592 } 593 case PPC::UpdateGBR: { 594 // Transform %rd = UpdateGBR(%rt, %ri) 595 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 596 // add %rd, %rt, %ri 597 // or into (if secure plt mode is on): 598 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 599 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 600 // Get the offset from the GOT Base Register to the GOT 601 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 602 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 603 unsigned PICR = TmpInst.getOperand(0).getReg(); 604 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 605 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 606 : ".LTOC"); 607 const MCExpr *PB = 608 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 609 610 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 611 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 612 613 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 614 EmitToStreamer( 615 *OutStreamer, 616 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 617 618 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 619 EmitToStreamer( 620 *OutStreamer, 621 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 622 return; 623 } else { 624 MCSymbol *PICOffset = 625 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 626 TmpInst.setOpcode(PPC::LWZ); 627 const MCExpr *Exp = 628 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 629 const MCExpr *PB = 630 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 631 MCSymbolRefExpr::VK_None, 632 OutContext); 633 const MCOperand TR = TmpInst.getOperand(1); 634 const MCOperand PICR = TmpInst.getOperand(0); 635 636 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 637 TmpInst.getOperand(1) = 638 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 639 TmpInst.getOperand(0) = TR; 640 TmpInst.getOperand(2) = PICR; 641 EmitToStreamer(*OutStreamer, TmpInst); 642 643 TmpInst.setOpcode(PPC::ADD4); 644 TmpInst.getOperand(0) = PICR; 645 TmpInst.getOperand(1) = TR; 646 TmpInst.getOperand(2) = PICR; 647 EmitToStreamer(*OutStreamer, TmpInst); 648 return; 649 } 650 } 651 case PPC::LWZtoc: { 652 assert(!isDarwin && "TOC is an ELF/XCOFF construct."); 653 654 // Transform %rN = LWZtoc @op1, %r2 655 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 656 657 // Change the opcode to LWZ. 658 TmpInst.setOpcode(PPC::LWZ); 659 660 const MachineOperand &MO = MI->getOperand(1); 661 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress() && 662 "Unexpected operand type for LWZtoc pseudo."); 663 664 // Map the operand to its corresponding MCSymbol. 665 MCSymbol *MOSymbol = nullptr; 666 if (MO.isGlobal()) 667 MOSymbol = getSymbol(MO.getGlobal()); 668 else if (MO.isCPI()) 669 MOSymbol = GetCPISymbol(MO.getIndex()); 670 else if (MO.isJTI()) 671 MOSymbol = GetJTISymbol(MO.getIndex()); 672 else if (MO.isBlockAddress()) 673 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 674 675 const bool IsAIX = TM.getTargetTriple().isOSAIX(); 676 677 // Create a reference to the GOT entry for the symbol. The GOT entry will be 678 // synthesized later. 679 if (PL == PICLevel::SmallPIC && !IsAIX) { 680 const MCExpr *Exp = 681 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 682 OutContext); 683 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 684 EmitToStreamer(*OutStreamer, TmpInst); 685 return; 686 } 687 688 // Otherwise use the TOC. 'TOCEntry' is a local symbol used to reference 689 // the storage allocated in the TOC which contains the address of 690 // 'MOSymbol'. Said TOC entry will be synthesized later. 691 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 692 const MCExpr *Exp = 693 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 694 695 // AIX uses the local symbol directly for the operand; that the symbol is 696 // accessed toc-relative is implicit. 697 if (IsAIX) { 698 assert( 699 TM.getCodeModel() == CodeModel::Small && 700 "This pseudo should only be selected for 32-bit small code model."); 701 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 702 EmitToStreamer(*OutStreamer, TmpInst); 703 return; 704 } 705 706 // Create an explicit subtract expression between the local symbol and 707 // '.LTOC' to manifest the toc-relative offset. 708 const MCExpr *PB = MCSymbolRefExpr::create( 709 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 710 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 711 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 712 EmitToStreamer(*OutStreamer, TmpInst); 713 return; 714 } 715 case PPC::LDtocJTI: 716 case PPC::LDtocCPT: 717 case PPC::LDtocBA: 718 case PPC::LDtoc: { 719 // Transform %x3 = LDtoc @min1, %x2 720 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 721 722 // Change the opcode to LD, and the global address operand to be a 723 // reference to the TOC entry we will synthesize later. 724 TmpInst.setOpcode(PPC::LD); 725 const MachineOperand &MO = MI->getOperand(1); 726 727 // Map symbol -> label of TOC entry 728 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 729 MCSymbol *MOSymbol = nullptr; 730 if (MO.isGlobal()) 731 MOSymbol = getSymbol(MO.getGlobal()); 732 else if (MO.isCPI()) 733 MOSymbol = GetCPISymbol(MO.getIndex()); 734 else if (MO.isJTI()) 735 MOSymbol = GetJTISymbol(MO.getIndex()); 736 else if (MO.isBlockAddress()) 737 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 738 739 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 740 741 const MCExpr *Exp = 742 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 743 OutContext); 744 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 745 EmitToStreamer(*OutStreamer, TmpInst); 746 return; 747 } 748 749 case PPC::ADDIStocHA8: { 750 // Transform %xd = ADDIStocHA8 %x2, @sym 751 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 752 753 // Change the opcode to ADDIS8. If the global address is external, has 754 // common linkage, is a non-local function address, or is a jump table 755 // address, then generate a TOC entry and reference that. Otherwise 756 // reference the symbol directly. 757 TmpInst.setOpcode(PPC::ADDIS8); 758 const MachineOperand &MO = MI->getOperand(2); 759 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 760 MO.isBlockAddress()) && 761 "Invalid operand for ADDIStocHA8!"); 762 MCSymbol *MOSymbol = nullptr; 763 bool GlobalToc = false; 764 765 if (MO.isGlobal()) { 766 const GlobalValue *GV = MO.getGlobal(); 767 MOSymbol = getSymbol(GV); 768 GlobalToc = Subtarget->isGVIndirectSymbol(GV); 769 } else if (MO.isCPI()) { 770 MOSymbol = GetCPISymbol(MO.getIndex()); 771 } else if (MO.isJTI()) { 772 MOSymbol = GetJTISymbol(MO.getIndex()); 773 } else if (MO.isBlockAddress()) { 774 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 775 } 776 777 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 778 TM.getCodeModel() == CodeModel::Large) 779 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 780 781 const MCExpr *Exp = 782 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 783 OutContext); 784 785 if (!MO.isJTI() && MO.getOffset()) 786 Exp = MCBinaryExpr::createAdd(Exp, 787 MCConstantExpr::create(MO.getOffset(), 788 OutContext), 789 OutContext); 790 791 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 792 EmitToStreamer(*OutStreamer, TmpInst); 793 return; 794 } 795 case PPC::LDtocL: { 796 // Transform %xd = LDtocL @sym, %xs 797 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 798 799 // Change the opcode to LD. If the global address is external, has 800 // common linkage, or is a jump table address, then reference the 801 // associated TOC entry. Otherwise reference the symbol directly. 802 TmpInst.setOpcode(PPC::LD); 803 const MachineOperand &MO = MI->getOperand(1); 804 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 805 MO.isBlockAddress()) && 806 "Invalid operand for LDtocL!"); 807 MCSymbol *MOSymbol = nullptr; 808 809 if (MO.isJTI()) 810 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 811 else if (MO.isBlockAddress()) { 812 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 813 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 814 } 815 else if (MO.isCPI()) { 816 MOSymbol = GetCPISymbol(MO.getIndex()); 817 if (TM.getCodeModel() == CodeModel::Large) 818 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 819 } 820 else if (MO.isGlobal()) { 821 const GlobalValue *GV = MO.getGlobal(); 822 MOSymbol = getSymbol(GV); 823 LLVM_DEBUG( 824 assert((Subtarget->isGVIndirectSymbol(GV)) && 825 "LDtocL used on symbol that could be accessed directly is " 826 "invalid. Must match ADDIStocHA8.")); 827 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 828 } 829 830 const MCExpr *Exp = 831 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 832 OutContext); 833 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 834 EmitToStreamer(*OutStreamer, TmpInst); 835 return; 836 } 837 case PPC::ADDItocL: { 838 // Transform %xd = ADDItocL %xs, @sym 839 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 840 841 // Change the opcode to ADDI8. If the global address is external, then 842 // generate a TOC entry and reference that. Otherwise reference the 843 // symbol directly. 844 TmpInst.setOpcode(PPC::ADDI8); 845 const MachineOperand &MO = MI->getOperand(2); 846 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 847 MCSymbol *MOSymbol = nullptr; 848 849 if (MO.isGlobal()) { 850 const GlobalValue *GV = MO.getGlobal(); 851 LLVM_DEBUG(assert(!(Subtarget->isGVIndirectSymbol(GV)) && 852 "Interposable definitions must use indirect access.")); 853 MOSymbol = getSymbol(GV); 854 } else if (MO.isCPI()) { 855 MOSymbol = GetCPISymbol(MO.getIndex()); 856 } 857 858 const MCExpr *Exp = 859 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 860 OutContext); 861 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 862 EmitToStreamer(*OutStreamer, TmpInst); 863 return; 864 } 865 case PPC::ADDISgotTprelHA: { 866 // Transform: %xd = ADDISgotTprelHA %x2, @sym 867 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 868 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 869 const MachineOperand &MO = MI->getOperand(2); 870 const GlobalValue *GValue = MO.getGlobal(); 871 MCSymbol *MOSymbol = getSymbol(GValue); 872 const MCExpr *SymGotTprel = 873 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 874 OutContext); 875 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 876 .addReg(MI->getOperand(0).getReg()) 877 .addReg(MI->getOperand(1).getReg()) 878 .addExpr(SymGotTprel)); 879 return; 880 } 881 case PPC::LDgotTprelL: 882 case PPC::LDgotTprelL32: { 883 // Transform %xd = LDgotTprelL @sym, %xs 884 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 885 886 // Change the opcode to LD. 887 TmpInst.setOpcode(Subtarget->isPPC64() ? PPC::LD : PPC::LWZ); 888 const MachineOperand &MO = MI->getOperand(1); 889 const GlobalValue *GValue = MO.getGlobal(); 890 MCSymbol *MOSymbol = getSymbol(GValue); 891 const MCExpr *Exp = MCSymbolRefExpr::create( 892 MOSymbol, 893 Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 894 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 895 OutContext); 896 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 897 EmitToStreamer(*OutStreamer, TmpInst); 898 return; 899 } 900 901 case PPC::PPC32PICGOT: { 902 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 903 MCSymbol *GOTRef = OutContext.createTempSymbol(); 904 MCSymbol *NextInstr = OutContext.createTempSymbol(); 905 906 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 907 // FIXME: We would like an efficient form for this, so we don't have to do 908 // a lot of extra uniquing. 909 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 910 const MCExpr *OffsExpr = 911 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 912 MCSymbolRefExpr::create(GOTRef, OutContext), 913 OutContext); 914 OutStreamer->EmitLabel(GOTRef); 915 OutStreamer->EmitValue(OffsExpr, 4); 916 OutStreamer->EmitLabel(NextInstr); 917 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 918 .addReg(MI->getOperand(0).getReg())); 919 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 920 .addReg(MI->getOperand(1).getReg()) 921 .addImm(0) 922 .addReg(MI->getOperand(0).getReg())); 923 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 924 .addReg(MI->getOperand(0).getReg()) 925 .addReg(MI->getOperand(1).getReg()) 926 .addReg(MI->getOperand(0).getReg())); 927 return; 928 } 929 case PPC::PPC32GOT: { 930 MCSymbol *GOTSymbol = 931 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 932 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 933 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 934 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 935 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 936 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 937 .addReg(MI->getOperand(0).getReg()) 938 .addExpr(SymGotTlsL)); 939 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 940 .addReg(MI->getOperand(0).getReg()) 941 .addReg(MI->getOperand(0).getReg()) 942 .addExpr(SymGotTlsHA)); 943 return; 944 } 945 case PPC::ADDIStlsgdHA: { 946 // Transform: %xd = ADDIStlsgdHA %x2, @sym 947 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 948 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 949 const MachineOperand &MO = MI->getOperand(2); 950 const GlobalValue *GValue = MO.getGlobal(); 951 MCSymbol *MOSymbol = getSymbol(GValue); 952 const MCExpr *SymGotTlsGD = 953 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 954 OutContext); 955 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 956 .addReg(MI->getOperand(0).getReg()) 957 .addReg(MI->getOperand(1).getReg()) 958 .addExpr(SymGotTlsGD)); 959 return; 960 } 961 case PPC::ADDItlsgdL: 962 // Transform: %xd = ADDItlsgdL %xs, @sym 963 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 964 case PPC::ADDItlsgdL32: { 965 // Transform: %rd = ADDItlsgdL32 %rs, @sym 966 // Into: %rd = ADDI %rs, sym@got@tlsgd 967 const MachineOperand &MO = MI->getOperand(2); 968 const GlobalValue *GValue = MO.getGlobal(); 969 MCSymbol *MOSymbol = getSymbol(GValue); 970 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 971 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 972 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 973 OutContext); 974 EmitToStreamer(*OutStreamer, 975 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 976 .addReg(MI->getOperand(0).getReg()) 977 .addReg(MI->getOperand(1).getReg()) 978 .addExpr(SymGotTlsGD)); 979 return; 980 } 981 case PPC::GETtlsADDR: 982 // Transform: %x3 = GETtlsADDR %x3, @sym 983 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 984 case PPC::GETtlsADDR32: { 985 // Transform: %r3 = GETtlsADDR32 %r3, @sym 986 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 987 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 988 return; 989 } 990 case PPC::ADDIStlsldHA: { 991 // Transform: %xd = ADDIStlsldHA %x2, @sym 992 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 993 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 994 const MachineOperand &MO = MI->getOperand(2); 995 const GlobalValue *GValue = MO.getGlobal(); 996 MCSymbol *MOSymbol = getSymbol(GValue); 997 const MCExpr *SymGotTlsLD = 998 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 999 OutContext); 1000 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1001 .addReg(MI->getOperand(0).getReg()) 1002 .addReg(MI->getOperand(1).getReg()) 1003 .addExpr(SymGotTlsLD)); 1004 return; 1005 } 1006 case PPC::ADDItlsldL: 1007 // Transform: %xd = ADDItlsldL %xs, @sym 1008 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 1009 case PPC::ADDItlsldL32: { 1010 // Transform: %rd = ADDItlsldL32 %rs, @sym 1011 // Into: %rd = ADDI %rs, sym@got@tlsld 1012 const MachineOperand &MO = MI->getOperand(2); 1013 const GlobalValue *GValue = MO.getGlobal(); 1014 MCSymbol *MOSymbol = getSymbol(GValue); 1015 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1016 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1017 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1018 OutContext); 1019 EmitToStreamer(*OutStreamer, 1020 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1021 .addReg(MI->getOperand(0).getReg()) 1022 .addReg(MI->getOperand(1).getReg()) 1023 .addExpr(SymGotTlsLD)); 1024 return; 1025 } 1026 case PPC::GETtlsldADDR: 1027 // Transform: %x3 = GETtlsldADDR %x3, @sym 1028 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1029 case PPC::GETtlsldADDR32: { 1030 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1031 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1032 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1033 return; 1034 } 1035 case PPC::ADDISdtprelHA: 1036 // Transform: %xd = ADDISdtprelHA %xs, @sym 1037 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1038 case PPC::ADDISdtprelHA32: { 1039 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1040 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1041 const MachineOperand &MO = MI->getOperand(2); 1042 const GlobalValue *GValue = MO.getGlobal(); 1043 MCSymbol *MOSymbol = getSymbol(GValue); 1044 const MCExpr *SymDtprel = 1045 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1046 OutContext); 1047 EmitToStreamer( 1048 *OutStreamer, 1049 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1050 .addReg(MI->getOperand(0).getReg()) 1051 .addReg(MI->getOperand(1).getReg()) 1052 .addExpr(SymDtprel)); 1053 return; 1054 } 1055 case PPC::ADDIdtprelL: 1056 // Transform: %xd = ADDIdtprelL %xs, @sym 1057 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1058 case PPC::ADDIdtprelL32: { 1059 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1060 // Into: %rd = ADDI %rs, sym@dtprel@l 1061 const MachineOperand &MO = MI->getOperand(2); 1062 const GlobalValue *GValue = MO.getGlobal(); 1063 MCSymbol *MOSymbol = getSymbol(GValue); 1064 const MCExpr *SymDtprel = 1065 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1066 OutContext); 1067 EmitToStreamer(*OutStreamer, 1068 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1069 .addReg(MI->getOperand(0).getReg()) 1070 .addReg(MI->getOperand(1).getReg()) 1071 .addExpr(SymDtprel)); 1072 return; 1073 } 1074 case PPC::MFOCRF: 1075 case PPC::MFOCRF8: 1076 if (!Subtarget->hasMFOCRF()) { 1077 // Transform: %r3 = MFOCRF %cr7 1078 // Into: %r3 = MFCR ;; cr7 1079 unsigned NewOpcode = 1080 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1081 OutStreamer->AddComment(PPCInstPrinter:: 1082 getRegisterName(MI->getOperand(1).getReg())); 1083 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1084 .addReg(MI->getOperand(0).getReg())); 1085 return; 1086 } 1087 break; 1088 case PPC::MTOCRF: 1089 case PPC::MTOCRF8: 1090 if (!Subtarget->hasMFOCRF()) { 1091 // Transform: %cr7 = MTOCRF %r3 1092 // Into: MTCRF mask, %r3 ;; cr7 1093 unsigned NewOpcode = 1094 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1095 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1096 ->getEncodingValue(MI->getOperand(0).getReg()); 1097 OutStreamer->AddComment(PPCInstPrinter:: 1098 getRegisterName(MI->getOperand(0).getReg())); 1099 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1100 .addImm(Mask) 1101 .addReg(MI->getOperand(1).getReg())); 1102 return; 1103 } 1104 break; 1105 case PPC::LD: 1106 case PPC::STD: 1107 case PPC::LWA_32: 1108 case PPC::LWA: { 1109 // Verify alignment is legal, so we don't create relocations 1110 // that can't be supported. 1111 // FIXME: This test is currently disabled for Darwin. The test 1112 // suite shows a handful of test cases that fail this check for 1113 // Darwin. Those need to be investigated before this sanity test 1114 // can be enabled for those subtargets. 1115 if (!Subtarget->isDarwin()) { 1116 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1117 const MachineOperand &MO = MI->getOperand(OpNum); 1118 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1119 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1120 } 1121 // Now process the instruction normally. 1122 break; 1123 } 1124 } 1125 1126 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1127 EmitToStreamer(*OutStreamer, TmpInst); 1128 } 1129 1130 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1131 if (!Subtarget->isPPC64()) 1132 return PPCAsmPrinter::EmitInstruction(MI); 1133 1134 switch (MI->getOpcode()) { 1135 default: 1136 return PPCAsmPrinter::EmitInstruction(MI); 1137 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1138 // .begin: 1139 // b .end # lis 0, FuncId[16..32] 1140 // nop # li 0, FuncId[0..15] 1141 // std 0, -8(1) 1142 // mflr 0 1143 // bl __xray_FunctionEntry 1144 // mtlr 0 1145 // .end: 1146 // 1147 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1148 // of instructions change. 1149 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1150 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1151 OutStreamer->EmitLabel(BeginOfSled); 1152 EmitToStreamer(*OutStreamer, 1153 MCInstBuilder(PPC::B).addExpr( 1154 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1155 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1156 EmitToStreamer( 1157 *OutStreamer, 1158 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1159 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1160 EmitToStreamer(*OutStreamer, 1161 MCInstBuilder(PPC::BL8_NOP) 1162 .addExpr(MCSymbolRefExpr::create( 1163 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1164 OutContext))); 1165 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1166 OutStreamer->EmitLabel(EndOfSled); 1167 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1168 break; 1169 } 1170 case TargetOpcode::PATCHABLE_RET: { 1171 unsigned RetOpcode = MI->getOperand(0).getImm(); 1172 MCInst RetInst; 1173 RetInst.setOpcode(RetOpcode); 1174 for (const auto &MO : 1175 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1176 MCOperand MCOp; 1177 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1178 RetInst.addOperand(MCOp); 1179 } 1180 1181 bool IsConditional; 1182 if (RetOpcode == PPC::BCCLR) { 1183 IsConditional = true; 1184 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1185 RetOpcode == PPC::TCRETURNai8) { 1186 break; 1187 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1188 IsConditional = false; 1189 } else { 1190 EmitToStreamer(*OutStreamer, RetInst); 1191 break; 1192 } 1193 1194 MCSymbol *FallthroughLabel; 1195 if (IsConditional) { 1196 // Before: 1197 // bgtlr cr0 1198 // 1199 // After: 1200 // ble cr0, .end 1201 // .p2align 3 1202 // .begin: 1203 // blr # lis 0, FuncId[16..32] 1204 // nop # li 0, FuncId[0..15] 1205 // std 0, -8(1) 1206 // mflr 0 1207 // bl __xray_FunctionExit 1208 // mtlr 0 1209 // blr 1210 // .end: 1211 // 1212 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1213 // of instructions change. 1214 FallthroughLabel = OutContext.createTempSymbol(); 1215 EmitToStreamer( 1216 *OutStreamer, 1217 MCInstBuilder(PPC::BCC) 1218 .addImm(PPC::InvertPredicate( 1219 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1220 .addReg(MI->getOperand(2).getReg()) 1221 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1222 RetInst = MCInst(); 1223 RetInst.setOpcode(PPC::BLR8); 1224 } 1225 // .p2align 3 1226 // .begin: 1227 // b(lr)? # lis 0, FuncId[16..32] 1228 // nop # li 0, FuncId[0..15] 1229 // std 0, -8(1) 1230 // mflr 0 1231 // bl __xray_FunctionExit 1232 // mtlr 0 1233 // b(lr)? 1234 // 1235 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1236 // of instructions change. 1237 OutStreamer->EmitCodeAlignment(8); 1238 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1239 OutStreamer->EmitLabel(BeginOfSled); 1240 EmitToStreamer(*OutStreamer, RetInst); 1241 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1242 EmitToStreamer( 1243 *OutStreamer, 1244 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1245 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1246 EmitToStreamer(*OutStreamer, 1247 MCInstBuilder(PPC::BL8_NOP) 1248 .addExpr(MCSymbolRefExpr::create( 1249 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1250 OutContext))); 1251 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1252 EmitToStreamer(*OutStreamer, RetInst); 1253 if (IsConditional) 1254 OutStreamer->EmitLabel(FallthroughLabel); 1255 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1256 break; 1257 } 1258 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1259 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1260 case TargetOpcode::PATCHABLE_TAIL_CALL: 1261 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1262 // normal function exit from a tail exit. 1263 llvm_unreachable("Tail call is handled in the normal case. See comments " 1264 "around this assert."); 1265 } 1266 } 1267 1268 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1269 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1270 PPCTargetStreamer *TS = 1271 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1272 1273 if (TS) 1274 TS->emitAbiVersion(2); 1275 } 1276 1277 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1278 !isPositionIndependent()) 1279 return AsmPrinter::EmitStartOfAsmFile(M); 1280 1281 if (M.getPICLevel() == PICLevel::SmallPIC) 1282 return AsmPrinter::EmitStartOfAsmFile(M); 1283 1284 OutStreamer->SwitchSection(OutContext.getELFSection( 1285 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1286 1287 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1288 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1289 1290 OutStreamer->EmitLabel(CurrentPos); 1291 1292 // The GOT pointer points to the middle of the GOT, in order to reference the 1293 // entire 64kB range. 0x8000 is the midpoint. 1294 const MCExpr *tocExpr = 1295 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1296 MCConstantExpr::create(0x8000, OutContext), 1297 OutContext); 1298 1299 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1300 1301 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1302 } 1303 1304 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1305 // linux/ppc32 - Normal entry label. 1306 if (!Subtarget->isPPC64() && 1307 (!isPositionIndependent() || 1308 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1309 return AsmPrinter::EmitFunctionEntryLabel(); 1310 1311 if (!Subtarget->isPPC64()) { 1312 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1313 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1314 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1315 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1316 OutStreamer->EmitLabel(RelocSymbol); 1317 1318 const MCExpr *OffsExpr = 1319 MCBinaryExpr::createSub( 1320 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1321 OutContext), 1322 MCSymbolRefExpr::create(PICBase, OutContext), 1323 OutContext); 1324 OutStreamer->EmitValue(OffsExpr, 4); 1325 OutStreamer->EmitLabel(CurrentFnSym); 1326 return; 1327 } else 1328 return AsmPrinter::EmitFunctionEntryLabel(); 1329 } 1330 1331 // ELFv2 ABI - Normal entry label. 1332 if (Subtarget->isELFv2ABI()) { 1333 // In the Large code model, we allow arbitrary displacements between 1334 // the text section and its associated TOC section. We place the 1335 // full 8-byte offset to the TOC in memory immediately preceding 1336 // the function global entry point. 1337 if (TM.getCodeModel() == CodeModel::Large 1338 && !MF->getRegInfo().use_empty(PPC::X2)) { 1339 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1340 1341 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1342 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1343 const MCExpr *TOCDeltaExpr = 1344 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1345 MCSymbolRefExpr::create(GlobalEPSymbol, 1346 OutContext), 1347 OutContext); 1348 1349 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1350 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1351 } 1352 return AsmPrinter::EmitFunctionEntryLabel(); 1353 } 1354 1355 // Emit an official procedure descriptor. 1356 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1357 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1358 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1359 OutStreamer->SwitchSection(Section); 1360 OutStreamer->EmitLabel(CurrentFnSym); 1361 OutStreamer->EmitValueToAlignment(8); 1362 MCSymbol *Symbol1 = CurrentFnSymForSize; 1363 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1364 // entry point. 1365 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1366 8 /*size*/); 1367 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1368 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1369 OutStreamer->EmitValue( 1370 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1371 8/*size*/); 1372 // Emit a null environment pointer. 1373 OutStreamer->EmitIntValue(0, 8 /* size */); 1374 OutStreamer->SwitchSection(Current.first, Current.second); 1375 } 1376 1377 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1378 const DataLayout &DL = getDataLayout(); 1379 1380 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1381 1382 PPCTargetStreamer &TS = 1383 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1384 1385 if (!TOC.empty()) { 1386 MCSectionELF *Section; 1387 1388 if (isPPC64) 1389 Section = OutStreamer->getContext().getELFSection( 1390 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1391 else 1392 Section = OutStreamer->getContext().getELFSection( 1393 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1394 OutStreamer->SwitchSection(Section); 1395 1396 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1397 E = TOC.end(); I != E; ++I) { 1398 OutStreamer->EmitLabel(I->second); 1399 MCSymbol *S = I->first; 1400 if (isPPC64) { 1401 TS.emitTCEntry(*S); 1402 } else { 1403 OutStreamer->EmitValueToAlignment(4); 1404 OutStreamer->EmitSymbolValue(S, 4); 1405 } 1406 } 1407 } 1408 1409 return AsmPrinter::doFinalization(M); 1410 } 1411 1412 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1413 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1414 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1415 // provide two entry points. The ABI guarantees that when calling the 1416 // local entry point, r2 is set up by the caller to contain the TOC base 1417 // for this function, and when calling the global entry point, r12 is set 1418 // up by the caller to hold the address of the global entry point. We 1419 // thus emit a prefix sequence along the following lines: 1420 // 1421 // func: 1422 // .Lfunc_gepNN: 1423 // # global entry point 1424 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1425 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1426 // .Lfunc_lepNN: 1427 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1428 // # local entry point, followed by function body 1429 // 1430 // For the Large code model, we create 1431 // 1432 // .Lfunc_tocNN: 1433 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1434 // func: 1435 // .Lfunc_gepNN: 1436 // # global entry point 1437 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1438 // add r2,r2,r12 1439 // .Lfunc_lepNN: 1440 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1441 // # local entry point, followed by function body 1442 // 1443 // This ensures we have r2 set up correctly while executing the function 1444 // body, no matter which entry point is called. 1445 if (Subtarget->isELFv2ABI() 1446 // Only do all that if the function uses r2 in the first place. 1447 && !MF->getRegInfo().use_empty(PPC::X2)) { 1448 // Note: The logic here must be synchronized with the code in the 1449 // branch-selection pass which sets the offset of the first block in the 1450 // function. This matters because it affects the alignment. 1451 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1452 1453 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1454 OutStreamer->EmitLabel(GlobalEntryLabel); 1455 const MCSymbolRefExpr *GlobalEntryLabelExp = 1456 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1457 1458 if (TM.getCodeModel() != CodeModel::Large) { 1459 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1460 const MCExpr *TOCDeltaExpr = 1461 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1462 GlobalEntryLabelExp, OutContext); 1463 1464 const MCExpr *TOCDeltaHi = 1465 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1466 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1467 .addReg(PPC::X2) 1468 .addReg(PPC::X12) 1469 .addExpr(TOCDeltaHi)); 1470 1471 const MCExpr *TOCDeltaLo = 1472 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1473 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1474 .addReg(PPC::X2) 1475 .addReg(PPC::X2) 1476 .addExpr(TOCDeltaLo)); 1477 } else { 1478 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1479 const MCExpr *TOCOffsetDeltaExpr = 1480 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1481 GlobalEntryLabelExp, OutContext); 1482 1483 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1484 .addReg(PPC::X2) 1485 .addExpr(TOCOffsetDeltaExpr) 1486 .addReg(PPC::X12)); 1487 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1488 .addReg(PPC::X2) 1489 .addReg(PPC::X2) 1490 .addReg(PPC::X12)); 1491 } 1492 1493 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1494 OutStreamer->EmitLabel(LocalEntryLabel); 1495 const MCSymbolRefExpr *LocalEntryLabelExp = 1496 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1497 const MCExpr *LocalOffsetExp = 1498 MCBinaryExpr::createSub(LocalEntryLabelExp, 1499 GlobalEntryLabelExp, OutContext); 1500 1501 PPCTargetStreamer *TS = 1502 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1503 1504 if (TS) 1505 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1506 } 1507 } 1508 1509 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1510 /// directive. 1511 /// 1512 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1513 // Only the 64-bit target requires a traceback table. For now, 1514 // we only emit the word of zeroes that GDB requires to find 1515 // the end of the function, and zeroes for the eight-byte 1516 // mandatory fields. 1517 // FIXME: We should fill in the eight-byte mandatory fields as described in 1518 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1519 // currently make use of these fields). 1520 if (Subtarget->isPPC64()) { 1521 OutStreamer->EmitIntValue(0, 4/*size*/); 1522 OutStreamer->EmitIntValue(0, 8/*size*/); 1523 } 1524 } 1525 1526 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1527 static const char *const CPUDirectives[] = { 1528 "", 1529 "ppc", 1530 "ppc440", 1531 "ppc601", 1532 "ppc602", 1533 "ppc603", 1534 "ppc7400", 1535 "ppc750", 1536 "ppc970", 1537 "ppcA2", 1538 "ppce500", 1539 "ppce500mc", 1540 "ppce5500", 1541 "power3", 1542 "power4", 1543 "power5", 1544 "power5x", 1545 "power6", 1546 "power6x", 1547 "power7", 1548 // FIXME: why is power8 missing here? 1549 "ppc64", 1550 "ppc64le", 1551 "power9" 1552 }; 1553 1554 // Get the numerically largest directive. 1555 // FIXME: How should we merge darwin directives? 1556 unsigned Directive = PPC::DIR_NONE; 1557 for (const Function &F : M) { 1558 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1559 unsigned FDir = STI.getDarwinDirective(); 1560 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1561 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1562 Directive = PPC::DIR_970; 1563 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1564 Directive = PPC::DIR_7400; 1565 if (STI.isPPC64() && Directive < PPC::DIR_64) 1566 Directive = PPC::DIR_64; 1567 } 1568 1569 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1570 1571 assert(Directive < array_lengthof(CPUDirectives) && 1572 "CPUDirectives[] might not be up-to-date!"); 1573 PPCTargetStreamer &TStreamer = 1574 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1575 TStreamer.emitMachine(CPUDirectives[Directive]); 1576 1577 // Prime text sections so they are adjacent. This reduces the likelihood a 1578 // large data or debug section causes a branch to exceed 16M limit. 1579 const TargetLoweringObjectFileMachO &TLOFMacho = 1580 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1581 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1582 if (TM.getRelocationModel() == Reloc::PIC_) { 1583 OutStreamer->SwitchSection( 1584 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1585 MachO::S_SYMBOL_STUBS | 1586 MachO::S_ATTR_PURE_INSTRUCTIONS, 1587 32, SectionKind::getText())); 1588 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1589 OutStreamer->SwitchSection( 1590 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1591 MachO::S_SYMBOL_STUBS | 1592 MachO::S_ATTR_PURE_INSTRUCTIONS, 1593 16, SectionKind::getText())); 1594 } 1595 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1596 } 1597 1598 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1599 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1600 1601 // Darwin/PPC always uses mach-o. 1602 const TargetLoweringObjectFileMachO &TLOFMacho = 1603 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1604 if (MMI) { 1605 MachineModuleInfoMachO &MMIMacho = 1606 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1607 1608 if (MAI->doesSupportExceptionHandling()) { 1609 // Add the (possibly multiple) personalities to the set of global values. 1610 // Only referenced functions get into the Personalities list. 1611 for (const Function *Personality : MMI->getPersonalities()) { 1612 if (Personality) { 1613 MCSymbol *NLPSym = 1614 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1615 MachineModuleInfoImpl::StubValueTy &StubSym = 1616 MMIMacho.getGVStubEntry(NLPSym); 1617 StubSym = 1618 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1619 } 1620 } 1621 } 1622 1623 // Output stubs for dynamically-linked functions. 1624 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1625 1626 // Output macho stubs for external and common global variables. 1627 if (!Stubs.empty()) { 1628 // Switch with ".non_lazy_symbol_pointer" directive. 1629 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1630 EmitAlignment(isPPC64 ? llvm::Align(8) : llvm::Align(4)); 1631 1632 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1633 // L_foo$stub: 1634 OutStreamer->EmitLabel(Stubs[i].first); 1635 // .indirect_symbol _foo 1636 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1637 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1638 MCSA_IndirectSymbol); 1639 1640 if (MCSym.getInt()) 1641 // External to current translation unit. 1642 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1643 else 1644 // Internal to current translation unit. 1645 // 1646 // When we place the LSDA into the TEXT section, the type info 1647 // pointers 1648 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1649 // However, sometimes the types are local to the file. So we need to 1650 // fill in the value for the NLP in those cases. 1651 OutStreamer->EmitValue( 1652 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1653 isPPC64 ? 8 : 4 /*size*/); 1654 } 1655 1656 Stubs.clear(); 1657 OutStreamer->AddBlankLine(); 1658 } 1659 } 1660 1661 // Funny Darwin hack: This flag tells the linker that no global symbols 1662 // contain code that falls through to other global symbols (e.g. the obvious 1663 // implementation of multiple entry points). If this doesn't occur, the 1664 // linker can safely perform dead code stripping. Since LLVM never generates 1665 // code that does this, it is always safe to set. 1666 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1667 1668 return AsmPrinter::doFinalization(M); 1669 } 1670 1671 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { 1672 // Early error checking limiting what is supported. 1673 if (GV->isThreadLocal()) 1674 report_fatal_error("Thread local not yet supported on AIX."); 1675 1676 if (GV->hasSection()) 1677 report_fatal_error("Custom section for Data not yet supported."); 1678 1679 if (GV->hasComdat()) 1680 report_fatal_error("COMDAT not yet supported by AIX."); 1681 1682 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1683 if (!GVKind.isCommon() && !GVKind.isBSSLocal() && !GVKind.isData()) 1684 report_fatal_error("Encountered a global variable kind that is " 1685 "not supported yet."); 1686 1687 // Create the containing csect and switch to it. 1688 MCSectionXCOFF *CSect = cast<MCSectionXCOFF>( 1689 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1690 OutStreamer->SwitchSection(CSect); 1691 1692 // Create the symbol, set its storage class, and emit it. 1693 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 1694 GVSym->setStorageClass( 1695 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 1696 GVSym->setContainingCsect(CSect); 1697 1698 const DataLayout &DL = GV->getParent()->getDataLayout(); 1699 1700 // Handle common symbols. 1701 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1702 unsigned Align = 1703 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV); 1704 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType()); 1705 1706 if (GVKind.isBSSLocal()) 1707 OutStreamer->EmitXCOFFLocalCommonSymbol(GVSym, Size, Align); 1708 else 1709 OutStreamer->EmitCommonSymbol(GVSym, Size, Align); 1710 return; 1711 } 1712 1713 MCSymbol *EmittedInitSym = GVSym; 1714 EmitLinkage(GV, EmittedInitSym); 1715 EmitAlignment(getGVAlignment(GV, DL), GV); 1716 OutStreamer->EmitLabel(EmittedInitSym); 1717 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 1718 } 1719 1720 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1721 /// for a MachineFunction to the given output stream, in a format that the 1722 /// Darwin assembler can deal with. 1723 /// 1724 static AsmPrinter * 1725 createPPCAsmPrinterPass(TargetMachine &tm, 1726 std::unique_ptr<MCStreamer> &&Streamer) { 1727 if (tm.getTargetTriple().isMacOSX()) 1728 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1729 if (tm.getTargetTriple().isOSAIX()) 1730 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1731 1732 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1733 } 1734 1735 // Force static initialization. 1736 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1737 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1738 createPPCAsmPrinterPass); 1739 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1740 createPPCAsmPrinterPass); 1741 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1742 createPPCAsmPrinterPass); 1743 } 1744