1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCSectionXCOFF.h" 55 #include "llvm/MC/MCStreamer.h" 56 #include "llvm/MC/MCSymbol.h" 57 #include "llvm/MC/MCSymbolELF.h" 58 #include "llvm/MC/MCSymbolXCOFF.h" 59 #include "llvm/MC/SectionKind.h" 60 #include "llvm/Support/Casting.h" 61 #include "llvm/Support/CodeGen.h" 62 #include "llvm/Support/Debug.h" 63 #include "llvm/Support/ErrorHandling.h" 64 #include "llvm/Support/TargetRegistry.h" 65 #include "llvm/Support/raw_ostream.h" 66 #include "llvm/Target/TargetMachine.h" 67 #include <algorithm> 68 #include <cassert> 69 #include <cstdint> 70 #include <memory> 71 #include <new> 72 73 using namespace llvm; 74 75 #define DEBUG_TYPE "asmprinter" 76 77 namespace { 78 79 class PPCAsmPrinter : public AsmPrinter { 80 protected: 81 MapVector<const MCSymbol *, MCSymbol *> TOC; 82 const PPCSubtarget *Subtarget; 83 StackMaps SM; 84 85 public: 86 explicit PPCAsmPrinter(TargetMachine &TM, 87 std::unique_ptr<MCStreamer> Streamer) 88 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 89 90 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 91 92 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym); 93 94 bool doInitialization(Module &M) override { 95 if (!TOC.empty()) 96 TOC.clear(); 97 return AsmPrinter::doInitialization(M); 98 } 99 100 void EmitInstruction(const MachineInstr *MI) override; 101 102 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 103 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 104 /// The \p MI would be INLINEASM ONLY. 105 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 106 107 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 108 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 111 const char *ExtraCode, raw_ostream &O) override; 112 113 void EmitEndOfAsmFile(Module &M) override; 114 115 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 116 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 117 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 118 bool runOnMachineFunction(MachineFunction &MF) override { 119 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 120 bool Changed = AsmPrinter::runOnMachineFunction(MF); 121 emitXRayTable(); 122 return Changed; 123 } 124 }; 125 126 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 127 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 128 public: 129 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 130 std::unique_ptr<MCStreamer> Streamer) 131 : PPCAsmPrinter(TM, std::move(Streamer)) {} 132 133 StringRef getPassName() const override { 134 return "Linux PPC Assembly Printer"; 135 } 136 137 bool doFinalization(Module &M) override; 138 void EmitStartOfAsmFile(Module &M) override; 139 140 void EmitFunctionEntryLabel() override; 141 142 void EmitFunctionBodyStart() override; 143 void EmitFunctionBodyEnd() override; 144 void EmitInstruction(const MachineInstr *MI) override; 145 }; 146 147 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 148 /// OS X 149 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 150 public: 151 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 152 std::unique_ptr<MCStreamer> Streamer) 153 : PPCAsmPrinter(TM, std::move(Streamer)) {} 154 155 StringRef getPassName() const override { 156 return "Darwin PPC Assembly Printer"; 157 } 158 159 bool doFinalization(Module &M) override; 160 void EmitStartOfAsmFile(Module &M) override; 161 }; 162 163 class PPCAIXAsmPrinter : public PPCAsmPrinter { 164 public: 165 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 166 : PPCAsmPrinter(TM, std::move(Streamer)) {} 167 168 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 169 170 void SetupMachineFunction(MachineFunction &MF) override; 171 172 void EmitGlobalVariable(const GlobalVariable *GV) override; 173 174 void EmitFunctionDescriptor() override; 175 176 void EmitEndOfAsmFile(Module &) override; 177 }; 178 179 } // end anonymous namespace 180 181 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 182 raw_ostream &O) { 183 // Computing the address of a global symbol, not calling it. 184 const GlobalValue *GV = MO.getGlobal(); 185 MCSymbol *SymToPrint; 186 187 // External or weakly linked global variables need non-lazily-resolved stubs 188 if (Subtarget->hasLazyResolverStub(GV)) { 189 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 190 MachineModuleInfoImpl::StubValueTy &StubSym = 191 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 192 SymToPrint); 193 if (!StubSym.getPointer()) 194 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 195 !GV->hasInternalLinkage()); 196 } else { 197 SymToPrint = getSymbol(GV); 198 } 199 200 SymToPrint->print(O, MAI); 201 202 printOffset(MO.getOffset(), O); 203 } 204 205 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 206 raw_ostream &O) { 207 const DataLayout &DL = getDataLayout(); 208 const MachineOperand &MO = MI->getOperand(OpNo); 209 210 switch (MO.getType()) { 211 case MachineOperand::MO_Register: { 212 // The MI is INLINEASM ONLY and UseVSXReg is always false. 213 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 214 215 // Linux assembler (Others?) does not take register mnemonics. 216 // FIXME - What about special registers used in mfspr/mtspr? 217 if (!Subtarget->isDarwin()) 218 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 219 O << RegName; 220 return; 221 } 222 case MachineOperand::MO_Immediate: 223 O << MO.getImm(); 224 return; 225 226 case MachineOperand::MO_MachineBasicBlock: 227 MO.getMBB()->getSymbol()->print(O, MAI); 228 return; 229 case MachineOperand::MO_ConstantPoolIndex: 230 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 231 << MO.getIndex(); 232 return; 233 case MachineOperand::MO_BlockAddress: 234 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 235 return; 236 case MachineOperand::MO_GlobalAddress: { 237 PrintSymbolOperand(MO, O); 238 return; 239 } 240 241 default: 242 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 243 return; 244 } 245 } 246 247 /// PrintAsmOperand - Print out an operand for an inline asm expression. 248 /// 249 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 250 const char *ExtraCode, raw_ostream &O) { 251 // Does this asm operand have a single letter operand modifier? 252 if (ExtraCode && ExtraCode[0]) { 253 if (ExtraCode[1] != 0) return true; // Unknown modifier. 254 255 switch (ExtraCode[0]) { 256 default: 257 // See if this is a generic print operand 258 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 259 case 'L': // Write second word of DImode reference. 260 // Verify that this operand has two consecutive registers. 261 if (!MI->getOperand(OpNo).isReg() || 262 OpNo+1 == MI->getNumOperands() || 263 !MI->getOperand(OpNo+1).isReg()) 264 return true; 265 ++OpNo; // Return the high-part. 266 break; 267 case 'I': 268 // Write 'i' if an integer constant, otherwise nothing. Used to print 269 // addi vs add, etc. 270 if (MI->getOperand(OpNo).isImm()) 271 O << "i"; 272 return false; 273 case 'x': 274 if(!MI->getOperand(OpNo).isReg()) 275 return true; 276 // This operand uses VSX numbering. 277 // If the operand is a VMX register, convert it to a VSX register. 278 Register Reg = MI->getOperand(OpNo).getReg(); 279 if (PPCInstrInfo::isVRRegister(Reg)) 280 Reg = PPC::VSX32 + (Reg - PPC::V0); 281 else if (PPCInstrInfo::isVFRegister(Reg)) 282 Reg = PPC::VSX32 + (Reg - PPC::VF0); 283 const char *RegName; 284 RegName = PPCInstPrinter::getRegisterName(Reg); 285 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 286 O << RegName; 287 return false; 288 } 289 } 290 291 printOperand(MI, OpNo, O); 292 return false; 293 } 294 295 // At the moment, all inline asm memory operands are a single register. 296 // In any case, the output of this routine should always be just one 297 // assembler operand. 298 299 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 300 const char *ExtraCode, 301 raw_ostream &O) { 302 if (ExtraCode && ExtraCode[0]) { 303 if (ExtraCode[1] != 0) return true; // Unknown modifier. 304 305 switch (ExtraCode[0]) { 306 default: return true; // Unknown modifier. 307 case 'y': // A memory reference for an X-form instruction 308 { 309 const char *RegName = "r0"; 310 if (!Subtarget->isDarwin()) 311 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 312 O << RegName << ", "; 313 printOperand(MI, OpNo, O); 314 return false; 315 } 316 case 'U': // Print 'u' for update form. 317 case 'X': // Print 'x' for indexed form. 318 { 319 // FIXME: Currently for PowerPC memory operands are always loaded 320 // into a register, so we never get an update or indexed form. 321 // This is bad even for offset forms, since even if we know we 322 // have a value in -16(r1), we will generate a load into r<n> 323 // and then load from 0(r<n>). Until that issue is fixed, 324 // tolerate 'U' and 'X' but don't output anything. 325 assert(MI->getOperand(OpNo).isReg()); 326 return false; 327 } 328 } 329 } 330 331 assert(MI->getOperand(OpNo).isReg()); 332 O << "0("; 333 printOperand(MI, OpNo, O); 334 O << ")"; 335 return false; 336 } 337 338 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 339 /// exists for it. If not, create one. Then return a symbol that references 340 /// the TOC entry. 341 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym) { 342 MCSymbol *&TOCEntry = TOC[Sym]; 343 if (!TOCEntry) 344 TOCEntry = createTempSymbol("C"); 345 return TOCEntry; 346 } 347 348 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 349 emitStackMaps(SM); 350 } 351 352 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 353 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 354 355 SM.recordStackMap(MI); 356 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 357 358 // Scan ahead to trim the shadow. 359 const MachineBasicBlock &MBB = *MI.getParent(); 360 MachineBasicBlock::const_iterator MII(MI); 361 ++MII; 362 while (NumNOPBytes > 0) { 363 if (MII == MBB.end() || MII->isCall() || 364 MII->getOpcode() == PPC::DBG_VALUE || 365 MII->getOpcode() == TargetOpcode::PATCHPOINT || 366 MII->getOpcode() == TargetOpcode::STACKMAP) 367 break; 368 ++MII; 369 NumNOPBytes -= 4; 370 } 371 372 // Emit nops. 373 for (unsigned i = 0; i < NumNOPBytes; i += 4) 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 375 } 376 377 // Lower a patchpoint of the form: 378 // [<def>], <id>, <numBytes>, <target>, <numArgs> 379 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 380 SM.recordPatchPoint(MI); 381 PatchPointOpers Opers(&MI); 382 383 unsigned EncodedBytes = 0; 384 const MachineOperand &CalleeMO = Opers.getCallTarget(); 385 386 if (CalleeMO.isImm()) { 387 int64_t CallTarget = CalleeMO.getImm(); 388 if (CallTarget) { 389 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 390 "High 16 bits of call target should be zero."); 391 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 392 EncodedBytes = 0; 393 // Materialize the jump address: 394 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 395 .addReg(ScratchReg) 396 .addImm((CallTarget >> 32) & 0xFFFF)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 399 .addReg(ScratchReg) 400 .addReg(ScratchReg) 401 .addImm(32).addImm(16)); 402 ++EncodedBytes; 403 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 404 .addReg(ScratchReg) 405 .addReg(ScratchReg) 406 .addImm((CallTarget >> 16) & 0xFFFF)); 407 ++EncodedBytes; 408 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 409 .addReg(ScratchReg) 410 .addReg(ScratchReg) 411 .addImm(CallTarget & 0xFFFF)); 412 413 // Save the current TOC pointer before the remote call. 414 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 415 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 416 .addReg(PPC::X2) 417 .addImm(TOCSaveOffset) 418 .addReg(PPC::X1)); 419 ++EncodedBytes; 420 421 // If we're on ELFv1, then we need to load the actual function pointer 422 // from the function descriptor. 423 if (!Subtarget->isELFv2ABI()) { 424 // Load the new TOC pointer and the function address, but not r11 425 // (needing this is rare, and loading it here would prevent passing it 426 // via a 'nest' parameter. 427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 428 .addReg(PPC::X2) 429 .addImm(8) 430 .addReg(ScratchReg)); 431 ++EncodedBytes; 432 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 433 .addReg(ScratchReg) 434 .addImm(0) 435 .addReg(ScratchReg)); 436 ++EncodedBytes; 437 } 438 439 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 440 .addReg(ScratchReg)); 441 ++EncodedBytes; 442 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 443 ++EncodedBytes; 444 445 // Restore the TOC pointer after the call. 446 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 447 .addReg(PPC::X2) 448 .addImm(TOCSaveOffset) 449 .addReg(PPC::X1)); 450 ++EncodedBytes; 451 } 452 } else if (CalleeMO.isGlobal()) { 453 const GlobalValue *GValue = CalleeMO.getGlobal(); 454 MCSymbol *MOSymbol = getSymbol(GValue); 455 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 456 457 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 458 .addExpr(SymVar)); 459 EncodedBytes += 2; 460 } 461 462 // Each instruction is 4 bytes. 463 EncodedBytes *= 4; 464 465 // Emit padding. 466 unsigned NumBytes = Opers.getNumPatchBytes(); 467 assert(NumBytes >= EncodedBytes && 468 "Patchpoint can't request size less than the length of a call."); 469 assert((NumBytes - EncodedBytes) % 4 == 0 && 470 "Invalid number of NOP bytes requested!"); 471 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 472 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 473 } 474 475 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 476 /// call to __tls_get_addr to the current output stream. 477 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 478 MCSymbolRefExpr::VariantKind VK) { 479 StringRef Name = "__tls_get_addr"; 480 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 481 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 482 const Module *M = MF->getFunction().getParent(); 483 484 assert(MI->getOperand(0).isReg() && 485 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 486 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 487 "GETtls[ld]ADDR[32] must define GPR3"); 488 assert(MI->getOperand(1).isReg() && 489 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 490 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 491 "GETtls[ld]ADDR[32] must read GPR3"); 492 493 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 494 isPositionIndependent()) 495 Kind = MCSymbolRefExpr::VK_PLT; 496 const MCExpr *TlsRef = 497 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 498 499 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 500 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 501 M->getPICLevel() == PICLevel::BigPIC) 502 TlsRef = MCBinaryExpr::createAdd( 503 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 504 const MachineOperand &MO = MI->getOperand(2); 505 const GlobalValue *GValue = MO.getGlobal(); 506 MCSymbol *MOSymbol = getSymbol(GValue); 507 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 508 EmitToStreamer(*OutStreamer, 509 MCInstBuilder(Subtarget->isPPC64() ? 510 PPC::BL8_NOP_TLS : PPC::BL_TLS) 511 .addExpr(TlsRef) 512 .addExpr(SymVar)); 513 } 514 515 /// Map a machine operand for a TOC pseudo-machine instruction to its 516 /// corresponding MCSymbol. 517 static MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO, 518 AsmPrinter &AP) { 519 switch (MO.getType()) { 520 case MachineOperand::MO_GlobalAddress: 521 return AP.getSymbol(MO.getGlobal()); 522 case MachineOperand::MO_ConstantPoolIndex: 523 return AP.GetCPISymbol(MO.getIndex()); 524 case MachineOperand::MO_JumpTableIndex: 525 return AP.GetJTISymbol(MO.getIndex()); 526 case MachineOperand::MO_BlockAddress: 527 return AP.GetBlockAddressSymbol(MO.getBlockAddress()); 528 default: 529 llvm_unreachable("Unexpected operand type to get symbol."); 530 } 531 } 532 533 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 534 /// the current output stream. 535 /// 536 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 537 MCInst TmpInst; 538 const bool IsDarwin = TM.getTargetTriple().isOSDarwin(); 539 const bool IsAIX = Subtarget->isAIXABI(); 540 const Module *M = MF->getFunction().getParent(); 541 PICLevel::Level PL = M->getPICLevel(); 542 543 #ifndef NDEBUG 544 // Validate that SPE and FPU are mutually exclusive in codegen 545 if (!MI->isInlineAsm()) { 546 for (const MachineOperand &MO: MI->operands()) { 547 if (MO.isReg()) { 548 Register Reg = MO.getReg(); 549 if (Subtarget->hasSPE()) { 550 if (PPC::F4RCRegClass.contains(Reg) || 551 PPC::F8RCRegClass.contains(Reg) || 552 PPC::QBRCRegClass.contains(Reg) || 553 PPC::QFRCRegClass.contains(Reg) || 554 PPC::QSRCRegClass.contains(Reg) || 555 PPC::VFRCRegClass.contains(Reg) || 556 PPC::VRRCRegClass.contains(Reg) || 557 PPC::VSFRCRegClass.contains(Reg) || 558 PPC::VSSRCRegClass.contains(Reg) 559 ) 560 llvm_unreachable("SPE targets cannot have FPRegs!"); 561 } else { 562 if (PPC::SPERCRegClass.contains(Reg)) 563 llvm_unreachable("SPE register found in FPU-targeted code!"); 564 } 565 } 566 } 567 } 568 #endif 569 // Lower multi-instruction pseudo operations. 570 switch (MI->getOpcode()) { 571 default: break; 572 case TargetOpcode::DBG_VALUE: 573 llvm_unreachable("Should be handled target independently"); 574 case TargetOpcode::STACKMAP: 575 return LowerSTACKMAP(SM, *MI); 576 case TargetOpcode::PATCHPOINT: 577 return LowerPATCHPOINT(SM, *MI); 578 579 case PPC::MoveGOTtoLR: { 580 // Transform %lr = MoveGOTtoLR 581 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 582 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 583 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 584 // blrl 585 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 586 MCSymbol *GOTSymbol = 587 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 588 const MCExpr *OffsExpr = 589 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 590 MCSymbolRefExpr::VK_PPC_LOCAL, 591 OutContext), 592 MCConstantExpr::create(4, OutContext), 593 OutContext); 594 595 // Emit the 'bl'. 596 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 597 return; 598 } 599 case PPC::MovePCtoLR: 600 case PPC::MovePCtoLR8: { 601 // Transform %lr = MovePCtoLR 602 // Into this, where the label is the PIC base: 603 // bl L1$pb 604 // L1$pb: 605 MCSymbol *PICBase = MF->getPICBaseSymbol(); 606 607 // Emit the 'bl'. 608 EmitToStreamer(*OutStreamer, 609 MCInstBuilder(PPC::BL) 610 // FIXME: We would like an efficient form for this, so we 611 // don't have to do a lot of extra uniquing. 612 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 613 614 // Emit the label. 615 OutStreamer->EmitLabel(PICBase); 616 return; 617 } 618 case PPC::UpdateGBR: { 619 // Transform %rd = UpdateGBR(%rt, %ri) 620 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 621 // add %rd, %rt, %ri 622 // or into (if secure plt mode is on): 623 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 624 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 625 // Get the offset from the GOT Base Register to the GOT 626 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 627 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 628 unsigned PICR = TmpInst.getOperand(0).getReg(); 629 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 630 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 631 : ".LTOC"); 632 const MCExpr *PB = 633 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 634 635 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 636 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 637 638 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 639 EmitToStreamer( 640 *OutStreamer, 641 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 642 643 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 644 EmitToStreamer( 645 *OutStreamer, 646 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 647 return; 648 } else { 649 MCSymbol *PICOffset = 650 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 651 TmpInst.setOpcode(PPC::LWZ); 652 const MCExpr *Exp = 653 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 654 const MCExpr *PB = 655 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 656 MCSymbolRefExpr::VK_None, 657 OutContext); 658 const MCOperand TR = TmpInst.getOperand(1); 659 const MCOperand PICR = TmpInst.getOperand(0); 660 661 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 662 TmpInst.getOperand(1) = 663 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 664 TmpInst.getOperand(0) = TR; 665 TmpInst.getOperand(2) = PICR; 666 EmitToStreamer(*OutStreamer, TmpInst); 667 668 TmpInst.setOpcode(PPC::ADD4); 669 TmpInst.getOperand(0) = PICR; 670 TmpInst.getOperand(1) = TR; 671 TmpInst.getOperand(2) = PICR; 672 EmitToStreamer(*OutStreamer, TmpInst); 673 return; 674 } 675 } 676 case PPC::LWZtoc: { 677 assert(!IsDarwin && "TOC is an ELF/XCOFF construct."); 678 679 // Transform %rN = LWZtoc @op1, %r2 680 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 681 682 // Change the opcode to LWZ. 683 TmpInst.setOpcode(PPC::LWZ); 684 685 const MachineOperand &MO = MI->getOperand(1); 686 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 687 "Invalid operand for LWZtoc."); 688 689 // Map the operand to its corresponding MCSymbol. 690 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 691 692 // Create a reference to the GOT entry for the symbol. The GOT entry will be 693 // synthesized later. 694 if (PL == PICLevel::SmallPIC && !IsAIX) { 695 const MCExpr *Exp = 696 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 697 OutContext); 698 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 699 EmitToStreamer(*OutStreamer, TmpInst); 700 return; 701 } 702 703 // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the 704 // storage allocated in the TOC which contains the address of 705 // 'MOSymbol'. Said TOC entry will be synthesized later. 706 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 707 const MCExpr *Exp = 708 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 709 710 // AIX uses the label directly as the lwz displacement operand for 711 // references into the toc section. The displacement value will be generated 712 // relative to the toc-base. 713 if (IsAIX) { 714 assert( 715 TM.getCodeModel() == CodeModel::Small && 716 "This pseudo should only be selected for 32-bit small code model."); 717 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 718 EmitToStreamer(*OutStreamer, TmpInst); 719 return; 720 } 721 722 // Create an explicit subtract expression between the local symbol and 723 // '.LTOC' to manifest the toc-relative offset. 724 const MCExpr *PB = MCSymbolRefExpr::create( 725 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 726 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 727 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 728 EmitToStreamer(*OutStreamer, TmpInst); 729 return; 730 } 731 case PPC::LDtocJTI: 732 case PPC::LDtocCPT: 733 case PPC::LDtocBA: 734 case PPC::LDtoc: { 735 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 736 737 // Transform %x3 = LDtoc @min1, %x2 738 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 739 740 // Change the opcode to LD. 741 TmpInst.setOpcode(PPC::LD); 742 743 const MachineOperand &MO = MI->getOperand(1); 744 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 745 "Invalid operand!"); 746 747 // Map the machine operand to its corresponding MCSymbol, then map the 748 // global address operand to be a reference to the TOC entry we will 749 // synthesize later. 750 MCSymbol *TOCEntry = 751 lookUpOrCreateTOCEntry(getMCSymbolForTOCPseudoMO(MO, *this)); 752 753 const MCSymbolRefExpr::VariantKind VK = 754 IsAIX ? MCSymbolRefExpr::VK_None : MCSymbolRefExpr::VK_PPC_TOC; 755 const MCExpr *Exp = 756 MCSymbolRefExpr::create(TOCEntry, VK, OutContext); 757 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 758 EmitToStreamer(*OutStreamer, TmpInst); 759 return; 760 } 761 case PPC::ADDIStocHA: { 762 assert((IsAIX && !Subtarget->isPPC64() && 763 TM.getCodeModel() == CodeModel::Large) && 764 "This pseudo should only be selected for 32-bit large code model on" 765 " AIX."); 766 767 // Transform %rd = ADDIStocHA %rA, @sym(%r2) 768 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 769 770 // Change the opcode to ADDIS. 771 TmpInst.setOpcode(PPC::ADDIS); 772 773 const MachineOperand &MO = MI->getOperand(2); 774 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 775 "Invalid operand for ADDIStocHA."); 776 777 // Map the machine operand to its corresponding MCSymbol. 778 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 779 780 // Always use TOC on AIX. Map the global address operand to be a reference 781 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 782 // reference the storage allocated in the TOC which contains the address of 783 // 'MOSymbol'. 784 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 785 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 786 MCSymbolRefExpr::VK_PPC_U, 787 OutContext); 788 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 789 EmitToStreamer(*OutStreamer, TmpInst); 790 return; 791 } 792 case PPC::LWZtocL: { 793 assert(IsAIX && !Subtarget->isPPC64() && 794 TM.getCodeModel() == CodeModel::Large && 795 "This pseudo should only be selected for 32-bit large code model on" 796 " AIX."); 797 798 // Transform %rd = LWZtocL @sym, %rs. 799 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 800 801 // Change the opcode to lwz. 802 TmpInst.setOpcode(PPC::LWZ); 803 804 const MachineOperand &MO = MI->getOperand(1); 805 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 806 "Invalid operand for LWZtocL."); 807 808 // Map the machine operand to its corresponding MCSymbol. 809 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 810 811 // Always use TOC on AIX. Map the global address operand to be a reference 812 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 813 // reference the storage allocated in the TOC which contains the address of 814 // 'MOSymbol'. 815 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 816 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 817 MCSymbolRefExpr::VK_PPC_L, 818 OutContext); 819 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 820 EmitToStreamer(*OutStreamer, TmpInst); 821 return; 822 } 823 case PPC::ADDIStocHA8: { 824 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 825 826 // Transform %xd = ADDIStocHA8 %x2, @sym 827 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 828 829 // Change the opcode to ADDIS8. If the global address is the address of 830 // an external symbol, is a jump table address, is a block address, or is a 831 // constant pool index with large code model enabled, then generate a TOC 832 // entry and reference that. Otherwise, reference the symbol directly. 833 TmpInst.setOpcode(PPC::ADDIS8); 834 835 const MachineOperand &MO = MI->getOperand(2); 836 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 837 "Invalid operand for ADDIStocHA8!"); 838 839 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 840 841 const bool GlobalToc = 842 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal()); 843 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 844 (MO.isCPI() && TM.getCodeModel() == CodeModel::Large)) 845 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 846 847 const MCSymbolRefExpr::VariantKind VK = 848 IsAIX ? MCSymbolRefExpr::VK_PPC_U : MCSymbolRefExpr::VK_PPC_TOC_HA; 849 850 const MCExpr *Exp = 851 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 852 853 if (!MO.isJTI() && MO.getOffset()) 854 Exp = MCBinaryExpr::createAdd(Exp, 855 MCConstantExpr::create(MO.getOffset(), 856 OutContext), 857 OutContext); 858 859 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 860 EmitToStreamer(*OutStreamer, TmpInst); 861 return; 862 } 863 case PPC::LDtocL: { 864 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 865 866 // Transform %xd = LDtocL @sym, %xs 867 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 868 869 // Change the opcode to LD. If the global address is the address of 870 // an external symbol, is a jump table address, is a block address, or is 871 // a constant pool index with large code model enabled, then generate a 872 // TOC entry and reference that. Otherwise, reference the symbol directly. 873 TmpInst.setOpcode(PPC::LD); 874 875 const MachineOperand &MO = MI->getOperand(1); 876 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 877 MO.isBlockAddress()) && 878 "Invalid operand for LDtocL!"); 879 880 LLVM_DEBUG(assert( 881 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 882 "LDtocL used on symbol that could be accessed directly is " 883 "invalid. Must match ADDIStocHA8.")); 884 885 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 886 887 if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large) 888 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 889 890 const MCSymbolRefExpr::VariantKind VK = 891 IsAIX ? MCSymbolRefExpr::VK_PPC_L : MCSymbolRefExpr::VK_PPC_TOC_LO; 892 const MCExpr *Exp = 893 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 894 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 895 EmitToStreamer(*OutStreamer, TmpInst); 896 return; 897 } 898 case PPC::ADDItocL: { 899 // Transform %xd = ADDItocL %xs, @sym 900 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 901 902 // Change the opcode to ADDI8. If the global address is external, then 903 // generate a TOC entry and reference that. Otherwise, reference the 904 // symbol directly. 905 TmpInst.setOpcode(PPC::ADDI8); 906 907 const MachineOperand &MO = MI->getOperand(2); 908 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL."); 909 910 LLVM_DEBUG(assert( 911 !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 912 "Interposable definitions must use indirect access.")); 913 914 const MCExpr *Exp = 915 MCSymbolRefExpr::create(getMCSymbolForTOCPseudoMO(MO, *this), 916 MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext); 917 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 918 EmitToStreamer(*OutStreamer, TmpInst); 919 return; 920 } 921 case PPC::ADDISgotTprelHA: { 922 // Transform: %xd = ADDISgotTprelHA %x2, @sym 923 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 924 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 925 const MachineOperand &MO = MI->getOperand(2); 926 const GlobalValue *GValue = MO.getGlobal(); 927 MCSymbol *MOSymbol = getSymbol(GValue); 928 const MCExpr *SymGotTprel = 929 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 930 OutContext); 931 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 932 .addReg(MI->getOperand(0).getReg()) 933 .addReg(MI->getOperand(1).getReg()) 934 .addExpr(SymGotTprel)); 935 return; 936 } 937 case PPC::LDgotTprelL: 938 case PPC::LDgotTprelL32: { 939 // Transform %xd = LDgotTprelL @sym, %xs 940 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 941 942 // Change the opcode to LD. 943 TmpInst.setOpcode(Subtarget->isPPC64() ? PPC::LD : PPC::LWZ); 944 const MachineOperand &MO = MI->getOperand(1); 945 const GlobalValue *GValue = MO.getGlobal(); 946 MCSymbol *MOSymbol = getSymbol(GValue); 947 const MCExpr *Exp = MCSymbolRefExpr::create( 948 MOSymbol, 949 Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 950 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 951 OutContext); 952 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 953 EmitToStreamer(*OutStreamer, TmpInst); 954 return; 955 } 956 957 case PPC::PPC32PICGOT: { 958 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 959 MCSymbol *GOTRef = OutContext.createTempSymbol(); 960 MCSymbol *NextInstr = OutContext.createTempSymbol(); 961 962 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 963 // FIXME: We would like an efficient form for this, so we don't have to do 964 // a lot of extra uniquing. 965 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 966 const MCExpr *OffsExpr = 967 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 968 MCSymbolRefExpr::create(GOTRef, OutContext), 969 OutContext); 970 OutStreamer->EmitLabel(GOTRef); 971 OutStreamer->EmitValue(OffsExpr, 4); 972 OutStreamer->EmitLabel(NextInstr); 973 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 974 .addReg(MI->getOperand(0).getReg())); 975 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 976 .addReg(MI->getOperand(1).getReg()) 977 .addImm(0) 978 .addReg(MI->getOperand(0).getReg())); 979 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 980 .addReg(MI->getOperand(0).getReg()) 981 .addReg(MI->getOperand(1).getReg()) 982 .addReg(MI->getOperand(0).getReg())); 983 return; 984 } 985 case PPC::PPC32GOT: { 986 MCSymbol *GOTSymbol = 987 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 988 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 989 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 990 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 991 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 992 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 993 .addReg(MI->getOperand(0).getReg()) 994 .addExpr(SymGotTlsL)); 995 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 996 .addReg(MI->getOperand(0).getReg()) 997 .addReg(MI->getOperand(0).getReg()) 998 .addExpr(SymGotTlsHA)); 999 return; 1000 } 1001 case PPC::ADDIStlsgdHA: { 1002 // Transform: %xd = ADDIStlsgdHA %x2, @sym 1003 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 1004 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 1005 const MachineOperand &MO = MI->getOperand(2); 1006 const GlobalValue *GValue = MO.getGlobal(); 1007 MCSymbol *MOSymbol = getSymbol(GValue); 1008 const MCExpr *SymGotTlsGD = 1009 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 1010 OutContext); 1011 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1012 .addReg(MI->getOperand(0).getReg()) 1013 .addReg(MI->getOperand(1).getReg()) 1014 .addExpr(SymGotTlsGD)); 1015 return; 1016 } 1017 case PPC::ADDItlsgdL: 1018 // Transform: %xd = ADDItlsgdL %xs, @sym 1019 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 1020 case PPC::ADDItlsgdL32: { 1021 // Transform: %rd = ADDItlsgdL32 %rs, @sym 1022 // Into: %rd = ADDI %rs, sym@got@tlsgd 1023 const MachineOperand &MO = MI->getOperand(2); 1024 const GlobalValue *GValue = MO.getGlobal(); 1025 MCSymbol *MOSymbol = getSymbol(GValue); 1026 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 1027 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 1028 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 1029 OutContext); 1030 EmitToStreamer(*OutStreamer, 1031 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1032 .addReg(MI->getOperand(0).getReg()) 1033 .addReg(MI->getOperand(1).getReg()) 1034 .addExpr(SymGotTlsGD)); 1035 return; 1036 } 1037 case PPC::GETtlsADDR: 1038 // Transform: %x3 = GETtlsADDR %x3, @sym 1039 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 1040 case PPC::GETtlsADDR32: { 1041 // Transform: %r3 = GETtlsADDR32 %r3, @sym 1042 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 1043 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 1044 return; 1045 } 1046 case PPC::ADDIStlsldHA: { 1047 // Transform: %xd = ADDIStlsldHA %x2, @sym 1048 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 1049 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 1050 const MachineOperand &MO = MI->getOperand(2); 1051 const GlobalValue *GValue = MO.getGlobal(); 1052 MCSymbol *MOSymbol = getSymbol(GValue); 1053 const MCExpr *SymGotTlsLD = 1054 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 1055 OutContext); 1056 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1057 .addReg(MI->getOperand(0).getReg()) 1058 .addReg(MI->getOperand(1).getReg()) 1059 .addExpr(SymGotTlsLD)); 1060 return; 1061 } 1062 case PPC::ADDItlsldL: 1063 // Transform: %xd = ADDItlsldL %xs, @sym 1064 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 1065 case PPC::ADDItlsldL32: { 1066 // Transform: %rd = ADDItlsldL32 %rs, @sym 1067 // Into: %rd = ADDI %rs, sym@got@tlsld 1068 const MachineOperand &MO = MI->getOperand(2); 1069 const GlobalValue *GValue = MO.getGlobal(); 1070 MCSymbol *MOSymbol = getSymbol(GValue); 1071 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1072 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1073 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1074 OutContext); 1075 EmitToStreamer(*OutStreamer, 1076 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1077 .addReg(MI->getOperand(0).getReg()) 1078 .addReg(MI->getOperand(1).getReg()) 1079 .addExpr(SymGotTlsLD)); 1080 return; 1081 } 1082 case PPC::GETtlsldADDR: 1083 // Transform: %x3 = GETtlsldADDR %x3, @sym 1084 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1085 case PPC::GETtlsldADDR32: { 1086 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1087 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1088 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1089 return; 1090 } 1091 case PPC::ADDISdtprelHA: 1092 // Transform: %xd = ADDISdtprelHA %xs, @sym 1093 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1094 case PPC::ADDISdtprelHA32: { 1095 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1096 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1097 const MachineOperand &MO = MI->getOperand(2); 1098 const GlobalValue *GValue = MO.getGlobal(); 1099 MCSymbol *MOSymbol = getSymbol(GValue); 1100 const MCExpr *SymDtprel = 1101 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1102 OutContext); 1103 EmitToStreamer( 1104 *OutStreamer, 1105 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1106 .addReg(MI->getOperand(0).getReg()) 1107 .addReg(MI->getOperand(1).getReg()) 1108 .addExpr(SymDtprel)); 1109 return; 1110 } 1111 case PPC::ADDIdtprelL: 1112 // Transform: %xd = ADDIdtprelL %xs, @sym 1113 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1114 case PPC::ADDIdtprelL32: { 1115 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1116 // Into: %rd = ADDI %rs, sym@dtprel@l 1117 const MachineOperand &MO = MI->getOperand(2); 1118 const GlobalValue *GValue = MO.getGlobal(); 1119 MCSymbol *MOSymbol = getSymbol(GValue); 1120 const MCExpr *SymDtprel = 1121 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1122 OutContext); 1123 EmitToStreamer(*OutStreamer, 1124 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1125 .addReg(MI->getOperand(0).getReg()) 1126 .addReg(MI->getOperand(1).getReg()) 1127 .addExpr(SymDtprel)); 1128 return; 1129 } 1130 case PPC::MFOCRF: 1131 case PPC::MFOCRF8: 1132 if (!Subtarget->hasMFOCRF()) { 1133 // Transform: %r3 = MFOCRF %cr7 1134 // Into: %r3 = MFCR ;; cr7 1135 unsigned NewOpcode = 1136 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1137 OutStreamer->AddComment(PPCInstPrinter:: 1138 getRegisterName(MI->getOperand(1).getReg())); 1139 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1140 .addReg(MI->getOperand(0).getReg())); 1141 return; 1142 } 1143 break; 1144 case PPC::MTOCRF: 1145 case PPC::MTOCRF8: 1146 if (!Subtarget->hasMFOCRF()) { 1147 // Transform: %cr7 = MTOCRF %r3 1148 // Into: MTCRF mask, %r3 ;; cr7 1149 unsigned NewOpcode = 1150 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1151 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1152 ->getEncodingValue(MI->getOperand(0).getReg()); 1153 OutStreamer->AddComment(PPCInstPrinter:: 1154 getRegisterName(MI->getOperand(0).getReg())); 1155 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1156 .addImm(Mask) 1157 .addReg(MI->getOperand(1).getReg())); 1158 return; 1159 } 1160 break; 1161 case PPC::LD: 1162 case PPC::STD: 1163 case PPC::LWA_32: 1164 case PPC::LWA: { 1165 // Verify alignment is legal, so we don't create relocations 1166 // that can't be supported. 1167 // FIXME: This test is currently disabled for Darwin. The test 1168 // suite shows a handful of test cases that fail this check for 1169 // Darwin. Those need to be investigated before this sanity test 1170 // can be enabled for those subtargets. 1171 if (!Subtarget->isDarwin()) { 1172 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1173 const MachineOperand &MO = MI->getOperand(OpNum); 1174 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1175 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1176 } 1177 // Now process the instruction normally. 1178 break; 1179 } 1180 } 1181 1182 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 1183 EmitToStreamer(*OutStreamer, TmpInst); 1184 } 1185 1186 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1187 if (!Subtarget->isPPC64()) 1188 return PPCAsmPrinter::EmitInstruction(MI); 1189 1190 switch (MI->getOpcode()) { 1191 default: 1192 return PPCAsmPrinter::EmitInstruction(MI); 1193 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1194 // .begin: 1195 // b .end # lis 0, FuncId[16..32] 1196 // nop # li 0, FuncId[0..15] 1197 // std 0, -8(1) 1198 // mflr 0 1199 // bl __xray_FunctionEntry 1200 // mtlr 0 1201 // .end: 1202 // 1203 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1204 // of instructions change. 1205 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1206 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1207 OutStreamer->EmitLabel(BeginOfSled); 1208 EmitToStreamer(*OutStreamer, 1209 MCInstBuilder(PPC::B).addExpr( 1210 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1211 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1212 EmitToStreamer( 1213 *OutStreamer, 1214 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1215 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1216 EmitToStreamer(*OutStreamer, 1217 MCInstBuilder(PPC::BL8_NOP) 1218 .addExpr(MCSymbolRefExpr::create( 1219 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1220 OutContext))); 1221 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1222 OutStreamer->EmitLabel(EndOfSled); 1223 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1224 break; 1225 } 1226 case TargetOpcode::PATCHABLE_RET: { 1227 unsigned RetOpcode = MI->getOperand(0).getImm(); 1228 MCInst RetInst; 1229 RetInst.setOpcode(RetOpcode); 1230 for (const auto &MO : 1231 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1232 MCOperand MCOp; 1233 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1234 RetInst.addOperand(MCOp); 1235 } 1236 1237 bool IsConditional; 1238 if (RetOpcode == PPC::BCCLR) { 1239 IsConditional = true; 1240 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1241 RetOpcode == PPC::TCRETURNai8) { 1242 break; 1243 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1244 IsConditional = false; 1245 } else { 1246 EmitToStreamer(*OutStreamer, RetInst); 1247 break; 1248 } 1249 1250 MCSymbol *FallthroughLabel; 1251 if (IsConditional) { 1252 // Before: 1253 // bgtlr cr0 1254 // 1255 // After: 1256 // ble cr0, .end 1257 // .p2align 3 1258 // .begin: 1259 // blr # lis 0, FuncId[16..32] 1260 // nop # li 0, FuncId[0..15] 1261 // std 0, -8(1) 1262 // mflr 0 1263 // bl __xray_FunctionExit 1264 // mtlr 0 1265 // blr 1266 // .end: 1267 // 1268 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1269 // of instructions change. 1270 FallthroughLabel = OutContext.createTempSymbol(); 1271 EmitToStreamer( 1272 *OutStreamer, 1273 MCInstBuilder(PPC::BCC) 1274 .addImm(PPC::InvertPredicate( 1275 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1276 .addReg(MI->getOperand(2).getReg()) 1277 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1278 RetInst = MCInst(); 1279 RetInst.setOpcode(PPC::BLR8); 1280 } 1281 // .p2align 3 1282 // .begin: 1283 // b(lr)? # lis 0, FuncId[16..32] 1284 // nop # li 0, FuncId[0..15] 1285 // std 0, -8(1) 1286 // mflr 0 1287 // bl __xray_FunctionExit 1288 // mtlr 0 1289 // b(lr)? 1290 // 1291 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1292 // of instructions change. 1293 OutStreamer->EmitCodeAlignment(8); 1294 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1295 OutStreamer->EmitLabel(BeginOfSled); 1296 EmitToStreamer(*OutStreamer, RetInst); 1297 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1298 EmitToStreamer( 1299 *OutStreamer, 1300 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1301 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1302 EmitToStreamer(*OutStreamer, 1303 MCInstBuilder(PPC::BL8_NOP) 1304 .addExpr(MCSymbolRefExpr::create( 1305 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1306 OutContext))); 1307 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1308 EmitToStreamer(*OutStreamer, RetInst); 1309 if (IsConditional) 1310 OutStreamer->EmitLabel(FallthroughLabel); 1311 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1312 break; 1313 } 1314 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1315 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1316 case TargetOpcode::PATCHABLE_TAIL_CALL: 1317 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1318 // normal function exit from a tail exit. 1319 llvm_unreachable("Tail call is handled in the normal case. See comments " 1320 "around this assert."); 1321 } 1322 } 1323 1324 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1325 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1326 PPCTargetStreamer *TS = 1327 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1328 1329 if (TS) 1330 TS->emitAbiVersion(2); 1331 } 1332 1333 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1334 !isPositionIndependent()) 1335 return AsmPrinter::EmitStartOfAsmFile(M); 1336 1337 if (M.getPICLevel() == PICLevel::SmallPIC) 1338 return AsmPrinter::EmitStartOfAsmFile(M); 1339 1340 OutStreamer->SwitchSection(OutContext.getELFSection( 1341 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1342 1343 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1344 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1345 1346 OutStreamer->EmitLabel(CurrentPos); 1347 1348 // The GOT pointer points to the middle of the GOT, in order to reference the 1349 // entire 64kB range. 0x8000 is the midpoint. 1350 const MCExpr *tocExpr = 1351 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1352 MCConstantExpr::create(0x8000, OutContext), 1353 OutContext); 1354 1355 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1356 1357 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1358 } 1359 1360 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1361 // linux/ppc32 - Normal entry label. 1362 if (!Subtarget->isPPC64() && 1363 (!isPositionIndependent() || 1364 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1365 return AsmPrinter::EmitFunctionEntryLabel(); 1366 1367 if (!Subtarget->isPPC64()) { 1368 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1369 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1370 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1371 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1372 OutStreamer->EmitLabel(RelocSymbol); 1373 1374 const MCExpr *OffsExpr = 1375 MCBinaryExpr::createSub( 1376 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1377 OutContext), 1378 MCSymbolRefExpr::create(PICBase, OutContext), 1379 OutContext); 1380 OutStreamer->EmitValue(OffsExpr, 4); 1381 OutStreamer->EmitLabel(CurrentFnSym); 1382 return; 1383 } else 1384 return AsmPrinter::EmitFunctionEntryLabel(); 1385 } 1386 1387 // ELFv2 ABI - Normal entry label. 1388 if (Subtarget->isELFv2ABI()) { 1389 // In the Large code model, we allow arbitrary displacements between 1390 // the text section and its associated TOC section. We place the 1391 // full 8-byte offset to the TOC in memory immediately preceding 1392 // the function global entry point. 1393 if (TM.getCodeModel() == CodeModel::Large 1394 && !MF->getRegInfo().use_empty(PPC::X2)) { 1395 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1396 1397 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1398 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1399 const MCExpr *TOCDeltaExpr = 1400 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1401 MCSymbolRefExpr::create(GlobalEPSymbol, 1402 OutContext), 1403 OutContext); 1404 1405 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1406 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1407 } 1408 return AsmPrinter::EmitFunctionEntryLabel(); 1409 } 1410 1411 // Emit an official procedure descriptor. 1412 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1413 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1414 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1415 OutStreamer->SwitchSection(Section); 1416 OutStreamer->EmitLabel(CurrentFnSym); 1417 OutStreamer->EmitValueToAlignment(8); 1418 MCSymbol *Symbol1 = CurrentFnSymForSize; 1419 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1420 // entry point. 1421 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1422 8 /*size*/); 1423 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1424 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1425 OutStreamer->EmitValue( 1426 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1427 8/*size*/); 1428 // Emit a null environment pointer. 1429 OutStreamer->EmitIntValue(0, 8 /* size */); 1430 OutStreamer->SwitchSection(Current.first, Current.second); 1431 } 1432 1433 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1434 const DataLayout &DL = getDataLayout(); 1435 1436 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1437 1438 PPCTargetStreamer &TS = 1439 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1440 1441 if (!TOC.empty()) { 1442 MCSectionELF *Section; 1443 1444 if (isPPC64) 1445 Section = OutStreamer->getContext().getELFSection( 1446 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1447 else 1448 Section = OutStreamer->getContext().getELFSection( 1449 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1450 OutStreamer->SwitchSection(Section); 1451 1452 for (const auto &TOCMapPair : TOC) { 1453 const MCSymbol *const TOCEntryTarget = TOCMapPair.first; 1454 MCSymbol *const TOCEntryLabel = TOCMapPair.second; 1455 1456 OutStreamer->EmitLabel(TOCEntryLabel); 1457 if (isPPC64) { 1458 TS.emitTCEntry(*TOCEntryTarget); 1459 } else { 1460 OutStreamer->EmitValueToAlignment(4); 1461 OutStreamer->EmitSymbolValue(TOCEntryTarget, 4); 1462 } 1463 } 1464 } 1465 1466 return AsmPrinter::doFinalization(M); 1467 } 1468 1469 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1470 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1471 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1472 // provide two entry points. The ABI guarantees that when calling the 1473 // local entry point, r2 is set up by the caller to contain the TOC base 1474 // for this function, and when calling the global entry point, r12 is set 1475 // up by the caller to hold the address of the global entry point. We 1476 // thus emit a prefix sequence along the following lines: 1477 // 1478 // func: 1479 // .Lfunc_gepNN: 1480 // # global entry point 1481 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1482 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1483 // .Lfunc_lepNN: 1484 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1485 // # local entry point, followed by function body 1486 // 1487 // For the Large code model, we create 1488 // 1489 // .Lfunc_tocNN: 1490 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1491 // func: 1492 // .Lfunc_gepNN: 1493 // # global entry point 1494 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1495 // add r2,r2,r12 1496 // .Lfunc_lepNN: 1497 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1498 // # local entry point, followed by function body 1499 // 1500 // This ensures we have r2 set up correctly while executing the function 1501 // body, no matter which entry point is called. 1502 if (Subtarget->isELFv2ABI() 1503 // Only do all that if the function uses r2 in the first place. 1504 && !MF->getRegInfo().use_empty(PPC::X2)) { 1505 // Note: The logic here must be synchronized with the code in the 1506 // branch-selection pass which sets the offset of the first block in the 1507 // function. This matters because it affects the alignment. 1508 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1509 1510 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1511 OutStreamer->EmitLabel(GlobalEntryLabel); 1512 const MCSymbolRefExpr *GlobalEntryLabelExp = 1513 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1514 1515 if (TM.getCodeModel() != CodeModel::Large) { 1516 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1517 const MCExpr *TOCDeltaExpr = 1518 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1519 GlobalEntryLabelExp, OutContext); 1520 1521 const MCExpr *TOCDeltaHi = 1522 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1523 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1524 .addReg(PPC::X2) 1525 .addReg(PPC::X12) 1526 .addExpr(TOCDeltaHi)); 1527 1528 const MCExpr *TOCDeltaLo = 1529 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1530 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1531 .addReg(PPC::X2) 1532 .addReg(PPC::X2) 1533 .addExpr(TOCDeltaLo)); 1534 } else { 1535 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1536 const MCExpr *TOCOffsetDeltaExpr = 1537 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1538 GlobalEntryLabelExp, OutContext); 1539 1540 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1541 .addReg(PPC::X2) 1542 .addExpr(TOCOffsetDeltaExpr) 1543 .addReg(PPC::X12)); 1544 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1545 .addReg(PPC::X2) 1546 .addReg(PPC::X2) 1547 .addReg(PPC::X12)); 1548 } 1549 1550 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1551 OutStreamer->EmitLabel(LocalEntryLabel); 1552 const MCSymbolRefExpr *LocalEntryLabelExp = 1553 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1554 const MCExpr *LocalOffsetExp = 1555 MCBinaryExpr::createSub(LocalEntryLabelExp, 1556 GlobalEntryLabelExp, OutContext); 1557 1558 PPCTargetStreamer *TS = 1559 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1560 1561 if (TS) 1562 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1563 } 1564 } 1565 1566 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1567 /// directive. 1568 /// 1569 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1570 // Only the 64-bit target requires a traceback table. For now, 1571 // we only emit the word of zeroes that GDB requires to find 1572 // the end of the function, and zeroes for the eight-byte 1573 // mandatory fields. 1574 // FIXME: We should fill in the eight-byte mandatory fields as described in 1575 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1576 // currently make use of these fields). 1577 if (Subtarget->isPPC64()) { 1578 OutStreamer->EmitIntValue(0, 4/*size*/); 1579 OutStreamer->EmitIntValue(0, 8/*size*/); 1580 } 1581 } 1582 1583 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1584 static const char *const CPUDirectives[] = { 1585 "", 1586 "ppc", 1587 "ppc440", 1588 "ppc601", 1589 "ppc602", 1590 "ppc603", 1591 "ppc7400", 1592 "ppc750", 1593 "ppc970", 1594 "ppcA2", 1595 "ppce500", 1596 "ppce500mc", 1597 "ppce5500", 1598 "power3", 1599 "power4", 1600 "power5", 1601 "power5x", 1602 "power6", 1603 "power6x", 1604 "power7", 1605 // FIXME: why is power8 missing here? 1606 "ppc64", 1607 "ppc64le", 1608 "power9" 1609 }; 1610 1611 // Get the numerically largest directive. 1612 // FIXME: How should we merge darwin directives? 1613 unsigned Directive = PPC::DIR_NONE; 1614 for (const Function &F : M) { 1615 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1616 unsigned FDir = STI.getDarwinDirective(); 1617 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1618 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1619 Directive = PPC::DIR_970; 1620 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1621 Directive = PPC::DIR_7400; 1622 if (STI.isPPC64() && Directive < PPC::DIR_64) 1623 Directive = PPC::DIR_64; 1624 } 1625 1626 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1627 1628 assert(Directive < array_lengthof(CPUDirectives) && 1629 "CPUDirectives[] might not be up-to-date!"); 1630 PPCTargetStreamer &TStreamer = 1631 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1632 TStreamer.emitMachine(CPUDirectives[Directive]); 1633 1634 // Prime text sections so they are adjacent. This reduces the likelihood a 1635 // large data or debug section causes a branch to exceed 16M limit. 1636 const TargetLoweringObjectFileMachO &TLOFMacho = 1637 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1638 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1639 if (TM.getRelocationModel() == Reloc::PIC_) { 1640 OutStreamer->SwitchSection( 1641 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1642 MachO::S_SYMBOL_STUBS | 1643 MachO::S_ATTR_PURE_INSTRUCTIONS, 1644 32, SectionKind::getText())); 1645 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1646 OutStreamer->SwitchSection( 1647 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1648 MachO::S_SYMBOL_STUBS | 1649 MachO::S_ATTR_PURE_INSTRUCTIONS, 1650 16, SectionKind::getText())); 1651 } 1652 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1653 } 1654 1655 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1656 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1657 1658 // Darwin/PPC always uses mach-o. 1659 const TargetLoweringObjectFileMachO &TLOFMacho = 1660 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1661 if (MMI) { 1662 MachineModuleInfoMachO &MMIMacho = 1663 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1664 1665 if (MAI->doesSupportExceptionHandling()) { 1666 // Add the (possibly multiple) personalities to the set of global values. 1667 // Only referenced functions get into the Personalities list. 1668 for (const Function *Personality : MMI->getPersonalities()) { 1669 if (Personality) { 1670 MCSymbol *NLPSym = 1671 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1672 MachineModuleInfoImpl::StubValueTy &StubSym = 1673 MMIMacho.getGVStubEntry(NLPSym); 1674 StubSym = 1675 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1676 } 1677 } 1678 } 1679 1680 // Output stubs for dynamically-linked functions. 1681 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1682 1683 // Output macho stubs for external and common global variables. 1684 if (!Stubs.empty()) { 1685 // Switch with ".non_lazy_symbol_pointer" directive. 1686 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1687 EmitAlignment(isPPC64 ? Align(8) : Align(4)); 1688 1689 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1690 // L_foo$stub: 1691 OutStreamer->EmitLabel(Stubs[i].first); 1692 // .indirect_symbol _foo 1693 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1694 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1695 MCSA_IndirectSymbol); 1696 1697 if (MCSym.getInt()) 1698 // External to current translation unit. 1699 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1700 else 1701 // Internal to current translation unit. 1702 // 1703 // When we place the LSDA into the TEXT section, the type info 1704 // pointers 1705 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1706 // However, sometimes the types are local to the file. So we need to 1707 // fill in the value for the NLP in those cases. 1708 OutStreamer->EmitValue( 1709 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1710 isPPC64 ? 8 : 4 /*size*/); 1711 } 1712 1713 Stubs.clear(); 1714 OutStreamer->AddBlankLine(); 1715 } 1716 } 1717 1718 // Funny Darwin hack: This flag tells the linker that no global symbols 1719 // contain code that falls through to other global symbols (e.g. the obvious 1720 // implementation of multiple entry points). If this doesn't occur, the 1721 // linker can safely perform dead code stripping. Since LLVM never generates 1722 // code that does this, it is always safe to set. 1723 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1724 1725 return AsmPrinter::doFinalization(M); 1726 } 1727 1728 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) { 1729 // Get the function descriptor symbol. 1730 CurrentFnDescSym = getSymbol(&MF.getFunction()); 1731 // Set the containing csect. 1732 MCSectionXCOFF *FnDescSec = OutStreamer->getContext().getXCOFFSection( 1733 CurrentFnDescSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD, 1734 XCOFF::C_HIDEXT, SectionKind::getData()); 1735 cast<MCSymbolXCOFF>(CurrentFnDescSym)->setContainingCsect(FnDescSec); 1736 1737 return AsmPrinter::SetupMachineFunction(MF); 1738 } 1739 1740 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { 1741 // Early error checking limiting what is supported. 1742 if (GV->isThreadLocal()) 1743 report_fatal_error("Thread local not yet supported on AIX."); 1744 1745 if (GV->hasSection()) 1746 report_fatal_error("Custom section for Data not yet supported."); 1747 1748 if (GV->hasComdat()) 1749 report_fatal_error("COMDAT not yet supported by AIX."); 1750 1751 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1752 if (!GVKind.isCommon() && !GVKind.isBSSLocal() && !GVKind.isData()) 1753 report_fatal_error("Encountered a global variable kind that is " 1754 "not supported yet."); 1755 1756 // Create the containing csect and switch to it. 1757 MCSectionXCOFF *CSect = cast<MCSectionXCOFF>( 1758 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1759 OutStreamer->SwitchSection(CSect); 1760 1761 // Create the symbol, set its storage class, and emit it. 1762 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 1763 GVSym->setStorageClass( 1764 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 1765 GVSym->setContainingCsect(CSect); 1766 1767 const DataLayout &DL = GV->getParent()->getDataLayout(); 1768 1769 // Handle common symbols. 1770 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1771 unsigned Align = 1772 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV); 1773 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType()); 1774 1775 if (GVKind.isBSSLocal()) 1776 OutStreamer->EmitXCOFFLocalCommonSymbol(GVSym, Size, Align); 1777 else 1778 OutStreamer->EmitCommonSymbol(GVSym, Size, Align); 1779 return; 1780 } 1781 1782 MCSymbol *EmittedInitSym = GVSym; 1783 EmitLinkage(GV, EmittedInitSym); 1784 EmitAlignment(getGVAlignment(GV, DL), GV); 1785 OutStreamer->EmitLabel(EmittedInitSym); 1786 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 1787 } 1788 1789 void PPCAIXAsmPrinter::EmitFunctionDescriptor() { 1790 const DataLayout &DL = getDataLayout(); 1791 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4; 1792 1793 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1794 // Emit function descriptor. 1795 OutStreamer->SwitchSection( 1796 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getContainingCsect()); 1797 OutStreamer->EmitLabel(CurrentFnDescSym); 1798 // Emit function entry point address. 1799 OutStreamer->EmitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext), 1800 PointerSize); 1801 // Emit TOC base address. 1802 MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]")); 1803 OutStreamer->EmitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext), 1804 PointerSize); 1805 // Emit a null environment pointer. 1806 OutStreamer->EmitIntValue(0, PointerSize); 1807 1808 OutStreamer->SwitchSection(Current.first, Current.second); 1809 } 1810 1811 void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) { 1812 // If there are no functions in this module, we will never need to reference 1813 // the TOC base. 1814 if (M.empty()) 1815 return; 1816 1817 // Emit TOC base. 1818 MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]")); 1819 MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection( 1820 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1821 SectionKind::getData()); 1822 cast<MCSymbolXCOFF>(TOCBaseSym)->setContainingCsect(TOCBaseSection); 1823 // Switch to section to emit TOC base. 1824 OutStreamer->SwitchSection(TOCBaseSection); 1825 } 1826 1827 1828 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1829 /// for a MachineFunction to the given output stream, in a format that the 1830 /// Darwin assembler can deal with. 1831 /// 1832 static AsmPrinter * 1833 createPPCAsmPrinterPass(TargetMachine &tm, 1834 std::unique_ptr<MCStreamer> &&Streamer) { 1835 if (tm.getTargetTriple().isMacOSX()) 1836 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1837 if (tm.getTargetTriple().isOSAIX()) 1838 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1839 1840 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1841 } 1842 1843 // Force static initialization. 1844 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1845 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1846 createPPCAsmPrinterPass); 1847 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1848 createPPCAsmPrinterPass); 1849 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1850 createPPCAsmPrinterPass); 1851 } 1852