1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains a printer that converts from our internal representation 11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 12 // the output mechanism used by `llc'. 13 // 14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 16 // 17 //===----------------------------------------------------------------------===// 18 19 #include "InstPrinter/PPCInstPrinter.h" 20 #include "MCTargetDesc/PPCMCExpr.h" 21 #include "MCTargetDesc/PPCMCTargetDesc.h" 22 #include "MCTargetDesc/PPCPredicates.h" 23 #include "PPC.h" 24 #include "PPCInstrInfo.h" 25 #include "PPCMachineFunctionInfo.h" 26 #include "PPCSubtarget.h" 27 #include "PPCTargetMachine.h" 28 #include "PPCTargetStreamer.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCStreamer.h" 55 #include "llvm/MC/MCSymbol.h" 56 #include "llvm/MC/MCSymbolELF.h" 57 #include "llvm/MC/SectionKind.h" 58 #include "llvm/Support/Casting.h" 59 #include "llvm/Support/CodeGen.h" 60 #include "llvm/Support/Debug.h" 61 #include "llvm/Support/ErrorHandling.h" 62 #include "llvm/Support/TargetRegistry.h" 63 #include "llvm/Support/raw_ostream.h" 64 #include "llvm/Target/TargetMachine.h" 65 #include <algorithm> 66 #include <cassert> 67 #include <cstdint> 68 #include <memory> 69 #include <new> 70 71 using namespace llvm; 72 73 #define DEBUG_TYPE "asmprinter" 74 75 namespace { 76 77 class PPCAsmPrinter : public AsmPrinter { 78 protected: 79 MapVector<MCSymbol *, MCSymbol *> TOC; 80 const PPCSubtarget *Subtarget; 81 StackMaps SM; 82 83 public: 84 explicit PPCAsmPrinter(TargetMachine &TM, 85 std::unique_ptr<MCStreamer> Streamer) 86 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 87 88 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 89 90 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 91 92 bool doInitialization(Module &M) override { 93 if (!TOC.empty()) 94 TOC.clear(); 95 return AsmPrinter::doInitialization(M); 96 } 97 98 void EmitInstruction(const MachineInstr *MI) override; 99 100 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 101 102 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 103 unsigned AsmVariant, const char *ExtraCode, 104 raw_ostream &O) override; 105 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 106 unsigned AsmVariant, const char *ExtraCode, 107 raw_ostream &O) override; 108 109 void EmitEndOfAsmFile(Module &M) override; 110 111 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 112 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 113 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 114 bool runOnMachineFunction(MachineFunction &MF) override { 115 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 116 bool Changed = AsmPrinter::runOnMachineFunction(MF); 117 emitXRayTable(); 118 return Changed; 119 } 120 }; 121 122 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 123 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 124 public: 125 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 126 std::unique_ptr<MCStreamer> Streamer) 127 : PPCAsmPrinter(TM, std::move(Streamer)) {} 128 129 StringRef getPassName() const override { 130 return "Linux PPC Assembly Printer"; 131 } 132 133 bool doFinalization(Module &M) override; 134 void EmitStartOfAsmFile(Module &M) override; 135 136 void EmitFunctionEntryLabel() override; 137 138 void EmitFunctionBodyStart() override; 139 void EmitFunctionBodyEnd() override; 140 void EmitInstruction(const MachineInstr *MI) override; 141 }; 142 143 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 144 /// OS X 145 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 146 public: 147 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 148 std::unique_ptr<MCStreamer> Streamer) 149 : PPCAsmPrinter(TM, std::move(Streamer)) {} 150 151 StringRef getPassName() const override { 152 return "Darwin PPC Assembly Printer"; 153 } 154 155 bool doFinalization(Module &M) override; 156 void EmitStartOfAsmFile(Module &M) override; 157 }; 158 159 } // end anonymous namespace 160 161 /// stripRegisterPrefix - This method strips the character prefix from a 162 /// register name so that only the number is left. Used by for linux asm. 163 static const char *stripRegisterPrefix(const char *RegName) { 164 switch (RegName[0]) { 165 case 'r': 166 case 'f': 167 case 'q': // for QPX 168 case 'v': 169 if (RegName[1] == 's') 170 return RegName + 2; 171 return RegName + 1; 172 case 'c': if (RegName[1] == 'r') return RegName + 2; 173 } 174 175 return RegName; 176 } 177 178 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 179 raw_ostream &O) { 180 const DataLayout &DL = getDataLayout(); 181 const MachineOperand &MO = MI->getOperand(OpNo); 182 183 switch (MO.getType()) { 184 case MachineOperand::MO_Register: { 185 unsigned Reg = MO.getReg(); 186 187 // There are VSX instructions that use VSX register numbering (vs0 - vs63) 188 // as well as those that use VMX register numbering (v0 - v31 which 189 // correspond to vs32 - vs63). If we have an instruction that uses VSX 190 // numbering, we need to convert the VMX registers to VSX registers. 191 // Namely, we print 32-63 when the instruction operates on one of the 192 // VMX registers. 193 // (Please synchronize with PPCInstPrinter::printOperand) 194 if (MI->getDesc().TSFlags & PPCII::UseVSXReg) { 195 if (PPCInstrInfo::isVRRegister(Reg)) 196 Reg = PPC::VSX32 + (Reg - PPC::V0); 197 else if (PPCInstrInfo::isVFRegister(Reg)) 198 Reg = PPC::VSX32 + (Reg - PPC::VF0); 199 } 200 const char *RegName = PPCInstPrinter::getRegisterName(Reg); 201 202 // Linux assembler (Others?) does not take register mnemonics. 203 // FIXME - What about special registers used in mfspr/mtspr? 204 if (!Subtarget->isDarwin()) 205 RegName = stripRegisterPrefix(RegName); 206 O << RegName; 207 return; 208 } 209 case MachineOperand::MO_Immediate: 210 O << MO.getImm(); 211 return; 212 213 case MachineOperand::MO_MachineBasicBlock: 214 MO.getMBB()->getSymbol()->print(O, MAI); 215 return; 216 case MachineOperand::MO_ConstantPoolIndex: 217 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 218 << MO.getIndex(); 219 return; 220 case MachineOperand::MO_BlockAddress: 221 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 222 return; 223 case MachineOperand::MO_GlobalAddress: { 224 // Computing the address of a global symbol, not calling it. 225 const GlobalValue *GV = MO.getGlobal(); 226 MCSymbol *SymToPrint; 227 228 // External or weakly linked global variables need non-lazily-resolved stubs 229 if (Subtarget->hasLazyResolverStub(GV)) { 230 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 231 MachineModuleInfoImpl::StubValueTy &StubSym = 232 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 233 SymToPrint); 234 if (!StubSym.getPointer()) 235 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 236 !GV->hasInternalLinkage()); 237 } else { 238 SymToPrint = getSymbol(GV); 239 } 240 241 SymToPrint->print(O, MAI); 242 243 printOffset(MO.getOffset(), O); 244 return; 245 } 246 247 default: 248 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 249 return; 250 } 251 } 252 253 /// PrintAsmOperand - Print out an operand for an inline asm expression. 254 /// 255 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 256 unsigned AsmVariant, 257 const char *ExtraCode, raw_ostream &O) { 258 // Does this asm operand have a single letter operand modifier? 259 if (ExtraCode && ExtraCode[0]) { 260 if (ExtraCode[1] != 0) return true; // Unknown modifier. 261 262 switch (ExtraCode[0]) { 263 default: 264 // See if this is a generic print operand 265 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 266 case 'c': // Don't print "$" before a global var name or constant. 267 break; // PPC never has a prefix. 268 case 'L': // Write second word of DImode reference. 269 // Verify that this operand has two consecutive registers. 270 if (!MI->getOperand(OpNo).isReg() || 271 OpNo+1 == MI->getNumOperands() || 272 !MI->getOperand(OpNo+1).isReg()) 273 return true; 274 ++OpNo; // Return the high-part. 275 break; 276 case 'I': 277 // Write 'i' if an integer constant, otherwise nothing. Used to print 278 // addi vs add, etc. 279 if (MI->getOperand(OpNo).isImm()) 280 O << "i"; 281 return false; 282 } 283 } 284 285 printOperand(MI, OpNo, O); 286 return false; 287 } 288 289 // At the moment, all inline asm memory operands are a single register. 290 // In any case, the output of this routine should always be just one 291 // assembler operand. 292 293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 294 unsigned AsmVariant, 295 const char *ExtraCode, 296 raw_ostream &O) { 297 if (ExtraCode && ExtraCode[0]) { 298 if (ExtraCode[1] != 0) return true; // Unknown modifier. 299 300 switch (ExtraCode[0]) { 301 default: return true; // Unknown modifier. 302 case 'y': // A memory reference for an X-form instruction 303 { 304 const char *RegName = "r0"; 305 if (!Subtarget->isDarwin()) 306 RegName = stripRegisterPrefix(RegName); 307 O << RegName << ", "; 308 printOperand(MI, OpNo, O); 309 return false; 310 } 311 case 'U': // Print 'u' for update form. 312 case 'X': // Print 'x' for indexed form. 313 { 314 // FIXME: Currently for PowerPC memory operands are always loaded 315 // into a register, so we never get an update or indexed form. 316 // This is bad even for offset forms, since even if we know we 317 // have a value in -16(r1), we will generate a load into r<n> 318 // and then load from 0(r<n>). Until that issue is fixed, 319 // tolerate 'U' and 'X' but don't output anything. 320 assert(MI->getOperand(OpNo).isReg()); 321 return false; 322 } 323 } 324 } 325 326 assert(MI->getOperand(OpNo).isReg()); 327 O << "0("; 328 printOperand(MI, OpNo, O); 329 O << ")"; 330 return false; 331 } 332 333 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 334 /// exists for it. If not, create one. Then return a symbol that references 335 /// the TOC entry. 336 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 337 MCSymbol *&TOCEntry = TOC[Sym]; 338 if (!TOCEntry) 339 TOCEntry = createTempSymbol("C"); 340 return TOCEntry; 341 } 342 343 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 344 SM.serializeToStackMapSection(); 345 } 346 347 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 348 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 349 350 SM.recordStackMap(MI); 351 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 352 353 // Scan ahead to trim the shadow. 354 const MachineBasicBlock &MBB = *MI.getParent(); 355 MachineBasicBlock::const_iterator MII(MI); 356 ++MII; 357 while (NumNOPBytes > 0) { 358 if (MII == MBB.end() || MII->isCall() || 359 MII->getOpcode() == PPC::DBG_VALUE || 360 MII->getOpcode() == TargetOpcode::PATCHPOINT || 361 MII->getOpcode() == TargetOpcode::STACKMAP) 362 break; 363 ++MII; 364 NumNOPBytes -= 4; 365 } 366 367 // Emit nops. 368 for (unsigned i = 0; i < NumNOPBytes; i += 4) 369 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 370 } 371 372 // Lower a patchpoint of the form: 373 // [<def>], <id>, <numBytes>, <target>, <numArgs> 374 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 375 SM.recordPatchPoint(MI); 376 PatchPointOpers Opers(&MI); 377 378 unsigned EncodedBytes = 0; 379 const MachineOperand &CalleeMO = Opers.getCallTarget(); 380 381 if (CalleeMO.isImm()) { 382 int64_t CallTarget = CalleeMO.getImm(); 383 if (CallTarget) { 384 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 385 "High 16 bits of call target should be zero."); 386 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 387 EncodedBytes = 0; 388 // Materialize the jump address: 389 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 390 .addReg(ScratchReg) 391 .addImm((CallTarget >> 32) & 0xFFFF)); 392 ++EncodedBytes; 393 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 394 .addReg(ScratchReg) 395 .addReg(ScratchReg) 396 .addImm(32).addImm(16)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 399 .addReg(ScratchReg) 400 .addReg(ScratchReg) 401 .addImm((CallTarget >> 16) & 0xFFFF)); 402 ++EncodedBytes; 403 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 404 .addReg(ScratchReg) 405 .addReg(ScratchReg) 406 .addImm(CallTarget & 0xFFFF)); 407 408 // Save the current TOC pointer before the remote call. 409 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 410 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 411 .addReg(PPC::X2) 412 .addImm(TOCSaveOffset) 413 .addReg(PPC::X1)); 414 ++EncodedBytes; 415 416 // If we're on ELFv1, then we need to load the actual function pointer 417 // from the function descriptor. 418 if (!Subtarget->isELFv2ABI()) { 419 // Load the new TOC pointer and the function address, but not r11 420 // (needing this is rare, and loading it here would prevent passing it 421 // via a 'nest' parameter. 422 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 423 .addReg(PPC::X2) 424 .addImm(8) 425 .addReg(ScratchReg)); 426 ++EncodedBytes; 427 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 428 .addReg(ScratchReg) 429 .addImm(0) 430 .addReg(ScratchReg)); 431 ++EncodedBytes; 432 } 433 434 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 435 .addReg(ScratchReg)); 436 ++EncodedBytes; 437 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 438 ++EncodedBytes; 439 440 // Restore the TOC pointer after the call. 441 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 442 .addReg(PPC::X2) 443 .addImm(TOCSaveOffset) 444 .addReg(PPC::X1)); 445 ++EncodedBytes; 446 } 447 } else if (CalleeMO.isGlobal()) { 448 const GlobalValue *GValue = CalleeMO.getGlobal(); 449 MCSymbol *MOSymbol = getSymbol(GValue); 450 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 451 452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 453 .addExpr(SymVar)); 454 EncodedBytes += 2; 455 } 456 457 // Each instruction is 4 bytes. 458 EncodedBytes *= 4; 459 460 // Emit padding. 461 unsigned NumBytes = Opers.getNumPatchBytes(); 462 assert(NumBytes >= EncodedBytes && 463 "Patchpoint can't request size less than the length of a call."); 464 assert((NumBytes - EncodedBytes) % 4 == 0 && 465 "Invalid number of NOP bytes requested!"); 466 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 467 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 468 } 469 470 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 471 /// call to __tls_get_addr to the current output stream. 472 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 473 MCSymbolRefExpr::VariantKind VK) { 474 StringRef Name = "__tls_get_addr"; 475 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 476 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 477 478 assert(MI->getOperand(0).isReg() && 479 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 480 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 481 "GETtls[ld]ADDR[32] must define GPR3"); 482 assert(MI->getOperand(1).isReg() && 483 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 484 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 485 "GETtls[ld]ADDR[32] must read GPR3"); 486 487 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 488 isPositionIndependent()) 489 Kind = MCSymbolRefExpr::VK_PLT; 490 const MCSymbolRefExpr *TlsRef = 491 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 492 const MachineOperand &MO = MI->getOperand(2); 493 const GlobalValue *GValue = MO.getGlobal(); 494 MCSymbol *MOSymbol = getSymbol(GValue); 495 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 496 EmitToStreamer(*OutStreamer, 497 MCInstBuilder(Subtarget->isPPC64() ? 498 PPC::BL8_NOP_TLS : PPC::BL_TLS) 499 .addExpr(TlsRef) 500 .addExpr(SymVar)); 501 } 502 503 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 504 /// the current output stream. 505 /// 506 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 507 MCInst TmpInst; 508 bool isPPC64 = Subtarget->isPPC64(); 509 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 510 const Module *M = MF->getFunction().getParent(); 511 PICLevel::Level PL = M->getPICLevel(); 512 513 // Lower multi-instruction pseudo operations. 514 switch (MI->getOpcode()) { 515 default: break; 516 case TargetOpcode::DBG_VALUE: 517 llvm_unreachable("Should be handled target independently"); 518 case TargetOpcode::STACKMAP: 519 return LowerSTACKMAP(SM, *MI); 520 case TargetOpcode::PATCHPOINT: 521 return LowerPATCHPOINT(SM, *MI); 522 523 case PPC::MoveGOTtoLR: { 524 // Transform %lr = MoveGOTtoLR 525 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 526 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 527 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 528 // blrl 529 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 530 MCSymbol *GOTSymbol = 531 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 532 const MCExpr *OffsExpr = 533 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 534 MCSymbolRefExpr::VK_PPC_LOCAL, 535 OutContext), 536 MCConstantExpr::create(4, OutContext), 537 OutContext); 538 539 // Emit the 'bl'. 540 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 541 return; 542 } 543 case PPC::MovePCtoLR: 544 case PPC::MovePCtoLR8: { 545 // Transform %lr = MovePCtoLR 546 // Into this, where the label is the PIC base: 547 // bl L1$pb 548 // L1$pb: 549 MCSymbol *PICBase = MF->getPICBaseSymbol(); 550 551 // Emit the 'bl'. 552 EmitToStreamer(*OutStreamer, 553 MCInstBuilder(PPC::BL) 554 // FIXME: We would like an efficient form for this, so we 555 // don't have to do a lot of extra uniquing. 556 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 557 558 // Emit the label. 559 OutStreamer->EmitLabel(PICBase); 560 return; 561 } 562 case PPC::UpdateGBR: { 563 // Transform %rd = UpdateGBR(%rt, %ri) 564 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 565 // add %rd, %rt, %ri 566 // or into (if secure plt mode is on): 567 // addis r30, r30, .LTOC - .L0$pb@ha 568 // addi r30, r30, .LTOC - .L0$pb@l 569 // Get the offset from the GOT Base Register to the GOT 570 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 571 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 572 unsigned PICR = TmpInst.getOperand(0).getReg(); 573 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 574 const MCExpr *PB = 575 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 576 OutContext); 577 578 const MCExpr *LTOCDeltaExpr = 579 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 580 PB, OutContext); 581 582 const MCExpr *LTOCDeltaHi = 583 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 584 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 585 .addReg(PICR) 586 .addReg(PICR) 587 .addExpr(LTOCDeltaHi)); 588 589 const MCExpr *LTOCDeltaLo = 590 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 591 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 592 .addReg(PICR) 593 .addReg(PICR) 594 .addExpr(LTOCDeltaLo)); 595 return; 596 } else { 597 MCSymbol *PICOffset = 598 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 599 TmpInst.setOpcode(PPC::LWZ); 600 const MCExpr *Exp = 601 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 602 const MCExpr *PB = 603 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 604 MCSymbolRefExpr::VK_None, 605 OutContext); 606 const MCOperand TR = TmpInst.getOperand(1); 607 const MCOperand PICR = TmpInst.getOperand(0); 608 609 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 610 TmpInst.getOperand(1) = 611 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 612 TmpInst.getOperand(0) = TR; 613 TmpInst.getOperand(2) = PICR; 614 EmitToStreamer(*OutStreamer, TmpInst); 615 616 TmpInst.setOpcode(PPC::ADD4); 617 TmpInst.getOperand(0) = PICR; 618 TmpInst.getOperand(1) = TR; 619 TmpInst.getOperand(2) = PICR; 620 EmitToStreamer(*OutStreamer, TmpInst); 621 return; 622 } 623 } 624 case PPC::LWZtoc: { 625 // Transform %r3 = LWZtoc @min1, %r2 626 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 627 628 // Change the opcode to LWZ, and the global address operand to be a 629 // reference to the GOT entry we will synthesize later. 630 TmpInst.setOpcode(PPC::LWZ); 631 const MachineOperand &MO = MI->getOperand(1); 632 633 // Map symbol -> label of TOC entry 634 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 635 MCSymbol *MOSymbol = nullptr; 636 if (MO.isGlobal()) 637 MOSymbol = getSymbol(MO.getGlobal()); 638 else if (MO.isCPI()) 639 MOSymbol = GetCPISymbol(MO.getIndex()); 640 else if (MO.isJTI()) 641 MOSymbol = GetJTISymbol(MO.getIndex()); 642 else if (MO.isBlockAddress()) 643 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 644 645 if (PL == PICLevel::SmallPIC) { 646 const MCExpr *Exp = 647 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 648 OutContext); 649 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 650 } else { 651 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 652 653 const MCExpr *Exp = 654 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 655 OutContext); 656 const MCExpr *PB = 657 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 658 OutContext); 659 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 660 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 661 } 662 EmitToStreamer(*OutStreamer, TmpInst); 663 return; 664 } 665 case PPC::LDtocJTI: 666 case PPC::LDtocCPT: 667 case PPC::LDtocBA: 668 case PPC::LDtoc: { 669 // Transform %x3 = LDtoc @min1, %x2 670 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 671 672 // Change the opcode to LD, and the global address operand to be a 673 // reference to the TOC entry we will synthesize later. 674 TmpInst.setOpcode(PPC::LD); 675 const MachineOperand &MO = MI->getOperand(1); 676 677 // Map symbol -> label of TOC entry 678 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 679 MCSymbol *MOSymbol = nullptr; 680 if (MO.isGlobal()) 681 MOSymbol = getSymbol(MO.getGlobal()); 682 else if (MO.isCPI()) 683 MOSymbol = GetCPISymbol(MO.getIndex()); 684 else if (MO.isJTI()) 685 MOSymbol = GetJTISymbol(MO.getIndex()); 686 else if (MO.isBlockAddress()) 687 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 688 689 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 690 691 const MCExpr *Exp = 692 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 693 OutContext); 694 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 695 EmitToStreamer(*OutStreamer, TmpInst); 696 return; 697 } 698 699 case PPC::ADDIStocHA: { 700 // Transform %xd = ADDIStocHA %x2, @sym 701 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 702 703 // Change the opcode to ADDIS8. If the global address is external, has 704 // common linkage, is a non-local function address, or is a jump table 705 // address, then generate a TOC entry and reference that. Otherwise 706 // reference the symbol directly. 707 TmpInst.setOpcode(PPC::ADDIS8); 708 const MachineOperand &MO = MI->getOperand(2); 709 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 710 MO.isBlockAddress()) && 711 "Invalid operand for ADDIStocHA!"); 712 MCSymbol *MOSymbol = nullptr; 713 bool GlobalToc = false; 714 715 if (MO.isGlobal()) { 716 const GlobalValue *GV = MO.getGlobal(); 717 MOSymbol = getSymbol(GV); 718 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 719 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 720 } else if (MO.isCPI()) { 721 MOSymbol = GetCPISymbol(MO.getIndex()); 722 } else if (MO.isJTI()) { 723 MOSymbol = GetJTISymbol(MO.getIndex()); 724 } else if (MO.isBlockAddress()) { 725 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 726 } 727 728 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 729 TM.getCodeModel() == CodeModel::Large) 730 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 731 732 const MCExpr *Exp = 733 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 734 OutContext); 735 736 if (!MO.isJTI() && MO.getOffset()) 737 Exp = MCBinaryExpr::createAdd(Exp, 738 MCConstantExpr::create(MO.getOffset(), 739 OutContext), 740 OutContext); 741 742 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 743 EmitToStreamer(*OutStreamer, TmpInst); 744 return; 745 } 746 case PPC::LDtocL: { 747 // Transform %xd = LDtocL @sym, %xs 748 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 749 750 // Change the opcode to LD. If the global address is external, has 751 // common linkage, or is a jump table address, then reference the 752 // associated TOC entry. Otherwise reference the symbol directly. 753 TmpInst.setOpcode(PPC::LD); 754 const MachineOperand &MO = MI->getOperand(1); 755 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 756 MO.isBlockAddress()) && 757 "Invalid operand for LDtocL!"); 758 MCSymbol *MOSymbol = nullptr; 759 760 if (MO.isJTI()) 761 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 762 else if (MO.isBlockAddress()) { 763 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 764 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 765 } 766 else if (MO.isCPI()) { 767 MOSymbol = GetCPISymbol(MO.getIndex()); 768 if (TM.getCodeModel() == CodeModel::Large) 769 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 770 } 771 else if (MO.isGlobal()) { 772 const GlobalValue *GV = MO.getGlobal(); 773 MOSymbol = getSymbol(GV); 774 DEBUG( 775 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 776 assert((GVFlags & PPCII::MO_NLP_FLAG) && 777 "LDtocL used on symbol that could be accessed directly is " 778 "invalid. Must match ADDIStocHA.")); 779 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 780 } 781 782 const MCExpr *Exp = 783 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 784 OutContext); 785 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 786 EmitToStreamer(*OutStreamer, TmpInst); 787 return; 788 } 789 case PPC::ADDItocL: { 790 // Transform %xd = ADDItocL %xs, @sym 791 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 792 793 // Change the opcode to ADDI8. If the global address is external, then 794 // generate a TOC entry and reference that. Otherwise reference the 795 // symbol directly. 796 TmpInst.setOpcode(PPC::ADDI8); 797 const MachineOperand &MO = MI->getOperand(2); 798 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 799 MCSymbol *MOSymbol = nullptr; 800 801 if (MO.isGlobal()) { 802 const GlobalValue *GV = MO.getGlobal(); 803 DEBUG( 804 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 805 assert ( 806 !(GVFlags & PPCII::MO_NLP_FLAG) && 807 "Interposable definitions must use indirect access.")); 808 MOSymbol = getSymbol(GV); 809 } else if (MO.isCPI()) { 810 MOSymbol = GetCPISymbol(MO.getIndex()); 811 } 812 813 const MCExpr *Exp = 814 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 815 OutContext); 816 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 817 EmitToStreamer(*OutStreamer, TmpInst); 818 return; 819 } 820 case PPC::ADDISgotTprelHA: { 821 // Transform: %xd = ADDISgotTprelHA %x2, @sym 822 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 823 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 824 const MachineOperand &MO = MI->getOperand(2); 825 const GlobalValue *GValue = MO.getGlobal(); 826 MCSymbol *MOSymbol = getSymbol(GValue); 827 const MCExpr *SymGotTprel = 828 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 829 OutContext); 830 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 831 .addReg(MI->getOperand(0).getReg()) 832 .addReg(MI->getOperand(1).getReg()) 833 .addExpr(SymGotTprel)); 834 return; 835 } 836 case PPC::LDgotTprelL: 837 case PPC::LDgotTprelL32: { 838 // Transform %xd = LDgotTprelL @sym, %xs 839 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 840 841 // Change the opcode to LD. 842 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 843 const MachineOperand &MO = MI->getOperand(1); 844 const GlobalValue *GValue = MO.getGlobal(); 845 MCSymbol *MOSymbol = getSymbol(GValue); 846 const MCExpr *Exp = 847 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 848 OutContext); 849 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 850 EmitToStreamer(*OutStreamer, TmpInst); 851 return; 852 } 853 854 case PPC::PPC32PICGOT: { 855 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 856 MCSymbol *GOTRef = OutContext.createTempSymbol(); 857 MCSymbol *NextInstr = OutContext.createTempSymbol(); 858 859 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 860 // FIXME: We would like an efficient form for this, so we don't have to do 861 // a lot of extra uniquing. 862 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 863 const MCExpr *OffsExpr = 864 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 865 MCSymbolRefExpr::create(GOTRef, OutContext), 866 OutContext); 867 OutStreamer->EmitLabel(GOTRef); 868 OutStreamer->EmitValue(OffsExpr, 4); 869 OutStreamer->EmitLabel(NextInstr); 870 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 871 .addReg(MI->getOperand(0).getReg())); 872 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 873 .addReg(MI->getOperand(1).getReg()) 874 .addImm(0) 875 .addReg(MI->getOperand(0).getReg())); 876 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 877 .addReg(MI->getOperand(0).getReg()) 878 .addReg(MI->getOperand(1).getReg()) 879 .addReg(MI->getOperand(0).getReg())); 880 return; 881 } 882 case PPC::PPC32GOT: { 883 MCSymbol *GOTSymbol = 884 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 885 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 886 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 887 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 888 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 889 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 890 .addReg(MI->getOperand(0).getReg()) 891 .addExpr(SymGotTlsL)); 892 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 893 .addReg(MI->getOperand(0).getReg()) 894 .addReg(MI->getOperand(0).getReg()) 895 .addExpr(SymGotTlsHA)); 896 return; 897 } 898 case PPC::ADDIStlsgdHA: { 899 // Transform: %xd = ADDIStlsgdHA %x2, @sym 900 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 901 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 902 const MachineOperand &MO = MI->getOperand(2); 903 const GlobalValue *GValue = MO.getGlobal(); 904 MCSymbol *MOSymbol = getSymbol(GValue); 905 const MCExpr *SymGotTlsGD = 906 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 907 OutContext); 908 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 909 .addReg(MI->getOperand(0).getReg()) 910 .addReg(MI->getOperand(1).getReg()) 911 .addExpr(SymGotTlsGD)); 912 return; 913 } 914 case PPC::ADDItlsgdL: 915 // Transform: %xd = ADDItlsgdL %xs, @sym 916 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 917 case PPC::ADDItlsgdL32: { 918 // Transform: %rd = ADDItlsgdL32 %rs, @sym 919 // Into: %rd = ADDI %rs, sym@got@tlsgd 920 const MachineOperand &MO = MI->getOperand(2); 921 const GlobalValue *GValue = MO.getGlobal(); 922 MCSymbol *MOSymbol = getSymbol(GValue); 923 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 924 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 925 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 926 OutContext); 927 EmitToStreamer(*OutStreamer, 928 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 929 .addReg(MI->getOperand(0).getReg()) 930 .addReg(MI->getOperand(1).getReg()) 931 .addExpr(SymGotTlsGD)); 932 return; 933 } 934 case PPC::GETtlsADDR: 935 // Transform: %x3 = GETtlsADDR %x3, @sym 936 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 937 case PPC::GETtlsADDR32: { 938 // Transform: %r3 = GETtlsADDR32 %r3, @sym 939 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 940 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 941 return; 942 } 943 case PPC::ADDIStlsldHA: { 944 // Transform: %xd = ADDIStlsldHA %x2, @sym 945 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 946 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 947 const MachineOperand &MO = MI->getOperand(2); 948 const GlobalValue *GValue = MO.getGlobal(); 949 MCSymbol *MOSymbol = getSymbol(GValue); 950 const MCExpr *SymGotTlsLD = 951 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 952 OutContext); 953 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 954 .addReg(MI->getOperand(0).getReg()) 955 .addReg(MI->getOperand(1).getReg()) 956 .addExpr(SymGotTlsLD)); 957 return; 958 } 959 case PPC::ADDItlsldL: 960 // Transform: %xd = ADDItlsldL %xs, @sym 961 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 962 case PPC::ADDItlsldL32: { 963 // Transform: %rd = ADDItlsldL32 %rs, @sym 964 // Into: %rd = ADDI %rs, sym@got@tlsld 965 const MachineOperand &MO = MI->getOperand(2); 966 const GlobalValue *GValue = MO.getGlobal(); 967 MCSymbol *MOSymbol = getSymbol(GValue); 968 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 969 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 970 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 971 OutContext); 972 EmitToStreamer(*OutStreamer, 973 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 974 .addReg(MI->getOperand(0).getReg()) 975 .addReg(MI->getOperand(1).getReg()) 976 .addExpr(SymGotTlsLD)); 977 return; 978 } 979 case PPC::GETtlsldADDR: 980 // Transform: %x3 = GETtlsldADDR %x3, @sym 981 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 982 case PPC::GETtlsldADDR32: { 983 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 984 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 985 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 986 return; 987 } 988 case PPC::ADDISdtprelHA: 989 // Transform: %xd = ADDISdtprelHA %xs, @sym 990 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 991 case PPC::ADDISdtprelHA32: { 992 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 993 // Into: %rd = ADDIS %rs, sym@dtprel@ha 994 const MachineOperand &MO = MI->getOperand(2); 995 const GlobalValue *GValue = MO.getGlobal(); 996 MCSymbol *MOSymbol = getSymbol(GValue); 997 const MCExpr *SymDtprel = 998 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 999 OutContext); 1000 EmitToStreamer( 1001 *OutStreamer, 1002 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1003 .addReg(MI->getOperand(0).getReg()) 1004 .addReg(MI->getOperand(1).getReg()) 1005 .addExpr(SymDtprel)); 1006 return; 1007 } 1008 case PPC::ADDIdtprelL: 1009 // Transform: %xd = ADDIdtprelL %xs, @sym 1010 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1011 case PPC::ADDIdtprelL32: { 1012 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1013 // Into: %rd = ADDI %rs, sym@dtprel@l 1014 const MachineOperand &MO = MI->getOperand(2); 1015 const GlobalValue *GValue = MO.getGlobal(); 1016 MCSymbol *MOSymbol = getSymbol(GValue); 1017 const MCExpr *SymDtprel = 1018 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1019 OutContext); 1020 EmitToStreamer(*OutStreamer, 1021 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1022 .addReg(MI->getOperand(0).getReg()) 1023 .addReg(MI->getOperand(1).getReg()) 1024 .addExpr(SymDtprel)); 1025 return; 1026 } 1027 case PPC::MFOCRF: 1028 case PPC::MFOCRF8: 1029 if (!Subtarget->hasMFOCRF()) { 1030 // Transform: %r3 = MFOCRF %cr7 1031 // Into: %r3 = MFCR ;; cr7 1032 unsigned NewOpcode = 1033 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1034 OutStreamer->AddComment(PPCInstPrinter:: 1035 getRegisterName(MI->getOperand(1).getReg())); 1036 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1037 .addReg(MI->getOperand(0).getReg())); 1038 return; 1039 } 1040 break; 1041 case PPC::MTOCRF: 1042 case PPC::MTOCRF8: 1043 if (!Subtarget->hasMFOCRF()) { 1044 // Transform: %cr7 = MTOCRF %r3 1045 // Into: MTCRF mask, %r3 ;; cr7 1046 unsigned NewOpcode = 1047 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1048 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1049 ->getEncodingValue(MI->getOperand(0).getReg()); 1050 OutStreamer->AddComment(PPCInstPrinter:: 1051 getRegisterName(MI->getOperand(0).getReg())); 1052 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1053 .addImm(Mask) 1054 .addReg(MI->getOperand(1).getReg())); 1055 return; 1056 } 1057 break; 1058 case PPC::LD: 1059 case PPC::STD: 1060 case PPC::LWA_32: 1061 case PPC::LWA: { 1062 // Verify alignment is legal, so we don't create relocations 1063 // that can't be supported. 1064 // FIXME: This test is currently disabled for Darwin. The test 1065 // suite shows a handful of test cases that fail this check for 1066 // Darwin. Those need to be investigated before this sanity test 1067 // can be enabled for those subtargets. 1068 if (!Subtarget->isDarwin()) { 1069 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1070 const MachineOperand &MO = MI->getOperand(OpNum); 1071 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1072 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1073 } 1074 // Now process the instruction normally. 1075 break; 1076 } 1077 } 1078 1079 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1080 EmitToStreamer(*OutStreamer, TmpInst); 1081 } 1082 1083 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1084 if (!Subtarget->isPPC64()) 1085 return PPCAsmPrinter::EmitInstruction(MI); 1086 1087 switch (MI->getOpcode()) { 1088 default: 1089 return PPCAsmPrinter::EmitInstruction(MI); 1090 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1091 // .begin: 1092 // b .end # lis 0, FuncId[16..32] 1093 // nop # li 0, FuncId[0..15] 1094 // std 0, -8(1) 1095 // mflr 0 1096 // bl __xray_FunctionEntry 1097 // mtlr 0 1098 // .end: 1099 // 1100 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1101 // of instructions change. 1102 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1103 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1104 OutStreamer->EmitLabel(BeginOfSled); 1105 EmitToStreamer(*OutStreamer, 1106 MCInstBuilder(PPC::B).addExpr( 1107 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1108 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1109 EmitToStreamer( 1110 *OutStreamer, 1111 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1112 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1113 EmitToStreamer(*OutStreamer, 1114 MCInstBuilder(PPC::BL8_NOP) 1115 .addExpr(MCSymbolRefExpr::create( 1116 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1117 OutContext))); 1118 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1119 OutStreamer->EmitLabel(EndOfSled); 1120 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1121 break; 1122 } 1123 case TargetOpcode::PATCHABLE_RET: { 1124 unsigned RetOpcode = MI->getOperand(0).getImm(); 1125 MCInst RetInst; 1126 RetInst.setOpcode(RetOpcode); 1127 for (const auto &MO : 1128 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1129 MCOperand MCOp; 1130 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1131 RetInst.addOperand(MCOp); 1132 } 1133 1134 bool IsConditional; 1135 if (RetOpcode == PPC::BCCLR) { 1136 IsConditional = true; 1137 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1138 RetOpcode == PPC::TCRETURNai8) { 1139 break; 1140 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1141 IsConditional = false; 1142 } else { 1143 EmitToStreamer(*OutStreamer, RetInst); 1144 break; 1145 } 1146 1147 MCSymbol *FallthroughLabel; 1148 if (IsConditional) { 1149 // Before: 1150 // bgtlr cr0 1151 // 1152 // After: 1153 // ble cr0, .end 1154 // .p2align 3 1155 // .begin: 1156 // blr # lis 0, FuncId[16..32] 1157 // nop # li 0, FuncId[0..15] 1158 // std 0, -8(1) 1159 // mflr 0 1160 // bl __xray_FunctionExit 1161 // mtlr 0 1162 // blr 1163 // .end: 1164 // 1165 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1166 // of instructions change. 1167 FallthroughLabel = OutContext.createTempSymbol(); 1168 EmitToStreamer( 1169 *OutStreamer, 1170 MCInstBuilder(PPC::BCC) 1171 .addImm(PPC::InvertPredicate( 1172 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1173 .addReg(MI->getOperand(2).getReg()) 1174 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1175 RetInst = MCInst(); 1176 RetInst.setOpcode(PPC::BLR8); 1177 } 1178 // .p2align 3 1179 // .begin: 1180 // b(lr)? # lis 0, FuncId[16..32] 1181 // nop # li 0, FuncId[0..15] 1182 // std 0, -8(1) 1183 // mflr 0 1184 // bl __xray_FunctionExit 1185 // mtlr 0 1186 // b(lr)? 1187 // 1188 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1189 // of instructions change. 1190 OutStreamer->EmitCodeAlignment(8); 1191 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1192 OutStreamer->EmitLabel(BeginOfSled); 1193 EmitToStreamer(*OutStreamer, RetInst); 1194 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1195 EmitToStreamer( 1196 *OutStreamer, 1197 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1198 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1199 EmitToStreamer(*OutStreamer, 1200 MCInstBuilder(PPC::BL8_NOP) 1201 .addExpr(MCSymbolRefExpr::create( 1202 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1203 OutContext))); 1204 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1205 EmitToStreamer(*OutStreamer, RetInst); 1206 if (IsConditional) 1207 OutStreamer->EmitLabel(FallthroughLabel); 1208 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1209 break; 1210 } 1211 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1212 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1213 case TargetOpcode::PATCHABLE_TAIL_CALL: 1214 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1215 // normal function exit from a tail exit. 1216 llvm_unreachable("Tail call is handled in the normal case. See comments " 1217 "around this assert."); 1218 } 1219 } 1220 1221 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1222 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1223 PPCTargetStreamer *TS = 1224 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1225 1226 if (TS) 1227 TS->emitAbiVersion(2); 1228 } 1229 1230 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1231 !isPositionIndependent()) 1232 return AsmPrinter::EmitStartOfAsmFile(M); 1233 1234 if (M.getPICLevel() == PICLevel::SmallPIC) 1235 return AsmPrinter::EmitStartOfAsmFile(M); 1236 1237 OutStreamer->SwitchSection(OutContext.getELFSection( 1238 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1239 1240 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1241 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1242 1243 OutStreamer->EmitLabel(CurrentPos); 1244 1245 // The GOT pointer points to the middle of the GOT, in order to reference the 1246 // entire 64kB range. 0x8000 is the midpoint. 1247 const MCExpr *tocExpr = 1248 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1249 MCConstantExpr::create(0x8000, OutContext), 1250 OutContext); 1251 1252 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1253 1254 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1255 } 1256 1257 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1258 // linux/ppc32 - Normal entry label. 1259 if (!Subtarget->isPPC64() && 1260 (!isPositionIndependent() || 1261 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1262 return AsmPrinter::EmitFunctionEntryLabel(); 1263 1264 if (!Subtarget->isPPC64()) { 1265 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1266 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1267 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1268 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1269 OutStreamer->EmitLabel(RelocSymbol); 1270 1271 const MCExpr *OffsExpr = 1272 MCBinaryExpr::createSub( 1273 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1274 OutContext), 1275 MCSymbolRefExpr::create(PICBase, OutContext), 1276 OutContext); 1277 OutStreamer->EmitValue(OffsExpr, 4); 1278 OutStreamer->EmitLabel(CurrentFnSym); 1279 return; 1280 } else 1281 return AsmPrinter::EmitFunctionEntryLabel(); 1282 } 1283 1284 // ELFv2 ABI - Normal entry label. 1285 if (Subtarget->isELFv2ABI()) { 1286 // In the Large code model, we allow arbitrary displacements between 1287 // the text section and its associated TOC section. We place the 1288 // full 8-byte offset to the TOC in memory immediatedly preceding 1289 // the function global entry point. 1290 if (TM.getCodeModel() == CodeModel::Large 1291 && !MF->getRegInfo().use_empty(PPC::X2)) { 1292 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1293 1294 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1295 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1296 const MCExpr *TOCDeltaExpr = 1297 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1298 MCSymbolRefExpr::create(GlobalEPSymbol, 1299 OutContext), 1300 OutContext); 1301 1302 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1303 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1304 } 1305 return AsmPrinter::EmitFunctionEntryLabel(); 1306 } 1307 1308 // Emit an official procedure descriptor. 1309 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1310 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1311 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1312 OutStreamer->SwitchSection(Section); 1313 OutStreamer->EmitLabel(CurrentFnSym); 1314 OutStreamer->EmitValueToAlignment(8); 1315 MCSymbol *Symbol1 = CurrentFnSymForSize; 1316 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1317 // entry point. 1318 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1319 8 /*size*/); 1320 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1321 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1322 OutStreamer->EmitValue( 1323 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1324 8/*size*/); 1325 // Emit a null environment pointer. 1326 OutStreamer->EmitIntValue(0, 8 /* size */); 1327 OutStreamer->SwitchSection(Current.first, Current.second); 1328 } 1329 1330 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1331 const DataLayout &DL = getDataLayout(); 1332 1333 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1334 1335 PPCTargetStreamer &TS = 1336 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1337 1338 if (!TOC.empty()) { 1339 MCSectionELF *Section; 1340 1341 if (isPPC64) 1342 Section = OutStreamer->getContext().getELFSection( 1343 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1344 else 1345 Section = OutStreamer->getContext().getELFSection( 1346 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1347 OutStreamer->SwitchSection(Section); 1348 1349 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1350 E = TOC.end(); I != E; ++I) { 1351 OutStreamer->EmitLabel(I->second); 1352 MCSymbol *S = I->first; 1353 if (isPPC64) { 1354 TS.emitTCEntry(*S); 1355 } else { 1356 OutStreamer->EmitValueToAlignment(4); 1357 OutStreamer->EmitSymbolValue(S, 4); 1358 } 1359 } 1360 } 1361 1362 return AsmPrinter::doFinalization(M); 1363 } 1364 1365 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1366 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1367 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1368 // provide two entry points. The ABI guarantees that when calling the 1369 // local entry point, r2 is set up by the caller to contain the TOC base 1370 // for this function, and when calling the global entry point, r12 is set 1371 // up by the caller to hold the address of the global entry point. We 1372 // thus emit a prefix sequence along the following lines: 1373 // 1374 // func: 1375 // .Lfunc_gepNN: 1376 // # global entry point 1377 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1378 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1379 // .Lfunc_lepNN: 1380 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1381 // # local entry point, followed by function body 1382 // 1383 // For the Large code model, we create 1384 // 1385 // .Lfunc_tocNN: 1386 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1387 // func: 1388 // .Lfunc_gepNN: 1389 // # global entry point 1390 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1391 // add r2,r2,r12 1392 // .Lfunc_lepNN: 1393 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1394 // # local entry point, followed by function body 1395 // 1396 // This ensures we have r2 set up correctly while executing the function 1397 // body, no matter which entry point is called. 1398 if (Subtarget->isELFv2ABI() 1399 // Only do all that if the function uses r2 in the first place. 1400 && !MF->getRegInfo().use_empty(PPC::X2)) { 1401 // Note: The logic here must be synchronized with the code in the 1402 // branch-selection pass which sets the offset of the first block in the 1403 // function. This matters because it affects the alignment. 1404 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1405 1406 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1407 OutStreamer->EmitLabel(GlobalEntryLabel); 1408 const MCSymbolRefExpr *GlobalEntryLabelExp = 1409 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1410 1411 if (TM.getCodeModel() != CodeModel::Large) { 1412 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1413 const MCExpr *TOCDeltaExpr = 1414 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1415 GlobalEntryLabelExp, OutContext); 1416 1417 const MCExpr *TOCDeltaHi = 1418 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1419 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1420 .addReg(PPC::X2) 1421 .addReg(PPC::X12) 1422 .addExpr(TOCDeltaHi)); 1423 1424 const MCExpr *TOCDeltaLo = 1425 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1426 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1427 .addReg(PPC::X2) 1428 .addReg(PPC::X2) 1429 .addExpr(TOCDeltaLo)); 1430 } else { 1431 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1432 const MCExpr *TOCOffsetDeltaExpr = 1433 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1434 GlobalEntryLabelExp, OutContext); 1435 1436 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1437 .addReg(PPC::X2) 1438 .addExpr(TOCOffsetDeltaExpr) 1439 .addReg(PPC::X12)); 1440 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1441 .addReg(PPC::X2) 1442 .addReg(PPC::X2) 1443 .addReg(PPC::X12)); 1444 } 1445 1446 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1447 OutStreamer->EmitLabel(LocalEntryLabel); 1448 const MCSymbolRefExpr *LocalEntryLabelExp = 1449 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1450 const MCExpr *LocalOffsetExp = 1451 MCBinaryExpr::createSub(LocalEntryLabelExp, 1452 GlobalEntryLabelExp, OutContext); 1453 1454 PPCTargetStreamer *TS = 1455 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1456 1457 if (TS) 1458 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1459 } 1460 } 1461 1462 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1463 /// directive. 1464 /// 1465 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1466 // Only the 64-bit target requires a traceback table. For now, 1467 // we only emit the word of zeroes that GDB requires to find 1468 // the end of the function, and zeroes for the eight-byte 1469 // mandatory fields. 1470 // FIXME: We should fill in the eight-byte mandatory fields as described in 1471 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1472 // currently make use of these fields). 1473 if (Subtarget->isPPC64()) { 1474 OutStreamer->EmitIntValue(0, 4/*size*/); 1475 OutStreamer->EmitIntValue(0, 8/*size*/); 1476 } 1477 } 1478 1479 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1480 static const char *const CPUDirectives[] = { 1481 "", 1482 "ppc", 1483 "ppc440", 1484 "ppc601", 1485 "ppc602", 1486 "ppc603", 1487 "ppc7400", 1488 "ppc750", 1489 "ppc970", 1490 "ppcA2", 1491 "ppce500mc", 1492 "ppce5500", 1493 "power3", 1494 "power4", 1495 "power5", 1496 "power5x", 1497 "power6", 1498 "power6x", 1499 "power7", 1500 // FIXME: why is power8 missing here? 1501 "ppc64", 1502 "ppc64le", 1503 "power9" 1504 }; 1505 1506 // Get the numerically largest directive. 1507 // FIXME: How should we merge darwin directives? 1508 unsigned Directive = PPC::DIR_NONE; 1509 for (const Function &F : M) { 1510 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1511 unsigned FDir = STI.getDarwinDirective(); 1512 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1513 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1514 Directive = PPC::DIR_970; 1515 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1516 Directive = PPC::DIR_7400; 1517 if (STI.isPPC64() && Directive < PPC::DIR_64) 1518 Directive = PPC::DIR_64; 1519 } 1520 1521 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1522 1523 assert(Directive < array_lengthof(CPUDirectives) && 1524 "CPUDirectives[] might not be up-to-date!"); 1525 PPCTargetStreamer &TStreamer = 1526 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1527 TStreamer.emitMachine(CPUDirectives[Directive]); 1528 1529 // Prime text sections so they are adjacent. This reduces the likelihood a 1530 // large data or debug section causes a branch to exceed 16M limit. 1531 const TargetLoweringObjectFileMachO &TLOFMacho = 1532 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1533 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1534 if (TM.getRelocationModel() == Reloc::PIC_) { 1535 OutStreamer->SwitchSection( 1536 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1537 MachO::S_SYMBOL_STUBS | 1538 MachO::S_ATTR_PURE_INSTRUCTIONS, 1539 32, SectionKind::getText())); 1540 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1541 OutStreamer->SwitchSection( 1542 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1543 MachO::S_SYMBOL_STUBS | 1544 MachO::S_ATTR_PURE_INSTRUCTIONS, 1545 16, SectionKind::getText())); 1546 } 1547 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1548 } 1549 1550 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1551 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1552 1553 // Darwin/PPC always uses mach-o. 1554 const TargetLoweringObjectFileMachO &TLOFMacho = 1555 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1556 if (MMI) { 1557 MachineModuleInfoMachO &MMIMacho = 1558 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1559 1560 if (MAI->doesSupportExceptionHandling()) { 1561 // Add the (possibly multiple) personalities to the set of global values. 1562 // Only referenced functions get into the Personalities list. 1563 for (const Function *Personality : MMI->getPersonalities()) { 1564 if (Personality) { 1565 MCSymbol *NLPSym = 1566 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1567 MachineModuleInfoImpl::StubValueTy &StubSym = 1568 MMIMacho.getGVStubEntry(NLPSym); 1569 StubSym = 1570 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1571 } 1572 } 1573 } 1574 1575 // Output stubs for dynamically-linked functions. 1576 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1577 1578 // Output macho stubs for external and common global variables. 1579 if (!Stubs.empty()) { 1580 // Switch with ".non_lazy_symbol_pointer" directive. 1581 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1582 EmitAlignment(isPPC64 ? 3 : 2); 1583 1584 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1585 // L_foo$stub: 1586 OutStreamer->EmitLabel(Stubs[i].first); 1587 // .indirect_symbol _foo 1588 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1589 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1590 MCSA_IndirectSymbol); 1591 1592 if (MCSym.getInt()) 1593 // External to current translation unit. 1594 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1595 else 1596 // Internal to current translation unit. 1597 // 1598 // When we place the LSDA into the TEXT section, the type info 1599 // pointers 1600 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1601 // However, sometimes the types are local to the file. So we need to 1602 // fill in the value for the NLP in those cases. 1603 OutStreamer->EmitValue( 1604 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1605 isPPC64 ? 8 : 4 /*size*/); 1606 } 1607 1608 Stubs.clear(); 1609 OutStreamer->AddBlankLine(); 1610 } 1611 } 1612 1613 // Funny Darwin hack: This flag tells the linker that no global symbols 1614 // contain code that falls through to other global symbols (e.g. the obvious 1615 // implementation of multiple entry points). If this doesn't occur, the 1616 // linker can safely perform dead code stripping. Since LLVM never generates 1617 // code that does this, it is always safe to set. 1618 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1619 1620 return AsmPrinter::doFinalization(M); 1621 } 1622 1623 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1624 /// for a MachineFunction to the given output stream, in a format that the 1625 /// Darwin assembler can deal with. 1626 /// 1627 static AsmPrinter * 1628 createPPCAsmPrinterPass(TargetMachine &tm, 1629 std::unique_ptr<MCStreamer> &&Streamer) { 1630 if (tm.getTargetTriple().isMacOSX()) 1631 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1632 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1633 } 1634 1635 // Force static initialization. 1636 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1637 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1638 createPPCAsmPrinterPass); 1639 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1640 createPPCAsmPrinterPass); 1641 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1642 createPPCAsmPrinterPass); 1643 } 1644