1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains a printer that converts from our internal representation 11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 12 // the output mechanism used by `llc'. 13 // 14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 16 // 17 //===----------------------------------------------------------------------===// 18 19 #include "PPC.h" 20 #include "InstPrinter/PPCInstPrinter.h" 21 #include "MCTargetDesc/PPCMCExpr.h" 22 #include "MCTargetDesc/PPCPredicates.h" 23 #include "PPCMachineFunctionInfo.h" 24 #include "PPCSubtarget.h" 25 #include "PPCTargetMachine.h" 26 #include "PPCTargetStreamer.h" 27 #include "llvm/ADT/MapVector.h" 28 #include "llvm/ADT/StringExtras.h" 29 #include "llvm/CodeGen/AsmPrinter.h" 30 #include "llvm/CodeGen/MachineConstantPool.h" 31 #include "llvm/CodeGen/MachineFunctionPass.h" 32 #include "llvm/CodeGen/MachineInstr.h" 33 #include "llvm/CodeGen/MachineInstrBuilder.h" 34 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 35 #include "llvm/CodeGen/MachineRegisterInfo.h" 36 #include "llvm/CodeGen/StackMaps.h" 37 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 38 #include "llvm/IR/Constants.h" 39 #include "llvm/IR/DebugInfo.h" 40 #include "llvm/IR/DerivedTypes.h" 41 #include "llvm/IR/Mangler.h" 42 #include "llvm/IR/Module.h" 43 #include "llvm/MC/MCAsmInfo.h" 44 #include "llvm/MC/MCContext.h" 45 #include "llvm/MC/MCExpr.h" 46 #include "llvm/MC/MCInst.h" 47 #include "llvm/MC/MCInstBuilder.h" 48 #include "llvm/MC/MCSectionELF.h" 49 #include "llvm/MC/MCSectionMachO.h" 50 #include "llvm/MC/MCStreamer.h" 51 #include "llvm/MC/MCSymbolELF.h" 52 #include "llvm/Support/Debug.h" 53 #include "llvm/Support/ELF.h" 54 #include "llvm/Support/ErrorHandling.h" 55 #include "llvm/Support/MathExtras.h" 56 #include "llvm/Support/TargetRegistry.h" 57 #include "llvm/Support/raw_ostream.h" 58 #include "llvm/Target/TargetInstrInfo.h" 59 #include "llvm/Target/TargetOptions.h" 60 #include "llvm/Target/TargetRegisterInfo.h" 61 using namespace llvm; 62 63 #define DEBUG_TYPE "asmprinter" 64 65 namespace { 66 class PPCAsmPrinter : public AsmPrinter { 67 protected: 68 MapVector<MCSymbol *, MCSymbol *> TOC; 69 const PPCSubtarget *Subtarget; 70 StackMaps SM; 71 72 public: 73 explicit PPCAsmPrinter(TargetMachine &TM, 74 std::unique_ptr<MCStreamer> Streamer) 75 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 76 77 const char *getPassName() const override { 78 return "PowerPC Assembly Printer"; 79 } 80 81 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 82 83 virtual bool doInitialization(Module &M) override { 84 if (!TOC.empty()) 85 TOC.clear(); 86 return AsmPrinter::doInitialization(M); 87 } 88 89 void EmitInstruction(const MachineInstr *MI) override; 90 91 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 92 93 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 94 unsigned AsmVariant, const char *ExtraCode, 95 raw_ostream &O) override; 96 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 97 unsigned AsmVariant, const char *ExtraCode, 98 raw_ostream &O) override; 99 100 void EmitEndOfAsmFile(Module &M) override; 101 102 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 103 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 104 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 105 bool runOnMachineFunction(MachineFunction &MF) override { 106 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 107 return AsmPrinter::runOnMachineFunction(MF); 108 } 109 }; 110 111 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 112 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 113 public: 114 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 115 std::unique_ptr<MCStreamer> Streamer) 116 : PPCAsmPrinter(TM, std::move(Streamer)) {} 117 118 const char *getPassName() const override { 119 return "Linux PPC Assembly Printer"; 120 } 121 122 bool doFinalization(Module &M) override; 123 void EmitStartOfAsmFile(Module &M) override; 124 125 void EmitFunctionEntryLabel() override; 126 127 void EmitFunctionBodyStart() override; 128 void EmitFunctionBodyEnd() override; 129 }; 130 131 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 132 /// OS X 133 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 134 public: 135 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 136 std::unique_ptr<MCStreamer> Streamer) 137 : PPCAsmPrinter(TM, std::move(Streamer)) {} 138 139 const char *getPassName() const override { 140 return "Darwin PPC Assembly Printer"; 141 } 142 143 bool doFinalization(Module &M) override; 144 void EmitStartOfAsmFile(Module &M) override; 145 }; 146 } // end of anonymous namespace 147 148 /// stripRegisterPrefix - This method strips the character prefix from a 149 /// register name so that only the number is left. Used by for linux asm. 150 static const char *stripRegisterPrefix(const char *RegName) { 151 switch (RegName[0]) { 152 case 'r': 153 case 'f': 154 case 'q': // for QPX 155 case 'v': 156 if (RegName[1] == 's') 157 return RegName + 2; 158 return RegName + 1; 159 case 'c': if (RegName[1] == 'r') return RegName + 2; 160 } 161 162 return RegName; 163 } 164 165 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 166 raw_ostream &O) { 167 const DataLayout &DL = getDataLayout(); 168 const MachineOperand &MO = MI->getOperand(OpNo); 169 170 switch (MO.getType()) { 171 case MachineOperand::MO_Register: { 172 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 173 // Linux assembler (Others?) does not take register mnemonics. 174 // FIXME - What about special registers used in mfspr/mtspr? 175 if (!Subtarget->isDarwin()) 176 RegName = stripRegisterPrefix(RegName); 177 O << RegName; 178 return; 179 } 180 case MachineOperand::MO_Immediate: 181 O << MO.getImm(); 182 return; 183 184 case MachineOperand::MO_MachineBasicBlock: 185 MO.getMBB()->getSymbol()->print(O, MAI); 186 return; 187 case MachineOperand::MO_ConstantPoolIndex: 188 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 189 << MO.getIndex(); 190 return; 191 case MachineOperand::MO_BlockAddress: 192 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 193 return; 194 case MachineOperand::MO_GlobalAddress: { 195 // Computing the address of a global symbol, not calling it. 196 const GlobalValue *GV = MO.getGlobal(); 197 MCSymbol *SymToPrint; 198 199 // External or weakly linked global variables need non-lazily-resolved stubs 200 if (Subtarget->hasLazyResolverStub(GV)) { 201 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 202 MachineModuleInfoImpl::StubValueTy &StubSym = 203 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 204 SymToPrint); 205 if (!StubSym.getPointer()) 206 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 207 !GV->hasInternalLinkage()); 208 } else { 209 SymToPrint = getSymbol(GV); 210 } 211 212 SymToPrint->print(O, MAI); 213 214 printOffset(MO.getOffset(), O); 215 return; 216 } 217 218 default: 219 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 220 return; 221 } 222 } 223 224 /// PrintAsmOperand - Print out an operand for an inline asm expression. 225 /// 226 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 227 unsigned AsmVariant, 228 const char *ExtraCode, raw_ostream &O) { 229 // Does this asm operand have a single letter operand modifier? 230 if (ExtraCode && ExtraCode[0]) { 231 if (ExtraCode[1] != 0) return true; // Unknown modifier. 232 233 switch (ExtraCode[0]) { 234 default: 235 // See if this is a generic print operand 236 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 237 case 'c': // Don't print "$" before a global var name or constant. 238 break; // PPC never has a prefix. 239 case 'L': // Write second word of DImode reference. 240 // Verify that this operand has two consecutive registers. 241 if (!MI->getOperand(OpNo).isReg() || 242 OpNo+1 == MI->getNumOperands() || 243 !MI->getOperand(OpNo+1).isReg()) 244 return true; 245 ++OpNo; // Return the high-part. 246 break; 247 case 'I': 248 // Write 'i' if an integer constant, otherwise nothing. Used to print 249 // addi vs add, etc. 250 if (MI->getOperand(OpNo).isImm()) 251 O << "i"; 252 return false; 253 } 254 } 255 256 printOperand(MI, OpNo, O); 257 return false; 258 } 259 260 // At the moment, all inline asm memory operands are a single register. 261 // In any case, the output of this routine should always be just one 262 // assembler operand. 263 264 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 265 unsigned AsmVariant, 266 const char *ExtraCode, 267 raw_ostream &O) { 268 if (ExtraCode && ExtraCode[0]) { 269 if (ExtraCode[1] != 0) return true; // Unknown modifier. 270 271 switch (ExtraCode[0]) { 272 default: return true; // Unknown modifier. 273 case 'y': // A memory reference for an X-form instruction 274 { 275 const char *RegName = "r0"; 276 if (!Subtarget->isDarwin()) 277 RegName = stripRegisterPrefix(RegName); 278 O << RegName << ", "; 279 printOperand(MI, OpNo, O); 280 return false; 281 } 282 case 'U': // Print 'u' for update form. 283 case 'X': // Print 'x' for indexed form. 284 { 285 // FIXME: Currently for PowerPC memory operands are always loaded 286 // into a register, so we never get an update or indexed form. 287 // This is bad even for offset forms, since even if we know we 288 // have a value in -16(r1), we will generate a load into r<n> 289 // and then load from 0(r<n>). Until that issue is fixed, 290 // tolerate 'U' and 'X' but don't output anything. 291 assert(MI->getOperand(OpNo).isReg()); 292 return false; 293 } 294 } 295 } 296 297 assert(MI->getOperand(OpNo).isReg()); 298 O << "0("; 299 printOperand(MI, OpNo, O); 300 O << ")"; 301 return false; 302 } 303 304 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 305 /// exists for it. If not, create one. Then return a symbol that references 306 /// the TOC entry. 307 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 308 MCSymbol *&TOCEntry = TOC[Sym]; 309 if (!TOCEntry) 310 TOCEntry = createTempSymbol("C"); 311 return TOCEntry; 312 } 313 314 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 315 SM.serializeToStackMapSection(); 316 } 317 318 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 319 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 320 321 SM.recordStackMap(MI); 322 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 323 324 // Scan ahead to trim the shadow. 325 const MachineBasicBlock &MBB = *MI.getParent(); 326 MachineBasicBlock::const_iterator MII(MI); 327 ++MII; 328 while (NumNOPBytes > 0) { 329 if (MII == MBB.end() || MII->isCall() || 330 MII->getOpcode() == PPC::DBG_VALUE || 331 MII->getOpcode() == TargetOpcode::PATCHPOINT || 332 MII->getOpcode() == TargetOpcode::STACKMAP) 333 break; 334 ++MII; 335 NumNOPBytes -= 4; 336 } 337 338 // Emit nops. 339 for (unsigned i = 0; i < NumNOPBytes; i += 4) 340 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 341 } 342 343 // Lower a patchpoint of the form: 344 // [<def>], <id>, <numBytes>, <target>, <numArgs> 345 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 346 SM.recordPatchPoint(MI); 347 PatchPointOpers Opers(&MI); 348 349 unsigned EncodedBytes = 0; 350 const MachineOperand &CalleeMO = Opers.getCallTarget(); 351 352 if (CalleeMO.isImm()) { 353 int64_t CallTarget = CalleeMO.getImm(); 354 if (CallTarget) { 355 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 356 "High 16 bits of call target should be zero."); 357 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 358 EncodedBytes = 0; 359 // Materialize the jump address: 360 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 361 .addReg(ScratchReg) 362 .addImm((CallTarget >> 32) & 0xFFFF)); 363 ++EncodedBytes; 364 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 365 .addReg(ScratchReg) 366 .addReg(ScratchReg) 367 .addImm(32).addImm(16)); 368 ++EncodedBytes; 369 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 370 .addReg(ScratchReg) 371 .addReg(ScratchReg) 372 .addImm((CallTarget >> 16) & 0xFFFF)); 373 ++EncodedBytes; 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 375 .addReg(ScratchReg) 376 .addReg(ScratchReg) 377 .addImm(CallTarget & 0xFFFF)); 378 379 // Save the current TOC pointer before the remote call. 380 int TOCSaveOffset = Subtarget->isELFv2ABI() ? 24 : 40; 381 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 382 .addReg(PPC::X2) 383 .addImm(TOCSaveOffset) 384 .addReg(PPC::X1)); 385 ++EncodedBytes; 386 387 // If we're on ELFv1, then we need to load the actual function pointer 388 // from the function descriptor. 389 if (!Subtarget->isELFv2ABI()) { 390 // Load the new TOC pointer and the function address, but not r11 391 // (needing this is rare, and loading it here would prevent passing it 392 // via a 'nest' parameter. 393 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 394 .addReg(PPC::X2) 395 .addImm(8) 396 .addReg(ScratchReg)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 399 .addReg(ScratchReg) 400 .addImm(0) 401 .addReg(ScratchReg)); 402 ++EncodedBytes; 403 } 404 405 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 406 .addReg(ScratchReg)); 407 ++EncodedBytes; 408 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 409 ++EncodedBytes; 410 411 // Restore the TOC pointer after the call. 412 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 413 .addReg(PPC::X2) 414 .addImm(TOCSaveOffset) 415 .addReg(PPC::X1)); 416 ++EncodedBytes; 417 } 418 } else if (CalleeMO.isGlobal()) { 419 const GlobalValue *GValue = CalleeMO.getGlobal(); 420 MCSymbol *MOSymbol = getSymbol(GValue); 421 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 422 423 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 424 .addExpr(SymVar)); 425 EncodedBytes += 2; 426 } 427 428 // Each instruction is 4 bytes. 429 EncodedBytes *= 4; 430 431 // Emit padding. 432 unsigned NumBytes = Opers.getNumPatchBytes(); 433 assert(NumBytes >= EncodedBytes && 434 "Patchpoint can't request size less than the length of a call."); 435 assert((NumBytes - EncodedBytes) % 4 == 0 && 436 "Invalid number of NOP bytes requested!"); 437 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 438 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 439 } 440 441 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 442 /// call to __tls_get_addr to the current output stream. 443 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 444 MCSymbolRefExpr::VariantKind VK) { 445 StringRef Name = "__tls_get_addr"; 446 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 447 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 448 449 assert(MI->getOperand(0).isReg() && 450 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 451 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 452 "GETtls[ld]ADDR[32] must define GPR3"); 453 assert(MI->getOperand(1).isReg() && 454 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 455 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 456 "GETtls[ld]ADDR[32] must read GPR3"); 457 458 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 459 isPositionIndependent()) 460 Kind = MCSymbolRefExpr::VK_PLT; 461 const MCSymbolRefExpr *TlsRef = 462 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 463 const MachineOperand &MO = MI->getOperand(2); 464 const GlobalValue *GValue = MO.getGlobal(); 465 MCSymbol *MOSymbol = getSymbol(GValue); 466 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 467 EmitToStreamer(*OutStreamer, 468 MCInstBuilder(Subtarget->isPPC64() ? 469 PPC::BL8_NOP_TLS : PPC::BL_TLS) 470 .addExpr(TlsRef) 471 .addExpr(SymVar)); 472 } 473 474 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 475 /// the current output stream. 476 /// 477 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 478 MCInst TmpInst; 479 bool isPPC64 = Subtarget->isPPC64(); 480 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 481 const Module *M = MF->getFunction()->getParent(); 482 PICLevel::Level PL = M->getPICLevel(); 483 484 // Lower multi-instruction pseudo operations. 485 switch (MI->getOpcode()) { 486 default: break; 487 case TargetOpcode::DBG_VALUE: 488 llvm_unreachable("Should be handled target independently"); 489 case TargetOpcode::STACKMAP: 490 return LowerSTACKMAP(SM, *MI); 491 case TargetOpcode::PATCHPOINT: 492 return LowerPATCHPOINT(SM, *MI); 493 494 case PPC::MoveGOTtoLR: { 495 // Transform %LR = MoveGOTtoLR 496 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 497 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 498 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 499 // blrl 500 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 501 MCSymbol *GOTSymbol = 502 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 503 const MCExpr *OffsExpr = 504 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 505 MCSymbolRefExpr::VK_PPC_LOCAL, 506 OutContext), 507 MCConstantExpr::create(4, OutContext), 508 OutContext); 509 510 // Emit the 'bl'. 511 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 512 return; 513 } 514 case PPC::MovePCtoLR: 515 case PPC::MovePCtoLR8: { 516 // Transform %LR = MovePCtoLR 517 // Into this, where the label is the PIC base: 518 // bl L1$pb 519 // L1$pb: 520 MCSymbol *PICBase = MF->getPICBaseSymbol(); 521 522 // Emit the 'bl'. 523 EmitToStreamer(*OutStreamer, 524 MCInstBuilder(PPC::BL) 525 // FIXME: We would like an efficient form for this, so we 526 // don't have to do a lot of extra uniquing. 527 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 528 529 // Emit the label. 530 OutStreamer->EmitLabel(PICBase); 531 return; 532 } 533 case PPC::UpdateGBR: { 534 // Transform %Rd = UpdateGBR(%Rt, %Ri) 535 // Into: lwz %Rt, .L0$poff - .L0$pb(%Ri) 536 // add %Rd, %Rt, %Ri 537 // Get the offset from the GOT Base Register to the GOT 538 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 539 MCSymbol *PICOffset = 540 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 541 TmpInst.setOpcode(PPC::LWZ); 542 const MCExpr *Exp = 543 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 544 const MCExpr *PB = 545 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 546 MCSymbolRefExpr::VK_None, 547 OutContext); 548 const MCOperand TR = TmpInst.getOperand(1); 549 const MCOperand PICR = TmpInst.getOperand(0); 550 551 // Step 1: lwz %Rt, .L$poff - .L$pb(%Ri) 552 TmpInst.getOperand(1) = 553 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 554 TmpInst.getOperand(0) = TR; 555 TmpInst.getOperand(2) = PICR; 556 EmitToStreamer(*OutStreamer, TmpInst); 557 558 TmpInst.setOpcode(PPC::ADD4); 559 TmpInst.getOperand(0) = PICR; 560 TmpInst.getOperand(1) = TR; 561 TmpInst.getOperand(2) = PICR; 562 EmitToStreamer(*OutStreamer, TmpInst); 563 return; 564 } 565 case PPC::LWZtoc: { 566 // Transform %R3 = LWZtoc <ga:@min1>, %R2 567 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 568 569 // Change the opcode to LWZ, and the global address operand to be a 570 // reference to the GOT entry we will synthesize later. 571 TmpInst.setOpcode(PPC::LWZ); 572 const MachineOperand &MO = MI->getOperand(1); 573 574 // Map symbol -> label of TOC entry 575 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 576 MCSymbol *MOSymbol = nullptr; 577 if (MO.isGlobal()) 578 MOSymbol = getSymbol(MO.getGlobal()); 579 else if (MO.isCPI()) 580 MOSymbol = GetCPISymbol(MO.getIndex()); 581 else if (MO.isJTI()) 582 MOSymbol = GetJTISymbol(MO.getIndex()); 583 else if (MO.isBlockAddress()) 584 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 585 586 if (PL == PICLevel::SmallPIC) { 587 const MCExpr *Exp = 588 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 589 OutContext); 590 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 591 } else { 592 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 593 594 const MCExpr *Exp = 595 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 596 OutContext); 597 const MCExpr *PB = 598 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 599 OutContext); 600 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 601 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 602 } 603 EmitToStreamer(*OutStreamer, TmpInst); 604 return; 605 } 606 case PPC::LDtocJTI: 607 case PPC::LDtocCPT: 608 case PPC::LDtocBA: 609 case PPC::LDtoc: { 610 // Transform %X3 = LDtoc <ga:@min1>, %X2 611 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 612 613 // Change the opcode to LD, and the global address operand to be a 614 // reference to the TOC entry we will synthesize later. 615 TmpInst.setOpcode(PPC::LD); 616 const MachineOperand &MO = MI->getOperand(1); 617 618 // Map symbol -> label of TOC entry 619 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 620 MCSymbol *MOSymbol = nullptr; 621 if (MO.isGlobal()) 622 MOSymbol = getSymbol(MO.getGlobal()); 623 else if (MO.isCPI()) 624 MOSymbol = GetCPISymbol(MO.getIndex()); 625 else if (MO.isJTI()) 626 MOSymbol = GetJTISymbol(MO.getIndex()); 627 else if (MO.isBlockAddress()) 628 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 629 630 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 631 632 const MCExpr *Exp = 633 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 634 OutContext); 635 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 636 EmitToStreamer(*OutStreamer, TmpInst); 637 return; 638 } 639 640 case PPC::ADDIStocHA: { 641 // Transform %Xd = ADDIStocHA %X2, <ga:@sym> 642 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 643 644 // Change the opcode to ADDIS8. If the global address is external, has 645 // common linkage, is a non-local function address, or is a jump table 646 // address, then generate a TOC entry and reference that. Otherwise 647 // reference the symbol directly. 648 TmpInst.setOpcode(PPC::ADDIS8); 649 const MachineOperand &MO = MI->getOperand(2); 650 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 651 MO.isBlockAddress()) && 652 "Invalid operand for ADDIStocHA!"); 653 MCSymbol *MOSymbol = nullptr; 654 bool GlobalToc = false; 655 656 if (MO.isGlobal()) { 657 const GlobalValue *GV = MO.getGlobal(); 658 MOSymbol = getSymbol(GV); 659 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 660 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 661 } else if (MO.isCPI()) { 662 MOSymbol = GetCPISymbol(MO.getIndex()); 663 } else if (MO.isJTI()) { 664 MOSymbol = GetJTISymbol(MO.getIndex()); 665 } else if (MO.isBlockAddress()) { 666 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 667 } 668 669 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 670 TM.getCodeModel() == CodeModel::Large) 671 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 672 673 const MCExpr *Exp = 674 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 675 OutContext); 676 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 677 EmitToStreamer(*OutStreamer, TmpInst); 678 return; 679 } 680 case PPC::LDtocL: { 681 // Transform %Xd = LDtocL <ga:@sym>, %Xs 682 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 683 684 // Change the opcode to LD. If the global address is external, has 685 // common linkage, or is a jump table address, then reference the 686 // associated TOC entry. Otherwise reference the symbol directly. 687 TmpInst.setOpcode(PPC::LD); 688 const MachineOperand &MO = MI->getOperand(1); 689 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 690 MO.isBlockAddress()) && 691 "Invalid operand for LDtocL!"); 692 MCSymbol *MOSymbol = nullptr; 693 694 if (MO.isJTI()) 695 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 696 else if (MO.isBlockAddress()) { 697 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 698 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 699 } 700 else if (MO.isCPI()) { 701 MOSymbol = GetCPISymbol(MO.getIndex()); 702 if (TM.getCodeModel() == CodeModel::Large) 703 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 704 } 705 else if (MO.isGlobal()) { 706 const GlobalValue *GV = MO.getGlobal(); 707 MOSymbol = getSymbol(GV); 708 DEBUG( 709 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 710 assert((GVFlags & PPCII::MO_NLP_FLAG) && 711 "LDtocL used on symbol that could be accessed directly is " 712 "invalid. Must match ADDIStocHA.")); 713 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 714 } 715 716 const MCExpr *Exp = 717 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 718 OutContext); 719 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 720 EmitToStreamer(*OutStreamer, TmpInst); 721 return; 722 } 723 case PPC::ADDItocL: { 724 // Transform %Xd = ADDItocL %Xs, <ga:@sym> 725 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 726 727 // Change the opcode to ADDI8. If the global address is external, then 728 // generate a TOC entry and reference that. Otherwise reference the 729 // symbol directly. 730 TmpInst.setOpcode(PPC::ADDI8); 731 const MachineOperand &MO = MI->getOperand(2); 732 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 733 MCSymbol *MOSymbol = nullptr; 734 735 if (MO.isGlobal()) { 736 const GlobalValue *GV = MO.getGlobal(); 737 DEBUG( 738 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 739 assert ( 740 !(GVFlags & PPCII::MO_NLP_FLAG) && 741 "Interposable definitions must use indirect access.")); 742 MOSymbol = getSymbol(GV); 743 } else if (MO.isCPI()) { 744 MOSymbol = GetCPISymbol(MO.getIndex()); 745 } 746 747 const MCExpr *Exp = 748 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 749 OutContext); 750 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 751 EmitToStreamer(*OutStreamer, TmpInst); 752 return; 753 } 754 case PPC::ADDISgotTprelHA: { 755 // Transform: %Xd = ADDISgotTprelHA %X2, <ga:@sym> 756 // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha 757 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 758 const MachineOperand &MO = MI->getOperand(2); 759 const GlobalValue *GValue = MO.getGlobal(); 760 MCSymbol *MOSymbol = getSymbol(GValue); 761 const MCExpr *SymGotTprel = 762 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 763 OutContext); 764 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 765 .addReg(MI->getOperand(0).getReg()) 766 .addReg(MI->getOperand(1).getReg()) 767 .addExpr(SymGotTprel)); 768 return; 769 } 770 case PPC::LDgotTprelL: 771 case PPC::LDgotTprelL32: { 772 // Transform %Xd = LDgotTprelL <ga:@sym>, %Xs 773 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 774 775 // Change the opcode to LD. 776 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 777 const MachineOperand &MO = MI->getOperand(1); 778 const GlobalValue *GValue = MO.getGlobal(); 779 MCSymbol *MOSymbol = getSymbol(GValue); 780 const MCExpr *Exp = 781 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 782 OutContext); 783 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 784 EmitToStreamer(*OutStreamer, TmpInst); 785 return; 786 } 787 788 case PPC::PPC32PICGOT: { 789 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 790 MCSymbol *GOTRef = OutContext.createTempSymbol(); 791 MCSymbol *NextInstr = OutContext.createTempSymbol(); 792 793 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 794 // FIXME: We would like an efficient form for this, so we don't have to do 795 // a lot of extra uniquing. 796 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 797 const MCExpr *OffsExpr = 798 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 799 MCSymbolRefExpr::create(GOTRef, OutContext), 800 OutContext); 801 OutStreamer->EmitLabel(GOTRef); 802 OutStreamer->EmitValue(OffsExpr, 4); 803 OutStreamer->EmitLabel(NextInstr); 804 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 805 .addReg(MI->getOperand(0).getReg())); 806 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 807 .addReg(MI->getOperand(1).getReg()) 808 .addImm(0) 809 .addReg(MI->getOperand(0).getReg())); 810 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 811 .addReg(MI->getOperand(0).getReg()) 812 .addReg(MI->getOperand(1).getReg()) 813 .addReg(MI->getOperand(0).getReg())); 814 return; 815 } 816 case PPC::PPC32GOT: { 817 MCSymbol *GOTSymbol = 818 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 819 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 820 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 821 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 822 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 823 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 824 .addReg(MI->getOperand(0).getReg()) 825 .addExpr(SymGotTlsL)); 826 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 827 .addReg(MI->getOperand(0).getReg()) 828 .addReg(MI->getOperand(0).getReg()) 829 .addExpr(SymGotTlsHA)); 830 return; 831 } 832 case PPC::ADDIStlsgdHA: { 833 // Transform: %Xd = ADDIStlsgdHA %X2, <ga:@sym> 834 // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha 835 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 836 const MachineOperand &MO = MI->getOperand(2); 837 const GlobalValue *GValue = MO.getGlobal(); 838 MCSymbol *MOSymbol = getSymbol(GValue); 839 const MCExpr *SymGotTlsGD = 840 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 841 OutContext); 842 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 843 .addReg(MI->getOperand(0).getReg()) 844 .addReg(MI->getOperand(1).getReg()) 845 .addExpr(SymGotTlsGD)); 846 return; 847 } 848 case PPC::ADDItlsgdL: 849 // Transform: %Xd = ADDItlsgdL %Xs, <ga:@sym> 850 // Into: %Xd = ADDI8 %Xs, sym@got@tlsgd@l 851 case PPC::ADDItlsgdL32: { 852 // Transform: %Rd = ADDItlsgdL32 %Rs, <ga:@sym> 853 // Into: %Rd = ADDI %Rs, sym@got@tlsgd 854 const MachineOperand &MO = MI->getOperand(2); 855 const GlobalValue *GValue = MO.getGlobal(); 856 MCSymbol *MOSymbol = getSymbol(GValue); 857 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 858 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 859 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 860 OutContext); 861 EmitToStreamer(*OutStreamer, 862 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 863 .addReg(MI->getOperand(0).getReg()) 864 .addReg(MI->getOperand(1).getReg()) 865 .addExpr(SymGotTlsGD)); 866 return; 867 } 868 case PPC::GETtlsADDR: 869 // Transform: %X3 = GETtlsADDR %X3, <ga:@sym> 870 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 871 case PPC::GETtlsADDR32: { 872 // Transform: %R3 = GETtlsADDR32 %R3, <ga:@sym> 873 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 874 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 875 return; 876 } 877 case PPC::ADDIStlsldHA: { 878 // Transform: %Xd = ADDIStlsldHA %X2, <ga:@sym> 879 // Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha 880 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 881 const MachineOperand &MO = MI->getOperand(2); 882 const GlobalValue *GValue = MO.getGlobal(); 883 MCSymbol *MOSymbol = getSymbol(GValue); 884 const MCExpr *SymGotTlsLD = 885 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 886 OutContext); 887 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 888 .addReg(MI->getOperand(0).getReg()) 889 .addReg(MI->getOperand(1).getReg()) 890 .addExpr(SymGotTlsLD)); 891 return; 892 } 893 case PPC::ADDItlsldL: 894 // Transform: %Xd = ADDItlsldL %Xs, <ga:@sym> 895 // Into: %Xd = ADDI8 %Xs, sym@got@tlsld@l 896 case PPC::ADDItlsldL32: { 897 // Transform: %Rd = ADDItlsldL32 %Rs, <ga:@sym> 898 // Into: %Rd = ADDI %Rs, sym@got@tlsld 899 const MachineOperand &MO = MI->getOperand(2); 900 const GlobalValue *GValue = MO.getGlobal(); 901 MCSymbol *MOSymbol = getSymbol(GValue); 902 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 903 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 904 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 905 OutContext); 906 EmitToStreamer(*OutStreamer, 907 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 908 .addReg(MI->getOperand(0).getReg()) 909 .addReg(MI->getOperand(1).getReg()) 910 .addExpr(SymGotTlsLD)); 911 return; 912 } 913 case PPC::GETtlsldADDR: 914 // Transform: %X3 = GETtlsldADDR %X3, <ga:@sym> 915 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 916 case PPC::GETtlsldADDR32: { 917 // Transform: %R3 = GETtlsldADDR32 %R3, <ga:@sym> 918 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 919 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 920 return; 921 } 922 case PPC::ADDISdtprelHA: 923 // Transform: %Xd = ADDISdtprelHA %Xs, <ga:@sym> 924 // Into: %Xd = ADDIS8 %Xs, sym@dtprel@ha 925 case PPC::ADDISdtprelHA32: { 926 // Transform: %Rd = ADDISdtprelHA32 %Rs, <ga:@sym> 927 // Into: %Rd = ADDIS %Rs, sym@dtprel@ha 928 const MachineOperand &MO = MI->getOperand(2); 929 const GlobalValue *GValue = MO.getGlobal(); 930 MCSymbol *MOSymbol = getSymbol(GValue); 931 const MCExpr *SymDtprel = 932 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 933 OutContext); 934 EmitToStreamer( 935 *OutStreamer, 936 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 937 .addReg(MI->getOperand(0).getReg()) 938 .addReg(MI->getOperand(1).getReg()) 939 .addExpr(SymDtprel)); 940 return; 941 } 942 case PPC::ADDIdtprelL: 943 // Transform: %Xd = ADDIdtprelL %Xs, <ga:@sym> 944 // Into: %Xd = ADDI8 %Xs, sym@dtprel@l 945 case PPC::ADDIdtprelL32: { 946 // Transform: %Rd = ADDIdtprelL32 %Rs, <ga:@sym> 947 // Into: %Rd = ADDI %Rs, sym@dtprel@l 948 const MachineOperand &MO = MI->getOperand(2); 949 const GlobalValue *GValue = MO.getGlobal(); 950 MCSymbol *MOSymbol = getSymbol(GValue); 951 const MCExpr *SymDtprel = 952 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 953 OutContext); 954 EmitToStreamer(*OutStreamer, 955 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 956 .addReg(MI->getOperand(0).getReg()) 957 .addReg(MI->getOperand(1).getReg()) 958 .addExpr(SymDtprel)); 959 return; 960 } 961 case PPC::MFOCRF: 962 case PPC::MFOCRF8: 963 if (!Subtarget->hasMFOCRF()) { 964 // Transform: %R3 = MFOCRF %CR7 965 // Into: %R3 = MFCR ;; cr7 966 unsigned NewOpcode = 967 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 968 OutStreamer->AddComment(PPCInstPrinter:: 969 getRegisterName(MI->getOperand(1).getReg())); 970 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 971 .addReg(MI->getOperand(0).getReg())); 972 return; 973 } 974 break; 975 case PPC::MTOCRF: 976 case PPC::MTOCRF8: 977 if (!Subtarget->hasMFOCRF()) { 978 // Transform: %CR7 = MTOCRF %R3 979 // Into: MTCRF mask, %R3 ;; cr7 980 unsigned NewOpcode = 981 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 982 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 983 ->getEncodingValue(MI->getOperand(0).getReg()); 984 OutStreamer->AddComment(PPCInstPrinter:: 985 getRegisterName(MI->getOperand(0).getReg())); 986 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 987 .addImm(Mask) 988 .addReg(MI->getOperand(1).getReg())); 989 return; 990 } 991 break; 992 case PPC::LD: 993 case PPC::STD: 994 case PPC::LWA_32: 995 case PPC::LWA: { 996 // Verify alignment is legal, so we don't create relocations 997 // that can't be supported. 998 // FIXME: This test is currently disabled for Darwin. The test 999 // suite shows a handful of test cases that fail this check for 1000 // Darwin. Those need to be investigated before this sanity test 1001 // can be enabled for those subtargets. 1002 if (!Subtarget->isDarwin()) { 1003 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1004 const MachineOperand &MO = MI->getOperand(OpNum); 1005 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1006 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1007 } 1008 // Now process the instruction normally. 1009 break; 1010 } 1011 } 1012 1013 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1014 EmitToStreamer(*OutStreamer, TmpInst); 1015 } 1016 1017 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1018 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1019 PPCTargetStreamer *TS = 1020 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1021 1022 if (TS) 1023 TS->emitAbiVersion(2); 1024 } 1025 1026 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1027 !isPositionIndependent()) 1028 return AsmPrinter::EmitStartOfAsmFile(M); 1029 1030 if (M.getPICLevel() == PICLevel::SmallPIC) 1031 return AsmPrinter::EmitStartOfAsmFile(M); 1032 1033 OutStreamer->SwitchSection(OutContext.getELFSection( 1034 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1035 1036 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1037 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1038 1039 OutStreamer->EmitLabel(CurrentPos); 1040 1041 // The GOT pointer points to the middle of the GOT, in order to reference the 1042 // entire 64kB range. 0x8000 is the midpoint. 1043 const MCExpr *tocExpr = 1044 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1045 MCConstantExpr::create(0x8000, OutContext), 1046 OutContext); 1047 1048 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1049 1050 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1051 } 1052 1053 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1054 // linux/ppc32 - Normal entry label. 1055 if (!Subtarget->isPPC64() && 1056 (!isPositionIndependent() || 1057 MF->getFunction()->getParent()->getPICLevel() == PICLevel::SmallPIC)) 1058 return AsmPrinter::EmitFunctionEntryLabel(); 1059 1060 if (!Subtarget->isPPC64()) { 1061 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1062 if (PPCFI->usesPICBase()) { 1063 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1064 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1065 OutStreamer->EmitLabel(RelocSymbol); 1066 1067 const MCExpr *OffsExpr = 1068 MCBinaryExpr::createSub( 1069 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1070 OutContext), 1071 MCSymbolRefExpr::create(PICBase, OutContext), 1072 OutContext); 1073 OutStreamer->EmitValue(OffsExpr, 4); 1074 OutStreamer->EmitLabel(CurrentFnSym); 1075 return; 1076 } else 1077 return AsmPrinter::EmitFunctionEntryLabel(); 1078 } 1079 1080 // ELFv2 ABI - Normal entry label. 1081 if (Subtarget->isELFv2ABI()) { 1082 // In the Large code model, we allow arbitrary displacements between 1083 // the text section and its associated TOC section. We place the 1084 // full 8-byte offset to the TOC in memory immediatedly preceding 1085 // the function global entry point. 1086 if (TM.getCodeModel() == CodeModel::Large 1087 && !MF->getRegInfo().use_empty(PPC::X2)) { 1088 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1089 1090 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1091 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1092 const MCExpr *TOCDeltaExpr = 1093 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1094 MCSymbolRefExpr::create(GlobalEPSymbol, 1095 OutContext), 1096 OutContext); 1097 1098 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1099 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1100 } 1101 return AsmPrinter::EmitFunctionEntryLabel(); 1102 } 1103 1104 // Emit an official procedure descriptor. 1105 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1106 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1107 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1108 OutStreamer->SwitchSection(Section); 1109 OutStreamer->EmitLabel(CurrentFnSym); 1110 OutStreamer->EmitValueToAlignment(8); 1111 MCSymbol *Symbol1 = CurrentFnSymForSize; 1112 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1113 // entry point. 1114 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1115 8 /*size*/); 1116 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1117 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1118 OutStreamer->EmitValue( 1119 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1120 8/*size*/); 1121 // Emit a null environment pointer. 1122 OutStreamer->EmitIntValue(0, 8 /* size */); 1123 OutStreamer->SwitchSection(Current.first, Current.second); 1124 } 1125 1126 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1127 const DataLayout &DL = getDataLayout(); 1128 1129 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1130 1131 PPCTargetStreamer &TS = 1132 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1133 1134 if (!TOC.empty()) { 1135 MCSectionELF *Section; 1136 1137 if (isPPC64) 1138 Section = OutStreamer->getContext().getELFSection( 1139 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1140 else 1141 Section = OutStreamer->getContext().getELFSection( 1142 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1143 OutStreamer->SwitchSection(Section); 1144 1145 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1146 E = TOC.end(); I != E; ++I) { 1147 OutStreamer->EmitLabel(I->second); 1148 MCSymbol *S = I->first; 1149 if (isPPC64) 1150 TS.emitTCEntry(*S); 1151 else 1152 OutStreamer->EmitSymbolValue(S, 4); 1153 } 1154 } 1155 1156 return AsmPrinter::doFinalization(M); 1157 } 1158 1159 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1160 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1161 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1162 // provide two entry points. The ABI guarantees that when calling the 1163 // local entry point, r2 is set up by the caller to contain the TOC base 1164 // for this function, and when calling the global entry point, r12 is set 1165 // up by the caller to hold the address of the global entry point. We 1166 // thus emit a prefix sequence along the following lines: 1167 // 1168 // func: 1169 // .Lfunc_gepNN: 1170 // # global entry point 1171 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1172 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1173 // .Lfunc_lepNN: 1174 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1175 // # local entry point, followed by function body 1176 // 1177 // For the Large code model, we create 1178 // 1179 // .Lfunc_tocNN: 1180 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1181 // func: 1182 // .Lfunc_gepNN: 1183 // # global entry point 1184 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1185 // add r2,r2,r12 1186 // .Lfunc_lepNN: 1187 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1188 // # local entry point, followed by function body 1189 // 1190 // This ensures we have r2 set up correctly while executing the function 1191 // body, no matter which entry point is called. 1192 if (Subtarget->isELFv2ABI() 1193 // Only do all that if the function uses r2 in the first place. 1194 && !MF->getRegInfo().use_empty(PPC::X2)) { 1195 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1196 1197 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1198 OutStreamer->EmitLabel(GlobalEntryLabel); 1199 const MCSymbolRefExpr *GlobalEntryLabelExp = 1200 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1201 1202 if (TM.getCodeModel() != CodeModel::Large) { 1203 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1204 const MCExpr *TOCDeltaExpr = 1205 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1206 GlobalEntryLabelExp, OutContext); 1207 1208 const MCExpr *TOCDeltaHi = 1209 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1210 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1211 .addReg(PPC::X2) 1212 .addReg(PPC::X12) 1213 .addExpr(TOCDeltaHi)); 1214 1215 const MCExpr *TOCDeltaLo = 1216 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1217 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1218 .addReg(PPC::X2) 1219 .addReg(PPC::X2) 1220 .addExpr(TOCDeltaLo)); 1221 } else { 1222 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1223 const MCExpr *TOCOffsetDeltaExpr = 1224 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1225 GlobalEntryLabelExp, OutContext); 1226 1227 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1228 .addReg(PPC::X2) 1229 .addExpr(TOCOffsetDeltaExpr) 1230 .addReg(PPC::X12)); 1231 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1232 .addReg(PPC::X2) 1233 .addReg(PPC::X2) 1234 .addReg(PPC::X12)); 1235 } 1236 1237 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1238 OutStreamer->EmitLabel(LocalEntryLabel); 1239 const MCSymbolRefExpr *LocalEntryLabelExp = 1240 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1241 const MCExpr *LocalOffsetExp = 1242 MCBinaryExpr::createSub(LocalEntryLabelExp, 1243 GlobalEntryLabelExp, OutContext); 1244 1245 PPCTargetStreamer *TS = 1246 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1247 1248 if (TS) 1249 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1250 } 1251 } 1252 1253 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1254 /// directive. 1255 /// 1256 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1257 // Only the 64-bit target requires a traceback table. For now, 1258 // we only emit the word of zeroes that GDB requires to find 1259 // the end of the function, and zeroes for the eight-byte 1260 // mandatory fields. 1261 // FIXME: We should fill in the eight-byte mandatory fields as described in 1262 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1263 // currently make use of these fields). 1264 if (Subtarget->isPPC64()) { 1265 OutStreamer->EmitIntValue(0, 4/*size*/); 1266 OutStreamer->EmitIntValue(0, 8/*size*/); 1267 } 1268 } 1269 1270 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1271 static const char *const CPUDirectives[] = { 1272 "", 1273 "ppc", 1274 "ppc440", 1275 "ppc601", 1276 "ppc602", 1277 "ppc603", 1278 "ppc7400", 1279 "ppc750", 1280 "ppc970", 1281 "ppcA2", 1282 "ppce500mc", 1283 "ppce5500", 1284 "power3", 1285 "power4", 1286 "power5", 1287 "power5x", 1288 "power6", 1289 "power6x", 1290 "power7", 1291 // FIXME: why is power8 missing here? 1292 "ppc64", 1293 "ppc64le", 1294 "power9" 1295 }; 1296 1297 // Get the numerically largest directive. 1298 // FIXME: How should we merge darwin directives? 1299 unsigned Directive = PPC::DIR_NONE; 1300 for (const Function &F : M) { 1301 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1302 unsigned FDir = STI.getDarwinDirective(); 1303 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1304 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1305 Directive = PPC::DIR_970; 1306 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1307 Directive = PPC::DIR_7400; 1308 if (STI.isPPC64() && Directive < PPC::DIR_64) 1309 Directive = PPC::DIR_64; 1310 } 1311 1312 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1313 1314 assert(Directive < array_lengthof(CPUDirectives) && 1315 "CPUDirectives[] might not be up-to-date!"); 1316 PPCTargetStreamer &TStreamer = 1317 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1318 TStreamer.emitMachine(CPUDirectives[Directive]); 1319 1320 // Prime text sections so they are adjacent. This reduces the likelihood a 1321 // large data or debug section causes a branch to exceed 16M limit. 1322 const TargetLoweringObjectFileMachO &TLOFMacho = 1323 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1324 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1325 if (TM.getRelocationModel() == Reloc::PIC_) { 1326 OutStreamer->SwitchSection( 1327 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1328 MachO::S_SYMBOL_STUBS | 1329 MachO::S_ATTR_PURE_INSTRUCTIONS, 1330 32, SectionKind::getText())); 1331 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1332 OutStreamer->SwitchSection( 1333 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1334 MachO::S_SYMBOL_STUBS | 1335 MachO::S_ATTR_PURE_INSTRUCTIONS, 1336 16, SectionKind::getText())); 1337 } 1338 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1339 } 1340 1341 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1342 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1343 1344 // Darwin/PPC always uses mach-o. 1345 const TargetLoweringObjectFileMachO &TLOFMacho = 1346 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1347 MachineModuleInfoMachO &MMIMacho = 1348 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1349 1350 if (MAI->doesSupportExceptionHandling() && MMI) { 1351 // Add the (possibly multiple) personalities to the set of global values. 1352 // Only referenced functions get into the Personalities list. 1353 for (const Function *Personality : MMI->getPersonalities()) { 1354 if (Personality) { 1355 MCSymbol *NLPSym = 1356 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1357 MachineModuleInfoImpl::StubValueTy &StubSym = 1358 MMIMacho.getGVStubEntry(NLPSym); 1359 StubSym = 1360 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1361 } 1362 } 1363 } 1364 1365 // Output stubs for dynamically-linked functions. 1366 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1367 1368 // Output macho stubs for external and common global variables. 1369 if (!Stubs.empty()) { 1370 // Switch with ".non_lazy_symbol_pointer" directive. 1371 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1372 EmitAlignment(isPPC64 ? 3 : 2); 1373 1374 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1375 // L_foo$stub: 1376 OutStreamer->EmitLabel(Stubs[i].first); 1377 // .indirect_symbol _foo 1378 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1379 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol); 1380 1381 if (MCSym.getInt()) 1382 // External to current translation unit. 1383 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4/*size*/); 1384 else 1385 // Internal to current translation unit. 1386 // 1387 // When we place the LSDA into the TEXT section, the type info pointers 1388 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1389 // However, sometimes the types are local to the file. So we need to 1390 // fill in the value for the NLP in those cases. 1391 OutStreamer->EmitValue(MCSymbolRefExpr::create(MCSym.getPointer(), 1392 OutContext), 1393 isPPC64 ? 8 : 4/*size*/); 1394 } 1395 1396 Stubs.clear(); 1397 OutStreamer->AddBlankLine(); 1398 } 1399 1400 // Funny Darwin hack: This flag tells the linker that no global symbols 1401 // contain code that falls through to other global symbols (e.g. the obvious 1402 // implementation of multiple entry points). If this doesn't occur, the 1403 // linker can safely perform dead code stripping. Since LLVM never generates 1404 // code that does this, it is always safe to set. 1405 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1406 1407 return AsmPrinter::doFinalization(M); 1408 } 1409 1410 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1411 /// for a MachineFunction to the given output stream, in a format that the 1412 /// Darwin assembler can deal with. 1413 /// 1414 static AsmPrinter * 1415 createPPCAsmPrinterPass(TargetMachine &tm, 1416 std::unique_ptr<MCStreamer> &&Streamer) { 1417 if (tm.getTargetTriple().isMacOSX()) 1418 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1419 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1420 } 1421 1422 // Force static initialization. 1423 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1424 TargetRegistry::RegisterAsmPrinter(ThePPC32Target, createPPCAsmPrinterPass); 1425 TargetRegistry::RegisterAsmPrinter(ThePPC64Target, createPPCAsmPrinterPass); 1426 TargetRegistry::RegisterAsmPrinter(ThePPC64LETarget, createPPCAsmPrinterPass); 1427 } 1428