1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCStreamer.h" 55 #include "llvm/MC/MCSymbol.h" 56 #include "llvm/MC/MCSymbolELF.h" 57 #include "llvm/MC/SectionKind.h" 58 #include "llvm/Support/Casting.h" 59 #include "llvm/Support/CodeGen.h" 60 #include "llvm/Support/Debug.h" 61 #include "llvm/Support/ErrorHandling.h" 62 #include "llvm/Support/TargetRegistry.h" 63 #include "llvm/Support/raw_ostream.h" 64 #include "llvm/Target/TargetMachine.h" 65 #include <algorithm> 66 #include <cassert> 67 #include <cstdint> 68 #include <memory> 69 #include <new> 70 71 using namespace llvm; 72 73 #define DEBUG_TYPE "asmprinter" 74 75 namespace { 76 77 class PPCAsmPrinter : public AsmPrinter { 78 protected: 79 MapVector<MCSymbol *, MCSymbol *> TOC; 80 const PPCSubtarget *Subtarget; 81 StackMaps SM; 82 83 public: 84 explicit PPCAsmPrinter(TargetMachine &TM, 85 std::unique_ptr<MCStreamer> Streamer) 86 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 87 88 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 89 90 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 91 92 bool doInitialization(Module &M) override { 93 if (!TOC.empty()) 94 TOC.clear(); 95 return AsmPrinter::doInitialization(M); 96 } 97 98 void EmitInstruction(const MachineInstr *MI) override; 99 100 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 101 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 102 /// The \p MI would be INLINEASM ONLY. 103 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 104 105 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 106 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 107 const char *ExtraCode, raw_ostream &O) override; 108 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 111 void EmitEndOfAsmFile(Module &M) override; 112 113 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 114 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 115 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 116 bool runOnMachineFunction(MachineFunction &MF) override { 117 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 118 bool Changed = AsmPrinter::runOnMachineFunction(MF); 119 emitXRayTable(); 120 return Changed; 121 } 122 }; 123 124 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 125 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 126 public: 127 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 128 std::unique_ptr<MCStreamer> Streamer) 129 : PPCAsmPrinter(TM, std::move(Streamer)) {} 130 131 StringRef getPassName() const override { 132 return "Linux PPC Assembly Printer"; 133 } 134 135 bool doFinalization(Module &M) override; 136 void EmitStartOfAsmFile(Module &M) override; 137 138 void EmitFunctionEntryLabel() override; 139 140 void EmitFunctionBodyStart() override; 141 void EmitFunctionBodyEnd() override; 142 void EmitInstruction(const MachineInstr *MI) override; 143 }; 144 145 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 146 /// OS X 147 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 148 public: 149 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 150 std::unique_ptr<MCStreamer> Streamer) 151 : PPCAsmPrinter(TM, std::move(Streamer)) {} 152 153 StringRef getPassName() const override { 154 return "Darwin PPC Assembly Printer"; 155 } 156 157 bool doFinalization(Module &M) override; 158 void EmitStartOfAsmFile(Module &M) override; 159 }; 160 161 } // end anonymous namespace 162 163 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 164 raw_ostream &O) { 165 // Computing the address of a global symbol, not calling it. 166 const GlobalValue *GV = MO.getGlobal(); 167 MCSymbol *SymToPrint; 168 169 // External or weakly linked global variables need non-lazily-resolved stubs 170 if (Subtarget->hasLazyResolverStub(GV)) { 171 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 172 MachineModuleInfoImpl::StubValueTy &StubSym = 173 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 174 SymToPrint); 175 if (!StubSym.getPointer()) 176 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 177 !GV->hasInternalLinkage()); 178 } else { 179 SymToPrint = getSymbol(GV); 180 } 181 182 SymToPrint->print(O, MAI); 183 184 printOffset(MO.getOffset(), O); 185 } 186 187 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 188 raw_ostream &O) { 189 const DataLayout &DL = getDataLayout(); 190 const MachineOperand &MO = MI->getOperand(OpNo); 191 192 switch (MO.getType()) { 193 case MachineOperand::MO_Register: { 194 // The MI is INLINEASM ONLY and UseVSXReg is always false. 195 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 196 197 // Linux assembler (Others?) does not take register mnemonics. 198 // FIXME - What about special registers used in mfspr/mtspr? 199 if (!Subtarget->isDarwin()) 200 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 201 O << RegName; 202 return; 203 } 204 case MachineOperand::MO_Immediate: 205 O << MO.getImm(); 206 return; 207 208 case MachineOperand::MO_MachineBasicBlock: 209 MO.getMBB()->getSymbol()->print(O, MAI); 210 return; 211 case MachineOperand::MO_ConstantPoolIndex: 212 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 213 << MO.getIndex(); 214 return; 215 case MachineOperand::MO_BlockAddress: 216 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 217 return; 218 case MachineOperand::MO_GlobalAddress: { 219 PrintSymbolOperand(MO, O); 220 return; 221 } 222 223 default: 224 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 225 return; 226 } 227 } 228 229 /// PrintAsmOperand - Print out an operand for an inline asm expression. 230 /// 231 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 232 const char *ExtraCode, raw_ostream &O) { 233 // Does this asm operand have a single letter operand modifier? 234 if (ExtraCode && ExtraCode[0]) { 235 if (ExtraCode[1] != 0) return true; // Unknown modifier. 236 237 switch (ExtraCode[0]) { 238 default: 239 // See if this is a generic print operand 240 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 241 case 'L': // Write second word of DImode reference. 242 // Verify that this operand has two consecutive registers. 243 if (!MI->getOperand(OpNo).isReg() || 244 OpNo+1 == MI->getNumOperands() || 245 !MI->getOperand(OpNo+1).isReg()) 246 return true; 247 ++OpNo; // Return the high-part. 248 break; 249 case 'I': 250 // Write 'i' if an integer constant, otherwise nothing. Used to print 251 // addi vs add, etc. 252 if (MI->getOperand(OpNo).isImm()) 253 O << "i"; 254 return false; 255 case 'x': 256 if(!MI->getOperand(OpNo).isReg()) 257 return true; 258 // This operand uses VSX numbering. 259 // If the operand is a VMX register, convert it to a VSX register. 260 unsigned Reg = MI->getOperand(OpNo).getReg(); 261 if (PPCInstrInfo::isVRRegister(Reg)) 262 Reg = PPC::VSX32 + (Reg - PPC::V0); 263 else if (PPCInstrInfo::isVFRegister(Reg)) 264 Reg = PPC::VSX32 + (Reg - PPC::VF0); 265 const char *RegName; 266 RegName = PPCInstPrinter::getRegisterName(Reg); 267 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 268 O << RegName; 269 return false; 270 } 271 } 272 273 printOperand(MI, OpNo, O); 274 return false; 275 } 276 277 // At the moment, all inline asm memory operands are a single register. 278 // In any case, the output of this routine should always be just one 279 // assembler operand. 280 281 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 282 const char *ExtraCode, 283 raw_ostream &O) { 284 if (ExtraCode && ExtraCode[0]) { 285 if (ExtraCode[1] != 0) return true; // Unknown modifier. 286 287 switch (ExtraCode[0]) { 288 default: return true; // Unknown modifier. 289 case 'y': // A memory reference for an X-form instruction 290 { 291 const char *RegName = "r0"; 292 if (!Subtarget->isDarwin()) 293 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 294 O << RegName << ", "; 295 printOperand(MI, OpNo, O); 296 return false; 297 } 298 case 'U': // Print 'u' for update form. 299 case 'X': // Print 'x' for indexed form. 300 { 301 // FIXME: Currently for PowerPC memory operands are always loaded 302 // into a register, so we never get an update or indexed form. 303 // This is bad even for offset forms, since even if we know we 304 // have a value in -16(r1), we will generate a load into r<n> 305 // and then load from 0(r<n>). Until that issue is fixed, 306 // tolerate 'U' and 'X' but don't output anything. 307 assert(MI->getOperand(OpNo).isReg()); 308 return false; 309 } 310 } 311 } 312 313 assert(MI->getOperand(OpNo).isReg()); 314 O << "0("; 315 printOperand(MI, OpNo, O); 316 O << ")"; 317 return false; 318 } 319 320 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 321 /// exists for it. If not, create one. Then return a symbol that references 322 /// the TOC entry. 323 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 324 MCSymbol *&TOCEntry = TOC[Sym]; 325 if (!TOCEntry) 326 TOCEntry = createTempSymbol("C"); 327 return TOCEntry; 328 } 329 330 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 331 emitStackMaps(SM); 332 } 333 334 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 335 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 336 337 SM.recordStackMap(MI); 338 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 339 340 // Scan ahead to trim the shadow. 341 const MachineBasicBlock &MBB = *MI.getParent(); 342 MachineBasicBlock::const_iterator MII(MI); 343 ++MII; 344 while (NumNOPBytes > 0) { 345 if (MII == MBB.end() || MII->isCall() || 346 MII->getOpcode() == PPC::DBG_VALUE || 347 MII->getOpcode() == TargetOpcode::PATCHPOINT || 348 MII->getOpcode() == TargetOpcode::STACKMAP) 349 break; 350 ++MII; 351 NumNOPBytes -= 4; 352 } 353 354 // Emit nops. 355 for (unsigned i = 0; i < NumNOPBytes; i += 4) 356 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 357 } 358 359 // Lower a patchpoint of the form: 360 // [<def>], <id>, <numBytes>, <target>, <numArgs> 361 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 362 SM.recordPatchPoint(MI); 363 PatchPointOpers Opers(&MI); 364 365 unsigned EncodedBytes = 0; 366 const MachineOperand &CalleeMO = Opers.getCallTarget(); 367 368 if (CalleeMO.isImm()) { 369 int64_t CallTarget = CalleeMO.getImm(); 370 if (CallTarget) { 371 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 372 "High 16 bits of call target should be zero."); 373 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 374 EncodedBytes = 0; 375 // Materialize the jump address: 376 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 377 .addReg(ScratchReg) 378 .addImm((CallTarget >> 32) & 0xFFFF)); 379 ++EncodedBytes; 380 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 381 .addReg(ScratchReg) 382 .addReg(ScratchReg) 383 .addImm(32).addImm(16)); 384 ++EncodedBytes; 385 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 386 .addReg(ScratchReg) 387 .addReg(ScratchReg) 388 .addImm((CallTarget >> 16) & 0xFFFF)); 389 ++EncodedBytes; 390 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 391 .addReg(ScratchReg) 392 .addReg(ScratchReg) 393 .addImm(CallTarget & 0xFFFF)); 394 395 // Save the current TOC pointer before the remote call. 396 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 397 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 398 .addReg(PPC::X2) 399 .addImm(TOCSaveOffset) 400 .addReg(PPC::X1)); 401 ++EncodedBytes; 402 403 // If we're on ELFv1, then we need to load the actual function pointer 404 // from the function descriptor. 405 if (!Subtarget->isELFv2ABI()) { 406 // Load the new TOC pointer and the function address, but not r11 407 // (needing this is rare, and loading it here would prevent passing it 408 // via a 'nest' parameter. 409 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 410 .addReg(PPC::X2) 411 .addImm(8) 412 .addReg(ScratchReg)); 413 ++EncodedBytes; 414 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 415 .addReg(ScratchReg) 416 .addImm(0) 417 .addReg(ScratchReg)); 418 ++EncodedBytes; 419 } 420 421 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 422 .addReg(ScratchReg)); 423 ++EncodedBytes; 424 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 425 ++EncodedBytes; 426 427 // Restore the TOC pointer after the call. 428 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 429 .addReg(PPC::X2) 430 .addImm(TOCSaveOffset) 431 .addReg(PPC::X1)); 432 ++EncodedBytes; 433 } 434 } else if (CalleeMO.isGlobal()) { 435 const GlobalValue *GValue = CalleeMO.getGlobal(); 436 MCSymbol *MOSymbol = getSymbol(GValue); 437 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 438 439 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 440 .addExpr(SymVar)); 441 EncodedBytes += 2; 442 } 443 444 // Each instruction is 4 bytes. 445 EncodedBytes *= 4; 446 447 // Emit padding. 448 unsigned NumBytes = Opers.getNumPatchBytes(); 449 assert(NumBytes >= EncodedBytes && 450 "Patchpoint can't request size less than the length of a call."); 451 assert((NumBytes - EncodedBytes) % 4 == 0 && 452 "Invalid number of NOP bytes requested!"); 453 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 454 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 455 } 456 457 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 458 /// call to __tls_get_addr to the current output stream. 459 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 460 MCSymbolRefExpr::VariantKind VK) { 461 StringRef Name = "__tls_get_addr"; 462 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 463 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 464 const Module *M = MF->getFunction().getParent(); 465 466 assert(MI->getOperand(0).isReg() && 467 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 468 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 469 "GETtls[ld]ADDR[32] must define GPR3"); 470 assert(MI->getOperand(1).isReg() && 471 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 472 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 473 "GETtls[ld]ADDR[32] must read GPR3"); 474 475 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 476 isPositionIndependent()) 477 Kind = MCSymbolRefExpr::VK_PLT; 478 const MCExpr *TlsRef = 479 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 480 481 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 482 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 483 M->getPICLevel() == PICLevel::BigPIC) 484 TlsRef = MCBinaryExpr::createAdd( 485 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 486 const MachineOperand &MO = MI->getOperand(2); 487 const GlobalValue *GValue = MO.getGlobal(); 488 MCSymbol *MOSymbol = getSymbol(GValue); 489 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 490 EmitToStreamer(*OutStreamer, 491 MCInstBuilder(Subtarget->isPPC64() ? 492 PPC::BL8_NOP_TLS : PPC::BL_TLS) 493 .addExpr(TlsRef) 494 .addExpr(SymVar)); 495 } 496 497 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 498 /// the current output stream. 499 /// 500 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 501 MCInst TmpInst; 502 bool isPPC64 = Subtarget->isPPC64(); 503 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 504 const Module *M = MF->getFunction().getParent(); 505 PICLevel::Level PL = M->getPICLevel(); 506 507 #ifndef NDEBUG 508 // Validate that SPE and FPU are mutually exclusive in codegen 509 if (!MI->isInlineAsm()) { 510 for (const MachineOperand &MO: MI->operands()) { 511 if (MO.isReg()) { 512 unsigned Reg = MO.getReg(); 513 if (Subtarget->hasSPE()) { 514 if (PPC::F4RCRegClass.contains(Reg) || 515 PPC::F8RCRegClass.contains(Reg) || 516 PPC::QBRCRegClass.contains(Reg) || 517 PPC::QFRCRegClass.contains(Reg) || 518 PPC::QSRCRegClass.contains(Reg) || 519 PPC::VFRCRegClass.contains(Reg) || 520 PPC::VRRCRegClass.contains(Reg) || 521 PPC::VSFRCRegClass.contains(Reg) || 522 PPC::VSSRCRegClass.contains(Reg) 523 ) 524 llvm_unreachable("SPE targets cannot have FPRegs!"); 525 } else { 526 if (PPC::SPERCRegClass.contains(Reg)) 527 llvm_unreachable("SPE register found in FPU-targeted code!"); 528 } 529 } 530 } 531 } 532 #endif 533 // Lower multi-instruction pseudo operations. 534 switch (MI->getOpcode()) { 535 default: break; 536 case TargetOpcode::DBG_VALUE: 537 llvm_unreachable("Should be handled target independently"); 538 case TargetOpcode::STACKMAP: 539 return LowerSTACKMAP(SM, *MI); 540 case TargetOpcode::PATCHPOINT: 541 return LowerPATCHPOINT(SM, *MI); 542 543 case PPC::MoveGOTtoLR: { 544 // Transform %lr = MoveGOTtoLR 545 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 546 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 547 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 548 // blrl 549 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 550 MCSymbol *GOTSymbol = 551 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 552 const MCExpr *OffsExpr = 553 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 554 MCSymbolRefExpr::VK_PPC_LOCAL, 555 OutContext), 556 MCConstantExpr::create(4, OutContext), 557 OutContext); 558 559 // Emit the 'bl'. 560 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 561 return; 562 } 563 case PPC::MovePCtoLR: 564 case PPC::MovePCtoLR8: { 565 // Transform %lr = MovePCtoLR 566 // Into this, where the label is the PIC base: 567 // bl L1$pb 568 // L1$pb: 569 MCSymbol *PICBase = MF->getPICBaseSymbol(); 570 571 // Emit the 'bl'. 572 EmitToStreamer(*OutStreamer, 573 MCInstBuilder(PPC::BL) 574 // FIXME: We would like an efficient form for this, so we 575 // don't have to do a lot of extra uniquing. 576 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 577 578 // Emit the label. 579 OutStreamer->EmitLabel(PICBase); 580 return; 581 } 582 case PPC::UpdateGBR: { 583 // Transform %rd = UpdateGBR(%rt, %ri) 584 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 585 // add %rd, %rt, %ri 586 // or into (if secure plt mode is on): 587 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 588 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 589 // Get the offset from the GOT Base Register to the GOT 590 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 591 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 592 unsigned PICR = TmpInst.getOperand(0).getReg(); 593 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 594 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 595 : ".LTOC"); 596 const MCExpr *PB = 597 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 598 599 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 600 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 601 602 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 603 EmitToStreamer( 604 *OutStreamer, 605 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 606 607 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 608 EmitToStreamer( 609 *OutStreamer, 610 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 611 return; 612 } else { 613 MCSymbol *PICOffset = 614 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 615 TmpInst.setOpcode(PPC::LWZ); 616 const MCExpr *Exp = 617 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 618 const MCExpr *PB = 619 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 620 MCSymbolRefExpr::VK_None, 621 OutContext); 622 const MCOperand TR = TmpInst.getOperand(1); 623 const MCOperand PICR = TmpInst.getOperand(0); 624 625 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 626 TmpInst.getOperand(1) = 627 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 628 TmpInst.getOperand(0) = TR; 629 TmpInst.getOperand(2) = PICR; 630 EmitToStreamer(*OutStreamer, TmpInst); 631 632 TmpInst.setOpcode(PPC::ADD4); 633 TmpInst.getOperand(0) = PICR; 634 TmpInst.getOperand(1) = TR; 635 TmpInst.getOperand(2) = PICR; 636 EmitToStreamer(*OutStreamer, TmpInst); 637 return; 638 } 639 } 640 case PPC::LWZtoc: { 641 // Transform %r3 = LWZtoc @min1, %r2 642 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 643 644 // Change the opcode to LWZ, and the global address operand to be a 645 // reference to the GOT entry we will synthesize later. 646 TmpInst.setOpcode(PPC::LWZ); 647 const MachineOperand &MO = MI->getOperand(1); 648 649 // Map symbol -> label of TOC entry 650 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 651 MCSymbol *MOSymbol = nullptr; 652 if (MO.isGlobal()) 653 MOSymbol = getSymbol(MO.getGlobal()); 654 else if (MO.isCPI()) 655 MOSymbol = GetCPISymbol(MO.getIndex()); 656 else if (MO.isJTI()) 657 MOSymbol = GetJTISymbol(MO.getIndex()); 658 else if (MO.isBlockAddress()) 659 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 660 661 if (PL == PICLevel::SmallPIC) { 662 const MCExpr *Exp = 663 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 664 OutContext); 665 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 666 } else { 667 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 668 669 const MCExpr *Exp = 670 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 671 OutContext); 672 const MCExpr *PB = 673 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 674 OutContext); 675 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 676 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 677 } 678 EmitToStreamer(*OutStreamer, TmpInst); 679 return; 680 } 681 case PPC::LDtocJTI: 682 case PPC::LDtocCPT: 683 case PPC::LDtocBA: 684 case PPC::LDtoc: { 685 // Transform %x3 = LDtoc @min1, %x2 686 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 687 688 // Change the opcode to LD, and the global address operand to be a 689 // reference to the TOC entry we will synthesize later. 690 TmpInst.setOpcode(PPC::LD); 691 const MachineOperand &MO = MI->getOperand(1); 692 693 // Map symbol -> label of TOC entry 694 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 695 MCSymbol *MOSymbol = nullptr; 696 if (MO.isGlobal()) 697 MOSymbol = getSymbol(MO.getGlobal()); 698 else if (MO.isCPI()) 699 MOSymbol = GetCPISymbol(MO.getIndex()); 700 else if (MO.isJTI()) 701 MOSymbol = GetJTISymbol(MO.getIndex()); 702 else if (MO.isBlockAddress()) 703 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 704 705 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 706 707 const MCExpr *Exp = 708 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 709 OutContext); 710 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 711 EmitToStreamer(*OutStreamer, TmpInst); 712 return; 713 } 714 715 case PPC::ADDIStocHA: { 716 // Transform %xd = ADDIStocHA %x2, @sym 717 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 718 719 // Change the opcode to ADDIS8. If the global address is external, has 720 // common linkage, is a non-local function address, or is a jump table 721 // address, then generate a TOC entry and reference that. Otherwise 722 // reference the symbol directly. 723 TmpInst.setOpcode(PPC::ADDIS8); 724 const MachineOperand &MO = MI->getOperand(2); 725 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 726 MO.isBlockAddress()) && 727 "Invalid operand for ADDIStocHA!"); 728 MCSymbol *MOSymbol = nullptr; 729 bool GlobalToc = false; 730 731 if (MO.isGlobal()) { 732 const GlobalValue *GV = MO.getGlobal(); 733 MOSymbol = getSymbol(GV); 734 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 735 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 736 } else if (MO.isCPI()) { 737 MOSymbol = GetCPISymbol(MO.getIndex()); 738 } else if (MO.isJTI()) { 739 MOSymbol = GetJTISymbol(MO.getIndex()); 740 } else if (MO.isBlockAddress()) { 741 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 742 } 743 744 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 745 TM.getCodeModel() == CodeModel::Large) 746 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 747 748 const MCExpr *Exp = 749 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 750 OutContext); 751 752 if (!MO.isJTI() && MO.getOffset()) 753 Exp = MCBinaryExpr::createAdd(Exp, 754 MCConstantExpr::create(MO.getOffset(), 755 OutContext), 756 OutContext); 757 758 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 759 EmitToStreamer(*OutStreamer, TmpInst); 760 return; 761 } 762 case PPC::LDtocL: { 763 // Transform %xd = LDtocL @sym, %xs 764 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 765 766 // Change the opcode to LD. If the global address is external, has 767 // common linkage, or is a jump table address, then reference the 768 // associated TOC entry. Otherwise reference the symbol directly. 769 TmpInst.setOpcode(PPC::LD); 770 const MachineOperand &MO = MI->getOperand(1); 771 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 772 MO.isBlockAddress()) && 773 "Invalid operand for LDtocL!"); 774 MCSymbol *MOSymbol = nullptr; 775 776 if (MO.isJTI()) 777 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 778 else if (MO.isBlockAddress()) { 779 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 780 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 781 } 782 else if (MO.isCPI()) { 783 MOSymbol = GetCPISymbol(MO.getIndex()); 784 if (TM.getCodeModel() == CodeModel::Large) 785 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 786 } 787 else if (MO.isGlobal()) { 788 const GlobalValue *GV = MO.getGlobal(); 789 MOSymbol = getSymbol(GV); 790 LLVM_DEBUG( 791 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 792 assert((GVFlags & PPCII::MO_NLP_FLAG) && 793 "LDtocL used on symbol that could be accessed directly is " 794 "invalid. Must match ADDIStocHA.")); 795 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 796 } 797 798 const MCExpr *Exp = 799 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 800 OutContext); 801 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 802 EmitToStreamer(*OutStreamer, TmpInst); 803 return; 804 } 805 case PPC::ADDItocL: { 806 // Transform %xd = ADDItocL %xs, @sym 807 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 808 809 // Change the opcode to ADDI8. If the global address is external, then 810 // generate a TOC entry and reference that. Otherwise reference the 811 // symbol directly. 812 TmpInst.setOpcode(PPC::ADDI8); 813 const MachineOperand &MO = MI->getOperand(2); 814 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 815 MCSymbol *MOSymbol = nullptr; 816 817 if (MO.isGlobal()) { 818 const GlobalValue *GV = MO.getGlobal(); 819 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 820 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 821 "Interposable definitions must use indirect access.")); 822 MOSymbol = getSymbol(GV); 823 } else if (MO.isCPI()) { 824 MOSymbol = GetCPISymbol(MO.getIndex()); 825 } 826 827 const MCExpr *Exp = 828 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 829 OutContext); 830 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 831 EmitToStreamer(*OutStreamer, TmpInst); 832 return; 833 } 834 case PPC::ADDISgotTprelHA: { 835 // Transform: %xd = ADDISgotTprelHA %x2, @sym 836 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 837 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 838 const MachineOperand &MO = MI->getOperand(2); 839 const GlobalValue *GValue = MO.getGlobal(); 840 MCSymbol *MOSymbol = getSymbol(GValue); 841 const MCExpr *SymGotTprel = 842 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 843 OutContext); 844 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 845 .addReg(MI->getOperand(0).getReg()) 846 .addReg(MI->getOperand(1).getReg()) 847 .addExpr(SymGotTprel)); 848 return; 849 } 850 case PPC::LDgotTprelL: 851 case PPC::LDgotTprelL32: { 852 // Transform %xd = LDgotTprelL @sym, %xs 853 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 854 855 // Change the opcode to LD. 856 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 857 const MachineOperand &MO = MI->getOperand(1); 858 const GlobalValue *GValue = MO.getGlobal(); 859 MCSymbol *MOSymbol = getSymbol(GValue); 860 const MCExpr *Exp = 861 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 862 OutContext); 863 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 864 EmitToStreamer(*OutStreamer, TmpInst); 865 return; 866 } 867 868 case PPC::PPC32PICGOT: { 869 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 870 MCSymbol *GOTRef = OutContext.createTempSymbol(); 871 MCSymbol *NextInstr = OutContext.createTempSymbol(); 872 873 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 874 // FIXME: We would like an efficient form for this, so we don't have to do 875 // a lot of extra uniquing. 876 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 877 const MCExpr *OffsExpr = 878 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 879 MCSymbolRefExpr::create(GOTRef, OutContext), 880 OutContext); 881 OutStreamer->EmitLabel(GOTRef); 882 OutStreamer->EmitValue(OffsExpr, 4); 883 OutStreamer->EmitLabel(NextInstr); 884 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 885 .addReg(MI->getOperand(0).getReg())); 886 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 887 .addReg(MI->getOperand(1).getReg()) 888 .addImm(0) 889 .addReg(MI->getOperand(0).getReg())); 890 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 891 .addReg(MI->getOperand(0).getReg()) 892 .addReg(MI->getOperand(1).getReg()) 893 .addReg(MI->getOperand(0).getReg())); 894 return; 895 } 896 case PPC::PPC32GOT: { 897 MCSymbol *GOTSymbol = 898 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 899 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 900 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 901 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 902 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 903 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 904 .addReg(MI->getOperand(0).getReg()) 905 .addExpr(SymGotTlsL)); 906 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 907 .addReg(MI->getOperand(0).getReg()) 908 .addReg(MI->getOperand(0).getReg()) 909 .addExpr(SymGotTlsHA)); 910 return; 911 } 912 case PPC::ADDIStlsgdHA: { 913 // Transform: %xd = ADDIStlsgdHA %x2, @sym 914 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 915 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 916 const MachineOperand &MO = MI->getOperand(2); 917 const GlobalValue *GValue = MO.getGlobal(); 918 MCSymbol *MOSymbol = getSymbol(GValue); 919 const MCExpr *SymGotTlsGD = 920 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 921 OutContext); 922 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 923 .addReg(MI->getOperand(0).getReg()) 924 .addReg(MI->getOperand(1).getReg()) 925 .addExpr(SymGotTlsGD)); 926 return; 927 } 928 case PPC::ADDItlsgdL: 929 // Transform: %xd = ADDItlsgdL %xs, @sym 930 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 931 case PPC::ADDItlsgdL32: { 932 // Transform: %rd = ADDItlsgdL32 %rs, @sym 933 // Into: %rd = ADDI %rs, sym@got@tlsgd 934 const MachineOperand &MO = MI->getOperand(2); 935 const GlobalValue *GValue = MO.getGlobal(); 936 MCSymbol *MOSymbol = getSymbol(GValue); 937 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 938 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 939 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 940 OutContext); 941 EmitToStreamer(*OutStreamer, 942 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 943 .addReg(MI->getOperand(0).getReg()) 944 .addReg(MI->getOperand(1).getReg()) 945 .addExpr(SymGotTlsGD)); 946 return; 947 } 948 case PPC::GETtlsADDR: 949 // Transform: %x3 = GETtlsADDR %x3, @sym 950 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 951 case PPC::GETtlsADDR32: { 952 // Transform: %r3 = GETtlsADDR32 %r3, @sym 953 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 954 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 955 return; 956 } 957 case PPC::ADDIStlsldHA: { 958 // Transform: %xd = ADDIStlsldHA %x2, @sym 959 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 960 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 961 const MachineOperand &MO = MI->getOperand(2); 962 const GlobalValue *GValue = MO.getGlobal(); 963 MCSymbol *MOSymbol = getSymbol(GValue); 964 const MCExpr *SymGotTlsLD = 965 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 966 OutContext); 967 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 968 .addReg(MI->getOperand(0).getReg()) 969 .addReg(MI->getOperand(1).getReg()) 970 .addExpr(SymGotTlsLD)); 971 return; 972 } 973 case PPC::ADDItlsldL: 974 // Transform: %xd = ADDItlsldL %xs, @sym 975 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 976 case PPC::ADDItlsldL32: { 977 // Transform: %rd = ADDItlsldL32 %rs, @sym 978 // Into: %rd = ADDI %rs, sym@got@tlsld 979 const MachineOperand &MO = MI->getOperand(2); 980 const GlobalValue *GValue = MO.getGlobal(); 981 MCSymbol *MOSymbol = getSymbol(GValue); 982 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 983 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 984 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 985 OutContext); 986 EmitToStreamer(*OutStreamer, 987 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 988 .addReg(MI->getOperand(0).getReg()) 989 .addReg(MI->getOperand(1).getReg()) 990 .addExpr(SymGotTlsLD)); 991 return; 992 } 993 case PPC::GETtlsldADDR: 994 // Transform: %x3 = GETtlsldADDR %x3, @sym 995 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 996 case PPC::GETtlsldADDR32: { 997 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 998 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 999 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1000 return; 1001 } 1002 case PPC::ADDISdtprelHA: 1003 // Transform: %xd = ADDISdtprelHA %xs, @sym 1004 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1005 case PPC::ADDISdtprelHA32: { 1006 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1007 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1008 const MachineOperand &MO = MI->getOperand(2); 1009 const GlobalValue *GValue = MO.getGlobal(); 1010 MCSymbol *MOSymbol = getSymbol(GValue); 1011 const MCExpr *SymDtprel = 1012 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1013 OutContext); 1014 EmitToStreamer( 1015 *OutStreamer, 1016 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1017 .addReg(MI->getOperand(0).getReg()) 1018 .addReg(MI->getOperand(1).getReg()) 1019 .addExpr(SymDtprel)); 1020 return; 1021 } 1022 case PPC::ADDIdtprelL: 1023 // Transform: %xd = ADDIdtprelL %xs, @sym 1024 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1025 case PPC::ADDIdtprelL32: { 1026 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1027 // Into: %rd = ADDI %rs, sym@dtprel@l 1028 const MachineOperand &MO = MI->getOperand(2); 1029 const GlobalValue *GValue = MO.getGlobal(); 1030 MCSymbol *MOSymbol = getSymbol(GValue); 1031 const MCExpr *SymDtprel = 1032 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1033 OutContext); 1034 EmitToStreamer(*OutStreamer, 1035 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1036 .addReg(MI->getOperand(0).getReg()) 1037 .addReg(MI->getOperand(1).getReg()) 1038 .addExpr(SymDtprel)); 1039 return; 1040 } 1041 case PPC::MFOCRF: 1042 case PPC::MFOCRF8: 1043 if (!Subtarget->hasMFOCRF()) { 1044 // Transform: %r3 = MFOCRF %cr7 1045 // Into: %r3 = MFCR ;; cr7 1046 unsigned NewOpcode = 1047 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1048 OutStreamer->AddComment(PPCInstPrinter:: 1049 getRegisterName(MI->getOperand(1).getReg())); 1050 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1051 .addReg(MI->getOperand(0).getReg())); 1052 return; 1053 } 1054 break; 1055 case PPC::MTOCRF: 1056 case PPC::MTOCRF8: 1057 if (!Subtarget->hasMFOCRF()) { 1058 // Transform: %cr7 = MTOCRF %r3 1059 // Into: MTCRF mask, %r3 ;; cr7 1060 unsigned NewOpcode = 1061 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1062 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1063 ->getEncodingValue(MI->getOperand(0).getReg()); 1064 OutStreamer->AddComment(PPCInstPrinter:: 1065 getRegisterName(MI->getOperand(0).getReg())); 1066 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1067 .addImm(Mask) 1068 .addReg(MI->getOperand(1).getReg())); 1069 return; 1070 } 1071 break; 1072 case PPC::LD: 1073 case PPC::STD: 1074 case PPC::LWA_32: 1075 case PPC::LWA: { 1076 // Verify alignment is legal, so we don't create relocations 1077 // that can't be supported. 1078 // FIXME: This test is currently disabled for Darwin. The test 1079 // suite shows a handful of test cases that fail this check for 1080 // Darwin. Those need to be investigated before this sanity test 1081 // can be enabled for those subtargets. 1082 if (!Subtarget->isDarwin()) { 1083 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1084 const MachineOperand &MO = MI->getOperand(OpNum); 1085 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1086 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1087 } 1088 // Now process the instruction normally. 1089 break; 1090 } 1091 } 1092 1093 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1094 EmitToStreamer(*OutStreamer, TmpInst); 1095 } 1096 1097 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1098 if (!Subtarget->isPPC64()) 1099 return PPCAsmPrinter::EmitInstruction(MI); 1100 1101 switch (MI->getOpcode()) { 1102 default: 1103 return PPCAsmPrinter::EmitInstruction(MI); 1104 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1105 // .begin: 1106 // b .end # lis 0, FuncId[16..32] 1107 // nop # li 0, FuncId[0..15] 1108 // std 0, -8(1) 1109 // mflr 0 1110 // bl __xray_FunctionEntry 1111 // mtlr 0 1112 // .end: 1113 // 1114 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1115 // of instructions change. 1116 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1117 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1118 OutStreamer->EmitLabel(BeginOfSled); 1119 EmitToStreamer(*OutStreamer, 1120 MCInstBuilder(PPC::B).addExpr( 1121 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1122 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1123 EmitToStreamer( 1124 *OutStreamer, 1125 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1126 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1127 EmitToStreamer(*OutStreamer, 1128 MCInstBuilder(PPC::BL8_NOP) 1129 .addExpr(MCSymbolRefExpr::create( 1130 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1131 OutContext))); 1132 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1133 OutStreamer->EmitLabel(EndOfSled); 1134 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1135 break; 1136 } 1137 case TargetOpcode::PATCHABLE_RET: { 1138 unsigned RetOpcode = MI->getOperand(0).getImm(); 1139 MCInst RetInst; 1140 RetInst.setOpcode(RetOpcode); 1141 for (const auto &MO : 1142 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1143 MCOperand MCOp; 1144 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1145 RetInst.addOperand(MCOp); 1146 } 1147 1148 bool IsConditional; 1149 if (RetOpcode == PPC::BCCLR) { 1150 IsConditional = true; 1151 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1152 RetOpcode == PPC::TCRETURNai8) { 1153 break; 1154 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1155 IsConditional = false; 1156 } else { 1157 EmitToStreamer(*OutStreamer, RetInst); 1158 break; 1159 } 1160 1161 MCSymbol *FallthroughLabel; 1162 if (IsConditional) { 1163 // Before: 1164 // bgtlr cr0 1165 // 1166 // After: 1167 // ble cr0, .end 1168 // .p2align 3 1169 // .begin: 1170 // blr # lis 0, FuncId[16..32] 1171 // nop # li 0, FuncId[0..15] 1172 // std 0, -8(1) 1173 // mflr 0 1174 // bl __xray_FunctionExit 1175 // mtlr 0 1176 // blr 1177 // .end: 1178 // 1179 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1180 // of instructions change. 1181 FallthroughLabel = OutContext.createTempSymbol(); 1182 EmitToStreamer( 1183 *OutStreamer, 1184 MCInstBuilder(PPC::BCC) 1185 .addImm(PPC::InvertPredicate( 1186 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1187 .addReg(MI->getOperand(2).getReg()) 1188 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1189 RetInst = MCInst(); 1190 RetInst.setOpcode(PPC::BLR8); 1191 } 1192 // .p2align 3 1193 // .begin: 1194 // b(lr)? # lis 0, FuncId[16..32] 1195 // nop # li 0, FuncId[0..15] 1196 // std 0, -8(1) 1197 // mflr 0 1198 // bl __xray_FunctionExit 1199 // mtlr 0 1200 // b(lr)? 1201 // 1202 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1203 // of instructions change. 1204 OutStreamer->EmitCodeAlignment(8); 1205 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1206 OutStreamer->EmitLabel(BeginOfSled); 1207 EmitToStreamer(*OutStreamer, RetInst); 1208 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1209 EmitToStreamer( 1210 *OutStreamer, 1211 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1212 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1213 EmitToStreamer(*OutStreamer, 1214 MCInstBuilder(PPC::BL8_NOP) 1215 .addExpr(MCSymbolRefExpr::create( 1216 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1217 OutContext))); 1218 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1219 EmitToStreamer(*OutStreamer, RetInst); 1220 if (IsConditional) 1221 OutStreamer->EmitLabel(FallthroughLabel); 1222 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1223 break; 1224 } 1225 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1226 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1227 case TargetOpcode::PATCHABLE_TAIL_CALL: 1228 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1229 // normal function exit from a tail exit. 1230 llvm_unreachable("Tail call is handled in the normal case. See comments " 1231 "around this assert."); 1232 } 1233 } 1234 1235 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1236 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1237 PPCTargetStreamer *TS = 1238 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1239 1240 if (TS) 1241 TS->emitAbiVersion(2); 1242 } 1243 1244 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1245 !isPositionIndependent()) 1246 return AsmPrinter::EmitStartOfAsmFile(M); 1247 1248 if (M.getPICLevel() == PICLevel::SmallPIC) 1249 return AsmPrinter::EmitStartOfAsmFile(M); 1250 1251 OutStreamer->SwitchSection(OutContext.getELFSection( 1252 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1253 1254 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1255 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1256 1257 OutStreamer->EmitLabel(CurrentPos); 1258 1259 // The GOT pointer points to the middle of the GOT, in order to reference the 1260 // entire 64kB range. 0x8000 is the midpoint. 1261 const MCExpr *tocExpr = 1262 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1263 MCConstantExpr::create(0x8000, OutContext), 1264 OutContext); 1265 1266 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1267 1268 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1269 } 1270 1271 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1272 // linux/ppc32 - Normal entry label. 1273 if (!Subtarget->isPPC64() && 1274 (!isPositionIndependent() || 1275 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1276 return AsmPrinter::EmitFunctionEntryLabel(); 1277 1278 if (!Subtarget->isPPC64()) { 1279 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1280 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1281 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1282 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1283 OutStreamer->EmitLabel(RelocSymbol); 1284 1285 const MCExpr *OffsExpr = 1286 MCBinaryExpr::createSub( 1287 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1288 OutContext), 1289 MCSymbolRefExpr::create(PICBase, OutContext), 1290 OutContext); 1291 OutStreamer->EmitValue(OffsExpr, 4); 1292 OutStreamer->EmitLabel(CurrentFnSym); 1293 return; 1294 } else 1295 return AsmPrinter::EmitFunctionEntryLabel(); 1296 } 1297 1298 // ELFv2 ABI - Normal entry label. 1299 if (Subtarget->isELFv2ABI()) { 1300 // In the Large code model, we allow arbitrary displacements between 1301 // the text section and its associated TOC section. We place the 1302 // full 8-byte offset to the TOC in memory immediately preceding 1303 // the function global entry point. 1304 if (TM.getCodeModel() == CodeModel::Large 1305 && !MF->getRegInfo().use_empty(PPC::X2)) { 1306 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1307 1308 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1309 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1310 const MCExpr *TOCDeltaExpr = 1311 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1312 MCSymbolRefExpr::create(GlobalEPSymbol, 1313 OutContext), 1314 OutContext); 1315 1316 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1317 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1318 } 1319 return AsmPrinter::EmitFunctionEntryLabel(); 1320 } 1321 1322 // Emit an official procedure descriptor. 1323 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1324 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1325 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1326 OutStreamer->SwitchSection(Section); 1327 OutStreamer->EmitLabel(CurrentFnSym); 1328 OutStreamer->EmitValueToAlignment(8); 1329 MCSymbol *Symbol1 = CurrentFnSymForSize; 1330 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1331 // entry point. 1332 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1333 8 /*size*/); 1334 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1335 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1336 OutStreamer->EmitValue( 1337 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1338 8/*size*/); 1339 // Emit a null environment pointer. 1340 OutStreamer->EmitIntValue(0, 8 /* size */); 1341 OutStreamer->SwitchSection(Current.first, Current.second); 1342 } 1343 1344 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1345 const DataLayout &DL = getDataLayout(); 1346 1347 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1348 1349 PPCTargetStreamer &TS = 1350 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1351 1352 if (!TOC.empty()) { 1353 MCSectionELF *Section; 1354 1355 if (isPPC64) 1356 Section = OutStreamer->getContext().getELFSection( 1357 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1358 else 1359 Section = OutStreamer->getContext().getELFSection( 1360 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1361 OutStreamer->SwitchSection(Section); 1362 1363 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1364 E = TOC.end(); I != E; ++I) { 1365 OutStreamer->EmitLabel(I->second); 1366 MCSymbol *S = I->first; 1367 if (isPPC64) { 1368 TS.emitTCEntry(*S); 1369 } else { 1370 OutStreamer->EmitValueToAlignment(4); 1371 OutStreamer->EmitSymbolValue(S, 4); 1372 } 1373 } 1374 } 1375 1376 return AsmPrinter::doFinalization(M); 1377 } 1378 1379 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1380 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1381 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1382 // provide two entry points. The ABI guarantees that when calling the 1383 // local entry point, r2 is set up by the caller to contain the TOC base 1384 // for this function, and when calling the global entry point, r12 is set 1385 // up by the caller to hold the address of the global entry point. We 1386 // thus emit a prefix sequence along the following lines: 1387 // 1388 // func: 1389 // .Lfunc_gepNN: 1390 // # global entry point 1391 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1392 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1393 // .Lfunc_lepNN: 1394 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1395 // # local entry point, followed by function body 1396 // 1397 // For the Large code model, we create 1398 // 1399 // .Lfunc_tocNN: 1400 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1401 // func: 1402 // .Lfunc_gepNN: 1403 // # global entry point 1404 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1405 // add r2,r2,r12 1406 // .Lfunc_lepNN: 1407 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1408 // # local entry point, followed by function body 1409 // 1410 // This ensures we have r2 set up correctly while executing the function 1411 // body, no matter which entry point is called. 1412 if (Subtarget->isELFv2ABI() 1413 // Only do all that if the function uses r2 in the first place. 1414 && !MF->getRegInfo().use_empty(PPC::X2)) { 1415 // Note: The logic here must be synchronized with the code in the 1416 // branch-selection pass which sets the offset of the first block in the 1417 // function. This matters because it affects the alignment. 1418 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1419 1420 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1421 OutStreamer->EmitLabel(GlobalEntryLabel); 1422 const MCSymbolRefExpr *GlobalEntryLabelExp = 1423 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1424 1425 if (TM.getCodeModel() != CodeModel::Large) { 1426 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1427 const MCExpr *TOCDeltaExpr = 1428 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1429 GlobalEntryLabelExp, OutContext); 1430 1431 const MCExpr *TOCDeltaHi = 1432 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1433 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1434 .addReg(PPC::X2) 1435 .addReg(PPC::X12) 1436 .addExpr(TOCDeltaHi)); 1437 1438 const MCExpr *TOCDeltaLo = 1439 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1440 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1441 .addReg(PPC::X2) 1442 .addReg(PPC::X2) 1443 .addExpr(TOCDeltaLo)); 1444 } else { 1445 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1446 const MCExpr *TOCOffsetDeltaExpr = 1447 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1448 GlobalEntryLabelExp, OutContext); 1449 1450 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1451 .addReg(PPC::X2) 1452 .addExpr(TOCOffsetDeltaExpr) 1453 .addReg(PPC::X12)); 1454 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1455 .addReg(PPC::X2) 1456 .addReg(PPC::X2) 1457 .addReg(PPC::X12)); 1458 } 1459 1460 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1461 OutStreamer->EmitLabel(LocalEntryLabel); 1462 const MCSymbolRefExpr *LocalEntryLabelExp = 1463 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1464 const MCExpr *LocalOffsetExp = 1465 MCBinaryExpr::createSub(LocalEntryLabelExp, 1466 GlobalEntryLabelExp, OutContext); 1467 1468 PPCTargetStreamer *TS = 1469 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1470 1471 if (TS) 1472 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1473 } 1474 } 1475 1476 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1477 /// directive. 1478 /// 1479 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1480 // Only the 64-bit target requires a traceback table. For now, 1481 // we only emit the word of zeroes that GDB requires to find 1482 // the end of the function, and zeroes for the eight-byte 1483 // mandatory fields. 1484 // FIXME: We should fill in the eight-byte mandatory fields as described in 1485 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1486 // currently make use of these fields). 1487 if (Subtarget->isPPC64()) { 1488 OutStreamer->EmitIntValue(0, 4/*size*/); 1489 OutStreamer->EmitIntValue(0, 8/*size*/); 1490 } 1491 } 1492 1493 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1494 static const char *const CPUDirectives[] = { 1495 "", 1496 "ppc", 1497 "ppc440", 1498 "ppc601", 1499 "ppc602", 1500 "ppc603", 1501 "ppc7400", 1502 "ppc750", 1503 "ppc970", 1504 "ppcA2", 1505 "ppce500", 1506 "ppce500mc", 1507 "ppce5500", 1508 "power3", 1509 "power4", 1510 "power5", 1511 "power5x", 1512 "power6", 1513 "power6x", 1514 "power7", 1515 // FIXME: why is power8 missing here? 1516 "ppc64", 1517 "ppc64le", 1518 "power9" 1519 }; 1520 1521 // Get the numerically largest directive. 1522 // FIXME: How should we merge darwin directives? 1523 unsigned Directive = PPC::DIR_NONE; 1524 for (const Function &F : M) { 1525 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1526 unsigned FDir = STI.getDarwinDirective(); 1527 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1528 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1529 Directive = PPC::DIR_970; 1530 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1531 Directive = PPC::DIR_7400; 1532 if (STI.isPPC64() && Directive < PPC::DIR_64) 1533 Directive = PPC::DIR_64; 1534 } 1535 1536 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1537 1538 assert(Directive < array_lengthof(CPUDirectives) && 1539 "CPUDirectives[] might not be up-to-date!"); 1540 PPCTargetStreamer &TStreamer = 1541 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1542 TStreamer.emitMachine(CPUDirectives[Directive]); 1543 1544 // Prime text sections so they are adjacent. This reduces the likelihood a 1545 // large data or debug section causes a branch to exceed 16M limit. 1546 const TargetLoweringObjectFileMachO &TLOFMacho = 1547 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1548 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1549 if (TM.getRelocationModel() == Reloc::PIC_) { 1550 OutStreamer->SwitchSection( 1551 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1552 MachO::S_SYMBOL_STUBS | 1553 MachO::S_ATTR_PURE_INSTRUCTIONS, 1554 32, SectionKind::getText())); 1555 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1556 OutStreamer->SwitchSection( 1557 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1558 MachO::S_SYMBOL_STUBS | 1559 MachO::S_ATTR_PURE_INSTRUCTIONS, 1560 16, SectionKind::getText())); 1561 } 1562 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1563 } 1564 1565 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1566 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1567 1568 // Darwin/PPC always uses mach-o. 1569 const TargetLoweringObjectFileMachO &TLOFMacho = 1570 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1571 if (MMI) { 1572 MachineModuleInfoMachO &MMIMacho = 1573 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1574 1575 if (MAI->doesSupportExceptionHandling()) { 1576 // Add the (possibly multiple) personalities to the set of global values. 1577 // Only referenced functions get into the Personalities list. 1578 for (const Function *Personality : MMI->getPersonalities()) { 1579 if (Personality) { 1580 MCSymbol *NLPSym = 1581 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1582 MachineModuleInfoImpl::StubValueTy &StubSym = 1583 MMIMacho.getGVStubEntry(NLPSym); 1584 StubSym = 1585 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1586 } 1587 } 1588 } 1589 1590 // Output stubs for dynamically-linked functions. 1591 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1592 1593 // Output macho stubs for external and common global variables. 1594 if (!Stubs.empty()) { 1595 // Switch with ".non_lazy_symbol_pointer" directive. 1596 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1597 EmitAlignment(isPPC64 ? 3 : 2); 1598 1599 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1600 // L_foo$stub: 1601 OutStreamer->EmitLabel(Stubs[i].first); 1602 // .indirect_symbol _foo 1603 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1604 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1605 MCSA_IndirectSymbol); 1606 1607 if (MCSym.getInt()) 1608 // External to current translation unit. 1609 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1610 else 1611 // Internal to current translation unit. 1612 // 1613 // When we place the LSDA into the TEXT section, the type info 1614 // pointers 1615 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1616 // However, sometimes the types are local to the file. So we need to 1617 // fill in the value for the NLP in those cases. 1618 OutStreamer->EmitValue( 1619 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1620 isPPC64 ? 8 : 4 /*size*/); 1621 } 1622 1623 Stubs.clear(); 1624 OutStreamer->AddBlankLine(); 1625 } 1626 } 1627 1628 // Funny Darwin hack: This flag tells the linker that no global symbols 1629 // contain code that falls through to other global symbols (e.g. the obvious 1630 // implementation of multiple entry points). If this doesn't occur, the 1631 // linker can safely perform dead code stripping. Since LLVM never generates 1632 // code that does this, it is always safe to set. 1633 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1634 1635 return AsmPrinter::doFinalization(M); 1636 } 1637 1638 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1639 /// for a MachineFunction to the given output stream, in a format that the 1640 /// Darwin assembler can deal with. 1641 /// 1642 static AsmPrinter * 1643 createPPCAsmPrinterPass(TargetMachine &tm, 1644 std::unique_ptr<MCStreamer> &&Streamer) { 1645 if (tm.getTargetTriple().isMacOSX()) 1646 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1647 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1648 } 1649 1650 // Force static initialization. 1651 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1652 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1653 createPPCAsmPrinterPass); 1654 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1655 createPPCAsmPrinterPass); 1656 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1657 createPPCAsmPrinterPass); 1658 } 1659