1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/GlobalVariable.h" 47 #include "llvm/IR/Module.h" 48 #include "llvm/MC/MCAsmInfo.h" 49 #include "llvm/MC/MCContext.h" 50 #include "llvm/MC/MCExpr.h" 51 #include "llvm/MC/MCInst.h" 52 #include "llvm/MC/MCInstBuilder.h" 53 #include "llvm/MC/MCSectionELF.h" 54 #include "llvm/MC/MCSectionMachO.h" 55 #include "llvm/MC/MCSectionXCOFF.h" 56 #include "llvm/MC/MCStreamer.h" 57 #include "llvm/MC/MCSymbol.h" 58 #include "llvm/MC/MCSymbolELF.h" 59 #include "llvm/MC/MCSymbolXCOFF.h" 60 #include "llvm/MC/SectionKind.h" 61 #include "llvm/Support/Casting.h" 62 #include "llvm/Support/CodeGen.h" 63 #include "llvm/Support/Debug.h" 64 #include "llvm/Support/ErrorHandling.h" 65 #include "llvm/Support/TargetRegistry.h" 66 #include "llvm/Support/raw_ostream.h" 67 #include "llvm/Target/TargetMachine.h" 68 #include <algorithm> 69 #include <cassert> 70 #include <cstdint> 71 #include <memory> 72 #include <new> 73 74 using namespace llvm; 75 76 #define DEBUG_TYPE "asmprinter" 77 78 namespace { 79 80 class PPCAsmPrinter : public AsmPrinter { 81 protected: 82 MapVector<const MCSymbol *, MCSymbol *> TOC; 83 const PPCSubtarget *Subtarget = nullptr; 84 StackMaps SM; 85 86 virtual MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO); 87 88 public: 89 explicit PPCAsmPrinter(TargetMachine &TM, 90 std::unique_ptr<MCStreamer> Streamer) 91 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 92 93 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 94 95 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym); 96 97 bool doInitialization(Module &M) override { 98 if (!TOC.empty()) 99 TOC.clear(); 100 return AsmPrinter::doInitialization(M); 101 } 102 103 void EmitInstruction(const MachineInstr *MI) override; 104 105 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 106 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 107 /// The \p MI would be INLINEASM ONLY. 108 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 109 110 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 111 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 112 const char *ExtraCode, raw_ostream &O) override; 113 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 114 const char *ExtraCode, raw_ostream &O) override; 115 116 void EmitEndOfAsmFile(Module &M) override; 117 118 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 119 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 120 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 121 bool runOnMachineFunction(MachineFunction &MF) override { 122 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 123 bool Changed = AsmPrinter::runOnMachineFunction(MF); 124 emitXRayTable(); 125 return Changed; 126 } 127 }; 128 129 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 130 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 131 public: 132 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 133 std::unique_ptr<MCStreamer> Streamer) 134 : PPCAsmPrinter(TM, std::move(Streamer)) {} 135 136 StringRef getPassName() const override { 137 return "Linux PPC Assembly Printer"; 138 } 139 140 bool doFinalization(Module &M) override; 141 void EmitStartOfAsmFile(Module &M) override; 142 143 void EmitFunctionEntryLabel() override; 144 145 void EmitFunctionBodyStart() override; 146 void EmitFunctionBodyEnd() override; 147 void EmitInstruction(const MachineInstr *MI) override; 148 }; 149 150 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 151 /// OS X 152 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 153 public: 154 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 155 std::unique_ptr<MCStreamer> Streamer) 156 : PPCAsmPrinter(TM, std::move(Streamer)) {} 157 158 StringRef getPassName() const override { 159 return "Darwin PPC Assembly Printer"; 160 } 161 162 bool doFinalization(Module &M) override; 163 void EmitStartOfAsmFile(Module &M) override; 164 }; 165 166 class PPCAIXAsmPrinter : public PPCAsmPrinter { 167 private: 168 static void ValidateGV(const GlobalVariable *GV); 169 protected: 170 MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO) override; 171 172 public: 173 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 174 : PPCAsmPrinter(TM, std::move(Streamer)) {} 175 176 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 177 178 void SetupMachineFunction(MachineFunction &MF) override; 179 180 void EmitGlobalVariable(const GlobalVariable *GV) override; 181 182 void EmitFunctionDescriptor() override; 183 184 void EmitEndOfAsmFile(Module &) override; 185 }; 186 187 } // end anonymous namespace 188 189 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 190 raw_ostream &O) { 191 // Computing the address of a global symbol, not calling it. 192 const GlobalValue *GV = MO.getGlobal(); 193 MCSymbol *SymToPrint; 194 195 // External or weakly linked global variables need non-lazily-resolved stubs 196 if (Subtarget->hasLazyResolverStub(GV)) { 197 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 198 MachineModuleInfoImpl::StubValueTy &StubSym = 199 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 200 SymToPrint); 201 if (!StubSym.getPointer()) 202 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 203 !GV->hasInternalLinkage()); 204 } else { 205 SymToPrint = getSymbol(GV); 206 } 207 208 SymToPrint->print(O, MAI); 209 210 printOffset(MO.getOffset(), O); 211 } 212 213 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 214 raw_ostream &O) { 215 const DataLayout &DL = getDataLayout(); 216 const MachineOperand &MO = MI->getOperand(OpNo); 217 218 switch (MO.getType()) { 219 case MachineOperand::MO_Register: { 220 // The MI is INLINEASM ONLY and UseVSXReg is always false. 221 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 222 223 // Linux assembler (Others?) does not take register mnemonics. 224 // FIXME - What about special registers used in mfspr/mtspr? 225 if (!Subtarget->isDarwin()) 226 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 227 O << RegName; 228 return; 229 } 230 case MachineOperand::MO_Immediate: 231 O << MO.getImm(); 232 return; 233 234 case MachineOperand::MO_MachineBasicBlock: 235 MO.getMBB()->getSymbol()->print(O, MAI); 236 return; 237 case MachineOperand::MO_ConstantPoolIndex: 238 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 239 << MO.getIndex(); 240 return; 241 case MachineOperand::MO_BlockAddress: 242 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 243 return; 244 case MachineOperand::MO_GlobalAddress: { 245 PrintSymbolOperand(MO, O); 246 return; 247 } 248 249 default: 250 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 251 return; 252 } 253 } 254 255 /// PrintAsmOperand - Print out an operand for an inline asm expression. 256 /// 257 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 258 const char *ExtraCode, raw_ostream &O) { 259 // Does this asm operand have a single letter operand modifier? 260 if (ExtraCode && ExtraCode[0]) { 261 if (ExtraCode[1] != 0) return true; // Unknown modifier. 262 263 switch (ExtraCode[0]) { 264 default: 265 // See if this is a generic print operand 266 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 267 case 'L': // Write second word of DImode reference. 268 // Verify that this operand has two consecutive registers. 269 if (!MI->getOperand(OpNo).isReg() || 270 OpNo+1 == MI->getNumOperands() || 271 !MI->getOperand(OpNo+1).isReg()) 272 return true; 273 ++OpNo; // Return the high-part. 274 break; 275 case 'I': 276 // Write 'i' if an integer constant, otherwise nothing. Used to print 277 // addi vs add, etc. 278 if (MI->getOperand(OpNo).isImm()) 279 O << "i"; 280 return false; 281 case 'x': 282 if(!MI->getOperand(OpNo).isReg()) 283 return true; 284 // This operand uses VSX numbering. 285 // If the operand is a VMX register, convert it to a VSX register. 286 Register Reg = MI->getOperand(OpNo).getReg(); 287 if (PPCInstrInfo::isVRRegister(Reg)) 288 Reg = PPC::VSX32 + (Reg - PPC::V0); 289 else if (PPCInstrInfo::isVFRegister(Reg)) 290 Reg = PPC::VSX32 + (Reg - PPC::VF0); 291 const char *RegName; 292 RegName = PPCInstPrinter::getRegisterName(Reg); 293 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 294 O << RegName; 295 return false; 296 } 297 } 298 299 printOperand(MI, OpNo, O); 300 return false; 301 } 302 303 // At the moment, all inline asm memory operands are a single register. 304 // In any case, the output of this routine should always be just one 305 // assembler operand. 306 307 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 308 const char *ExtraCode, 309 raw_ostream &O) { 310 if (ExtraCode && ExtraCode[0]) { 311 if (ExtraCode[1] != 0) return true; // Unknown modifier. 312 313 switch (ExtraCode[0]) { 314 default: return true; // Unknown modifier. 315 case 'y': // A memory reference for an X-form instruction 316 { 317 const char *RegName = "r0"; 318 if (!Subtarget->isDarwin()) 319 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 320 O << RegName << ", "; 321 printOperand(MI, OpNo, O); 322 return false; 323 } 324 case 'U': // Print 'u' for update form. 325 case 'X': // Print 'x' for indexed form. 326 { 327 // FIXME: Currently for PowerPC memory operands are always loaded 328 // into a register, so we never get an update or indexed form. 329 // This is bad even for offset forms, since even if we know we 330 // have a value in -16(r1), we will generate a load into r<n> 331 // and then load from 0(r<n>). Until that issue is fixed, 332 // tolerate 'U' and 'X' but don't output anything. 333 assert(MI->getOperand(OpNo).isReg()); 334 return false; 335 } 336 } 337 } 338 339 assert(MI->getOperand(OpNo).isReg()); 340 O << "0("; 341 printOperand(MI, OpNo, O); 342 O << ")"; 343 return false; 344 } 345 346 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 347 /// exists for it. If not, create one. Then return a symbol that references 348 /// the TOC entry. 349 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym) { 350 MCSymbol *&TOCEntry = TOC[Sym]; 351 if (!TOCEntry) 352 TOCEntry = createTempSymbol("C"); 353 return TOCEntry; 354 } 355 356 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 357 emitStackMaps(SM); 358 } 359 360 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 361 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 362 363 SM.recordStackMap(MI); 364 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 365 366 // Scan ahead to trim the shadow. 367 const MachineBasicBlock &MBB = *MI.getParent(); 368 MachineBasicBlock::const_iterator MII(MI); 369 ++MII; 370 while (NumNOPBytes > 0) { 371 if (MII == MBB.end() || MII->isCall() || 372 MII->getOpcode() == PPC::DBG_VALUE || 373 MII->getOpcode() == TargetOpcode::PATCHPOINT || 374 MII->getOpcode() == TargetOpcode::STACKMAP) 375 break; 376 ++MII; 377 NumNOPBytes -= 4; 378 } 379 380 // Emit nops. 381 for (unsigned i = 0; i < NumNOPBytes; i += 4) 382 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 383 } 384 385 // Lower a patchpoint of the form: 386 // [<def>], <id>, <numBytes>, <target>, <numArgs> 387 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 388 SM.recordPatchPoint(MI); 389 PatchPointOpers Opers(&MI); 390 391 unsigned EncodedBytes = 0; 392 const MachineOperand &CalleeMO = Opers.getCallTarget(); 393 394 if (CalleeMO.isImm()) { 395 int64_t CallTarget = CalleeMO.getImm(); 396 if (CallTarget) { 397 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 398 "High 16 bits of call target should be zero."); 399 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 400 EncodedBytes = 0; 401 // Materialize the jump address: 402 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 403 .addReg(ScratchReg) 404 .addImm((CallTarget >> 32) & 0xFFFF)); 405 ++EncodedBytes; 406 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 407 .addReg(ScratchReg) 408 .addReg(ScratchReg) 409 .addImm(32).addImm(16)); 410 ++EncodedBytes; 411 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 412 .addReg(ScratchReg) 413 .addReg(ScratchReg) 414 .addImm((CallTarget >> 16) & 0xFFFF)); 415 ++EncodedBytes; 416 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 417 .addReg(ScratchReg) 418 .addReg(ScratchReg) 419 .addImm(CallTarget & 0xFFFF)); 420 421 // Save the current TOC pointer before the remote call. 422 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 423 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 424 .addReg(PPC::X2) 425 .addImm(TOCSaveOffset) 426 .addReg(PPC::X1)); 427 ++EncodedBytes; 428 429 // If we're on ELFv1, then we need to load the actual function pointer 430 // from the function descriptor. 431 if (!Subtarget->isELFv2ABI()) { 432 // Load the new TOC pointer and the function address, but not r11 433 // (needing this is rare, and loading it here would prevent passing it 434 // via a 'nest' parameter. 435 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 436 .addReg(PPC::X2) 437 .addImm(8) 438 .addReg(ScratchReg)); 439 ++EncodedBytes; 440 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 441 .addReg(ScratchReg) 442 .addImm(0) 443 .addReg(ScratchReg)); 444 ++EncodedBytes; 445 } 446 447 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 448 .addReg(ScratchReg)); 449 ++EncodedBytes; 450 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 451 ++EncodedBytes; 452 453 // Restore the TOC pointer after the call. 454 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 455 .addReg(PPC::X2) 456 .addImm(TOCSaveOffset) 457 .addReg(PPC::X1)); 458 ++EncodedBytes; 459 } 460 } else if (CalleeMO.isGlobal()) { 461 const GlobalValue *GValue = CalleeMO.getGlobal(); 462 MCSymbol *MOSymbol = getSymbol(GValue); 463 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 464 465 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 466 .addExpr(SymVar)); 467 EncodedBytes += 2; 468 } 469 470 // Each instruction is 4 bytes. 471 EncodedBytes *= 4; 472 473 // Emit padding. 474 unsigned NumBytes = Opers.getNumPatchBytes(); 475 assert(NumBytes >= EncodedBytes && 476 "Patchpoint can't request size less than the length of a call."); 477 assert((NumBytes - EncodedBytes) % 4 == 0 && 478 "Invalid number of NOP bytes requested!"); 479 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 480 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 481 } 482 483 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 484 /// call to __tls_get_addr to the current output stream. 485 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 486 MCSymbolRefExpr::VariantKind VK) { 487 StringRef Name = "__tls_get_addr"; 488 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 489 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 490 const Module *M = MF->getFunction().getParent(); 491 492 assert(MI->getOperand(0).isReg() && 493 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 494 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 495 "GETtls[ld]ADDR[32] must define GPR3"); 496 assert(MI->getOperand(1).isReg() && 497 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 498 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 499 "GETtls[ld]ADDR[32] must read GPR3"); 500 501 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 502 isPositionIndependent()) 503 Kind = MCSymbolRefExpr::VK_PLT; 504 const MCExpr *TlsRef = 505 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 506 507 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 508 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 509 M->getPICLevel() == PICLevel::BigPIC) 510 TlsRef = MCBinaryExpr::createAdd( 511 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 512 const MachineOperand &MO = MI->getOperand(2); 513 const GlobalValue *GValue = MO.getGlobal(); 514 MCSymbol *MOSymbol = getSymbol(GValue); 515 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 516 EmitToStreamer(*OutStreamer, 517 MCInstBuilder(Subtarget->isPPC64() ? 518 PPC::BL8_NOP_TLS : PPC::BL_TLS) 519 .addExpr(TlsRef) 520 .addExpr(SymVar)); 521 } 522 523 /// Map a machine operand for a TOC pseudo-machine instruction to its 524 /// corresponding MCSymbol. 525 MCSymbol *PPCAsmPrinter::getMCSymbolForTOCPseudoMO(const MachineOperand &MO) { 526 switch (MO.getType()) { 527 case MachineOperand::MO_GlobalAddress: 528 return getSymbol(MO.getGlobal()); 529 case MachineOperand::MO_ConstantPoolIndex: 530 return GetCPISymbol(MO.getIndex()); 531 case MachineOperand::MO_JumpTableIndex: 532 return GetJTISymbol(MO.getIndex()); 533 case MachineOperand::MO_BlockAddress: 534 return GetBlockAddressSymbol(MO.getBlockAddress()); 535 default: 536 llvm_unreachable("Unexpected operand type to get symbol."); 537 } 538 } 539 540 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 541 /// the current output stream. 542 /// 543 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 544 MCInst TmpInst; 545 const bool IsDarwin = TM.getTargetTriple().isOSDarwin(); 546 const bool IsPPC64 = Subtarget->isPPC64(); 547 const bool IsAIX = Subtarget->isAIXABI(); 548 const Module *M = MF->getFunction().getParent(); 549 PICLevel::Level PL = M->getPICLevel(); 550 551 #ifndef NDEBUG 552 // Validate that SPE and FPU are mutually exclusive in codegen 553 if (!MI->isInlineAsm()) { 554 for (const MachineOperand &MO: MI->operands()) { 555 if (MO.isReg()) { 556 Register Reg = MO.getReg(); 557 if (Subtarget->hasSPE()) { 558 if (PPC::F4RCRegClass.contains(Reg) || 559 PPC::F8RCRegClass.contains(Reg) || 560 PPC::QBRCRegClass.contains(Reg) || 561 PPC::QFRCRegClass.contains(Reg) || 562 PPC::QSRCRegClass.contains(Reg) || 563 PPC::VFRCRegClass.contains(Reg) || 564 PPC::VRRCRegClass.contains(Reg) || 565 PPC::VSFRCRegClass.contains(Reg) || 566 PPC::VSSRCRegClass.contains(Reg) 567 ) 568 llvm_unreachable("SPE targets cannot have FPRegs!"); 569 } else { 570 if (PPC::SPERCRegClass.contains(Reg)) 571 llvm_unreachable("SPE register found in FPU-targeted code!"); 572 } 573 } 574 } 575 } 576 #endif 577 // Lower multi-instruction pseudo operations. 578 switch (MI->getOpcode()) { 579 default: break; 580 case TargetOpcode::DBG_VALUE: 581 llvm_unreachable("Should be handled target independently"); 582 case TargetOpcode::STACKMAP: 583 return LowerSTACKMAP(SM, *MI); 584 case TargetOpcode::PATCHPOINT: 585 return LowerPATCHPOINT(SM, *MI); 586 587 case PPC::MoveGOTtoLR: { 588 // Transform %lr = MoveGOTtoLR 589 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 590 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 591 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 592 // blrl 593 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 594 MCSymbol *GOTSymbol = 595 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 596 const MCExpr *OffsExpr = 597 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 598 MCSymbolRefExpr::VK_PPC_LOCAL, 599 OutContext), 600 MCConstantExpr::create(4, OutContext), 601 OutContext); 602 603 // Emit the 'bl'. 604 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 605 return; 606 } 607 case PPC::MovePCtoLR: 608 case PPC::MovePCtoLR8: { 609 // Transform %lr = MovePCtoLR 610 // Into this, where the label is the PIC base: 611 // bl L1$pb 612 // L1$pb: 613 MCSymbol *PICBase = MF->getPICBaseSymbol(); 614 615 // Emit the 'bl'. 616 EmitToStreamer(*OutStreamer, 617 MCInstBuilder(PPC::BL) 618 // FIXME: We would like an efficient form for this, so we 619 // don't have to do a lot of extra uniquing. 620 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 621 622 // Emit the label. 623 OutStreamer->EmitLabel(PICBase); 624 return; 625 } 626 case PPC::UpdateGBR: { 627 // Transform %rd = UpdateGBR(%rt, %ri) 628 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 629 // add %rd, %rt, %ri 630 // or into (if secure plt mode is on): 631 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 632 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 633 // Get the offset from the GOT Base Register to the GOT 634 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 635 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 636 unsigned PICR = TmpInst.getOperand(0).getReg(); 637 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 638 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 639 : ".LTOC"); 640 const MCExpr *PB = 641 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 642 643 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 644 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 645 646 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 647 EmitToStreamer( 648 *OutStreamer, 649 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 650 651 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 652 EmitToStreamer( 653 *OutStreamer, 654 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 655 return; 656 } else { 657 MCSymbol *PICOffset = 658 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 659 TmpInst.setOpcode(PPC::LWZ); 660 const MCExpr *Exp = 661 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 662 const MCExpr *PB = 663 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 664 MCSymbolRefExpr::VK_None, 665 OutContext); 666 const MCOperand TR = TmpInst.getOperand(1); 667 const MCOperand PICR = TmpInst.getOperand(0); 668 669 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 670 TmpInst.getOperand(1) = 671 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 672 TmpInst.getOperand(0) = TR; 673 TmpInst.getOperand(2) = PICR; 674 EmitToStreamer(*OutStreamer, TmpInst); 675 676 TmpInst.setOpcode(PPC::ADD4); 677 TmpInst.getOperand(0) = PICR; 678 TmpInst.getOperand(1) = TR; 679 TmpInst.getOperand(2) = PICR; 680 EmitToStreamer(*OutStreamer, TmpInst); 681 return; 682 } 683 } 684 case PPC::LWZtoc: { 685 assert(!IsDarwin && "TOC is an ELF/XCOFF construct."); 686 687 // Transform %rN = LWZtoc @op1, %r2 688 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 689 690 // Change the opcode to LWZ. 691 TmpInst.setOpcode(PPC::LWZ); 692 693 const MachineOperand &MO = MI->getOperand(1); 694 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 695 "Invalid operand for LWZtoc."); 696 697 // Map the operand to its corresponding MCSymbol. 698 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO); 699 700 // Create a reference to the GOT entry for the symbol. The GOT entry will be 701 // synthesized later. 702 if (PL == PICLevel::SmallPIC && !IsAIX) { 703 const MCExpr *Exp = 704 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 705 OutContext); 706 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 707 EmitToStreamer(*OutStreamer, TmpInst); 708 return; 709 } 710 711 // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the 712 // storage allocated in the TOC which contains the address of 713 // 'MOSymbol'. Said TOC entry will be synthesized later. 714 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 715 const MCExpr *Exp = 716 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 717 718 // AIX uses the label directly as the lwz displacement operand for 719 // references into the toc section. The displacement value will be generated 720 // relative to the toc-base. 721 if (IsAIX) { 722 assert( 723 TM.getCodeModel() == CodeModel::Small && 724 "This pseudo should only be selected for 32-bit small code model."); 725 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 726 EmitToStreamer(*OutStreamer, TmpInst); 727 return; 728 } 729 730 // Create an explicit subtract expression between the local symbol and 731 // '.LTOC' to manifest the toc-relative offset. 732 const MCExpr *PB = MCSymbolRefExpr::create( 733 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 734 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 735 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 736 EmitToStreamer(*OutStreamer, TmpInst); 737 return; 738 } 739 case PPC::LDtocJTI: 740 case PPC::LDtocCPT: 741 case PPC::LDtocBA: 742 case PPC::LDtoc: { 743 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 744 745 // Transform %x3 = LDtoc @min1, %x2 746 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 747 748 // Change the opcode to LD. 749 TmpInst.setOpcode(PPC::LD); 750 751 const MachineOperand &MO = MI->getOperand(1); 752 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 753 "Invalid operand!"); 754 755 // Map the machine operand to its corresponding MCSymbol, then map the 756 // global address operand to be a reference to the TOC entry we will 757 // synthesize later. 758 MCSymbol *TOCEntry = 759 lookUpOrCreateTOCEntry(getMCSymbolForTOCPseudoMO(MO)); 760 761 const MCSymbolRefExpr::VariantKind VK = 762 IsAIX ? MCSymbolRefExpr::VK_None : MCSymbolRefExpr::VK_PPC_TOC; 763 const MCExpr *Exp = 764 MCSymbolRefExpr::create(TOCEntry, VK, OutContext); 765 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 766 EmitToStreamer(*OutStreamer, TmpInst); 767 return; 768 } 769 case PPC::ADDIStocHA: { 770 assert((IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large) && 771 "This pseudo should only be selected for 32-bit large code model on" 772 " AIX."); 773 774 // Transform %rd = ADDIStocHA %rA, @sym(%r2) 775 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 776 777 // Change the opcode to ADDIS. 778 TmpInst.setOpcode(PPC::ADDIS); 779 780 const MachineOperand &MO = MI->getOperand(2); 781 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 782 "Invalid operand for ADDIStocHA."); 783 784 // Map the machine operand to its corresponding MCSymbol. 785 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 786 787 // Always use TOC on AIX. Map the global address operand to be a reference 788 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 789 // reference the storage allocated in the TOC which contains the address of 790 // 'MOSymbol'. 791 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 792 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 793 MCSymbolRefExpr::VK_PPC_U, 794 OutContext); 795 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 796 EmitToStreamer(*OutStreamer, TmpInst); 797 return; 798 } 799 case PPC::LWZtocL: { 800 assert(IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large && 801 "This pseudo should only be selected for 32-bit large code model on" 802 " AIX."); 803 804 // Transform %rd = LWZtocL @sym, %rs. 805 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 806 807 // Change the opcode to lwz. 808 TmpInst.setOpcode(PPC::LWZ); 809 810 const MachineOperand &MO = MI->getOperand(1); 811 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 812 "Invalid operand for LWZtocL."); 813 814 // Map the machine operand to its corresponding MCSymbol. 815 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 816 817 // Always use TOC on AIX. Map the global address operand to be a reference 818 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 819 // reference the storage allocated in the TOC which contains the address of 820 // 'MOSymbol'. 821 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 822 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 823 MCSymbolRefExpr::VK_PPC_L, 824 OutContext); 825 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 826 EmitToStreamer(*OutStreamer, TmpInst); 827 return; 828 } 829 case PPC::ADDIStocHA8: { 830 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 831 832 // Transform %xd = ADDIStocHA8 %x2, @sym 833 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 834 835 // Change the opcode to ADDIS8. If the global address is the address of 836 // an external symbol, is a jump table address, is a block address, or is a 837 // constant pool index with large code model enabled, then generate a TOC 838 // entry and reference that. Otherwise, reference the symbol directly. 839 TmpInst.setOpcode(PPC::ADDIS8); 840 841 const MachineOperand &MO = MI->getOperand(2); 842 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 843 "Invalid operand for ADDIStocHA8!"); 844 845 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 846 847 const bool GlobalToc = 848 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal()); 849 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 850 (MO.isCPI() && TM.getCodeModel() == CodeModel::Large)) 851 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 852 853 const MCSymbolRefExpr::VariantKind VK = 854 IsAIX ? MCSymbolRefExpr::VK_PPC_U : MCSymbolRefExpr::VK_PPC_TOC_HA; 855 856 const MCExpr *Exp = 857 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 858 859 if (!MO.isJTI() && MO.getOffset()) 860 Exp = MCBinaryExpr::createAdd(Exp, 861 MCConstantExpr::create(MO.getOffset(), 862 OutContext), 863 OutContext); 864 865 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 866 EmitToStreamer(*OutStreamer, TmpInst); 867 return; 868 } 869 case PPC::LDtocL: { 870 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 871 872 // Transform %xd = LDtocL @sym, %xs 873 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 874 875 // Change the opcode to LD. If the global address is the address of 876 // an external symbol, is a jump table address, is a block address, or is 877 // a constant pool index with large code model enabled, then generate a 878 // TOC entry and reference that. Otherwise, reference the symbol directly. 879 TmpInst.setOpcode(PPC::LD); 880 881 const MachineOperand &MO = MI->getOperand(1); 882 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 883 MO.isBlockAddress()) && 884 "Invalid operand for LDtocL!"); 885 886 LLVM_DEBUG(assert( 887 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 888 "LDtocL used on symbol that could be accessed directly is " 889 "invalid. Must match ADDIStocHA8.")); 890 891 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 892 893 if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large) 894 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 895 896 const MCSymbolRefExpr::VariantKind VK = 897 IsAIX ? MCSymbolRefExpr::VK_PPC_L : MCSymbolRefExpr::VK_PPC_TOC_LO; 898 const MCExpr *Exp = 899 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 900 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 901 EmitToStreamer(*OutStreamer, TmpInst); 902 return; 903 } 904 case PPC::ADDItocL: { 905 // Transform %xd = ADDItocL %xs, @sym 906 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 907 908 // Change the opcode to ADDI8. If the global address is external, then 909 // generate a TOC entry and reference that. Otherwise, reference the 910 // symbol directly. 911 TmpInst.setOpcode(PPC::ADDI8); 912 913 const MachineOperand &MO = MI->getOperand(2); 914 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL."); 915 916 LLVM_DEBUG(assert( 917 !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 918 "Interposable definitions must use indirect access.")); 919 920 const MCExpr *Exp = 921 MCSymbolRefExpr::create(getMCSymbolForTOCPseudoMO(MO), 922 MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext); 923 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 924 EmitToStreamer(*OutStreamer, TmpInst); 925 return; 926 } 927 case PPC::ADDISgotTprelHA: { 928 // Transform: %xd = ADDISgotTprelHA %x2, @sym 929 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 930 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 931 const MachineOperand &MO = MI->getOperand(2); 932 const GlobalValue *GValue = MO.getGlobal(); 933 MCSymbol *MOSymbol = getSymbol(GValue); 934 const MCExpr *SymGotTprel = 935 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 936 OutContext); 937 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 938 .addReg(MI->getOperand(0).getReg()) 939 .addReg(MI->getOperand(1).getReg()) 940 .addExpr(SymGotTprel)); 941 return; 942 } 943 case PPC::LDgotTprelL: 944 case PPC::LDgotTprelL32: { 945 // Transform %xd = LDgotTprelL @sym, %xs 946 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 947 948 // Change the opcode to LD. 949 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ); 950 const MachineOperand &MO = MI->getOperand(1); 951 const GlobalValue *GValue = MO.getGlobal(); 952 MCSymbol *MOSymbol = getSymbol(GValue); 953 const MCExpr *Exp = MCSymbolRefExpr::create( 954 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 955 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 956 OutContext); 957 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 958 EmitToStreamer(*OutStreamer, TmpInst); 959 return; 960 } 961 962 case PPC::PPC32PICGOT: { 963 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 964 MCSymbol *GOTRef = OutContext.createTempSymbol(); 965 MCSymbol *NextInstr = OutContext.createTempSymbol(); 966 967 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 968 // FIXME: We would like an efficient form for this, so we don't have to do 969 // a lot of extra uniquing. 970 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 971 const MCExpr *OffsExpr = 972 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 973 MCSymbolRefExpr::create(GOTRef, OutContext), 974 OutContext); 975 OutStreamer->EmitLabel(GOTRef); 976 OutStreamer->EmitValue(OffsExpr, 4); 977 OutStreamer->EmitLabel(NextInstr); 978 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 979 .addReg(MI->getOperand(0).getReg())); 980 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 981 .addReg(MI->getOperand(1).getReg()) 982 .addImm(0) 983 .addReg(MI->getOperand(0).getReg())); 984 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 985 .addReg(MI->getOperand(0).getReg()) 986 .addReg(MI->getOperand(1).getReg()) 987 .addReg(MI->getOperand(0).getReg())); 988 return; 989 } 990 case PPC::PPC32GOT: { 991 MCSymbol *GOTSymbol = 992 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 993 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 994 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 995 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 996 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 997 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 998 .addReg(MI->getOperand(0).getReg()) 999 .addExpr(SymGotTlsL)); 1000 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1001 .addReg(MI->getOperand(0).getReg()) 1002 .addReg(MI->getOperand(0).getReg()) 1003 .addExpr(SymGotTlsHA)); 1004 return; 1005 } 1006 case PPC::ADDIStlsgdHA: { 1007 // Transform: %xd = ADDIStlsgdHA %x2, @sym 1008 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 1009 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1010 const MachineOperand &MO = MI->getOperand(2); 1011 const GlobalValue *GValue = MO.getGlobal(); 1012 MCSymbol *MOSymbol = getSymbol(GValue); 1013 const MCExpr *SymGotTlsGD = 1014 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 1015 OutContext); 1016 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1017 .addReg(MI->getOperand(0).getReg()) 1018 .addReg(MI->getOperand(1).getReg()) 1019 .addExpr(SymGotTlsGD)); 1020 return; 1021 } 1022 case PPC::ADDItlsgdL: 1023 // Transform: %xd = ADDItlsgdL %xs, @sym 1024 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 1025 case PPC::ADDItlsgdL32: { 1026 // Transform: %rd = ADDItlsgdL32 %rs, @sym 1027 // Into: %rd = ADDI %rs, sym@got@tlsgd 1028 const MachineOperand &MO = MI->getOperand(2); 1029 const GlobalValue *GValue = MO.getGlobal(); 1030 MCSymbol *MOSymbol = getSymbol(GValue); 1031 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 1032 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 1033 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 1034 OutContext); 1035 EmitToStreamer(*OutStreamer, 1036 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1037 .addReg(MI->getOperand(0).getReg()) 1038 .addReg(MI->getOperand(1).getReg()) 1039 .addExpr(SymGotTlsGD)); 1040 return; 1041 } 1042 case PPC::GETtlsADDR: 1043 // Transform: %x3 = GETtlsADDR %x3, @sym 1044 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 1045 case PPC::GETtlsADDR32: { 1046 // Transform: %r3 = GETtlsADDR32 %r3, @sym 1047 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 1048 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 1049 return; 1050 } 1051 case PPC::ADDIStlsldHA: { 1052 // Transform: %xd = ADDIStlsldHA %x2, @sym 1053 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 1054 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1055 const MachineOperand &MO = MI->getOperand(2); 1056 const GlobalValue *GValue = MO.getGlobal(); 1057 MCSymbol *MOSymbol = getSymbol(GValue); 1058 const MCExpr *SymGotTlsLD = 1059 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 1060 OutContext); 1061 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1062 .addReg(MI->getOperand(0).getReg()) 1063 .addReg(MI->getOperand(1).getReg()) 1064 .addExpr(SymGotTlsLD)); 1065 return; 1066 } 1067 case PPC::ADDItlsldL: 1068 // Transform: %xd = ADDItlsldL %xs, @sym 1069 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 1070 case PPC::ADDItlsldL32: { 1071 // Transform: %rd = ADDItlsldL32 %rs, @sym 1072 // Into: %rd = ADDI %rs, sym@got@tlsld 1073 const MachineOperand &MO = MI->getOperand(2); 1074 const GlobalValue *GValue = MO.getGlobal(); 1075 MCSymbol *MOSymbol = getSymbol(GValue); 1076 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1077 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1078 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1079 OutContext); 1080 EmitToStreamer(*OutStreamer, 1081 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1082 .addReg(MI->getOperand(0).getReg()) 1083 .addReg(MI->getOperand(1).getReg()) 1084 .addExpr(SymGotTlsLD)); 1085 return; 1086 } 1087 case PPC::GETtlsldADDR: 1088 // Transform: %x3 = GETtlsldADDR %x3, @sym 1089 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1090 case PPC::GETtlsldADDR32: { 1091 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1092 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1093 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1094 return; 1095 } 1096 case PPC::ADDISdtprelHA: 1097 // Transform: %xd = ADDISdtprelHA %xs, @sym 1098 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1099 case PPC::ADDISdtprelHA32: { 1100 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1101 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1102 const MachineOperand &MO = MI->getOperand(2); 1103 const GlobalValue *GValue = MO.getGlobal(); 1104 MCSymbol *MOSymbol = getSymbol(GValue); 1105 const MCExpr *SymDtprel = 1106 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1107 OutContext); 1108 EmitToStreamer( 1109 *OutStreamer, 1110 MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS) 1111 .addReg(MI->getOperand(0).getReg()) 1112 .addReg(MI->getOperand(1).getReg()) 1113 .addExpr(SymDtprel)); 1114 return; 1115 } 1116 case PPC::ADDIdtprelL: 1117 // Transform: %xd = ADDIdtprelL %xs, @sym 1118 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1119 case PPC::ADDIdtprelL32: { 1120 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1121 // Into: %rd = ADDI %rs, sym@dtprel@l 1122 const MachineOperand &MO = MI->getOperand(2); 1123 const GlobalValue *GValue = MO.getGlobal(); 1124 MCSymbol *MOSymbol = getSymbol(GValue); 1125 const MCExpr *SymDtprel = 1126 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1127 OutContext); 1128 EmitToStreamer(*OutStreamer, 1129 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1130 .addReg(MI->getOperand(0).getReg()) 1131 .addReg(MI->getOperand(1).getReg()) 1132 .addExpr(SymDtprel)); 1133 return; 1134 } 1135 case PPC::MFOCRF: 1136 case PPC::MFOCRF8: 1137 if (!Subtarget->hasMFOCRF()) { 1138 // Transform: %r3 = MFOCRF %cr7 1139 // Into: %r3 = MFCR ;; cr7 1140 unsigned NewOpcode = 1141 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1142 OutStreamer->AddComment(PPCInstPrinter:: 1143 getRegisterName(MI->getOperand(1).getReg())); 1144 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1145 .addReg(MI->getOperand(0).getReg())); 1146 return; 1147 } 1148 break; 1149 case PPC::MTOCRF: 1150 case PPC::MTOCRF8: 1151 if (!Subtarget->hasMFOCRF()) { 1152 // Transform: %cr7 = MTOCRF %r3 1153 // Into: MTCRF mask, %r3 ;; cr7 1154 unsigned NewOpcode = 1155 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1156 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1157 ->getEncodingValue(MI->getOperand(0).getReg()); 1158 OutStreamer->AddComment(PPCInstPrinter:: 1159 getRegisterName(MI->getOperand(0).getReg())); 1160 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1161 .addImm(Mask) 1162 .addReg(MI->getOperand(1).getReg())); 1163 return; 1164 } 1165 break; 1166 case PPC::LD: 1167 case PPC::STD: 1168 case PPC::LWA_32: 1169 case PPC::LWA: { 1170 // Verify alignment is legal, so we don't create relocations 1171 // that can't be supported. 1172 // FIXME: This test is currently disabled for Darwin. The test 1173 // suite shows a handful of test cases that fail this check for 1174 // Darwin. Those need to be investigated before this sanity test 1175 // can be enabled for those subtargets. 1176 if (!IsDarwin) { 1177 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1178 const MachineOperand &MO = MI->getOperand(OpNum); 1179 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1180 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1181 } 1182 // Now process the instruction normally. 1183 break; 1184 } 1185 } 1186 1187 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 1188 EmitToStreamer(*OutStreamer, TmpInst); 1189 } 1190 1191 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1192 if (!Subtarget->isPPC64()) 1193 return PPCAsmPrinter::EmitInstruction(MI); 1194 1195 switch (MI->getOpcode()) { 1196 default: 1197 return PPCAsmPrinter::EmitInstruction(MI); 1198 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1199 // .begin: 1200 // b .end # lis 0, FuncId[16..32] 1201 // nop # li 0, FuncId[0..15] 1202 // std 0, -8(1) 1203 // mflr 0 1204 // bl __xray_FunctionEntry 1205 // mtlr 0 1206 // .end: 1207 // 1208 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1209 // of instructions change. 1210 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1211 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1212 OutStreamer->EmitLabel(BeginOfSled); 1213 EmitToStreamer(*OutStreamer, 1214 MCInstBuilder(PPC::B).addExpr( 1215 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1216 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1217 EmitToStreamer( 1218 *OutStreamer, 1219 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1220 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1221 EmitToStreamer(*OutStreamer, 1222 MCInstBuilder(PPC::BL8_NOP) 1223 .addExpr(MCSymbolRefExpr::create( 1224 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1225 OutContext))); 1226 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1227 OutStreamer->EmitLabel(EndOfSled); 1228 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1229 break; 1230 } 1231 case TargetOpcode::PATCHABLE_RET: { 1232 unsigned RetOpcode = MI->getOperand(0).getImm(); 1233 MCInst RetInst; 1234 RetInst.setOpcode(RetOpcode); 1235 for (const auto &MO : 1236 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1237 MCOperand MCOp; 1238 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1239 RetInst.addOperand(MCOp); 1240 } 1241 1242 bool IsConditional; 1243 if (RetOpcode == PPC::BCCLR) { 1244 IsConditional = true; 1245 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1246 RetOpcode == PPC::TCRETURNai8) { 1247 break; 1248 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1249 IsConditional = false; 1250 } else { 1251 EmitToStreamer(*OutStreamer, RetInst); 1252 break; 1253 } 1254 1255 MCSymbol *FallthroughLabel; 1256 if (IsConditional) { 1257 // Before: 1258 // bgtlr cr0 1259 // 1260 // After: 1261 // ble cr0, .end 1262 // .p2align 3 1263 // .begin: 1264 // blr # lis 0, FuncId[16..32] 1265 // nop # li 0, FuncId[0..15] 1266 // std 0, -8(1) 1267 // mflr 0 1268 // bl __xray_FunctionExit 1269 // mtlr 0 1270 // blr 1271 // .end: 1272 // 1273 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1274 // of instructions change. 1275 FallthroughLabel = OutContext.createTempSymbol(); 1276 EmitToStreamer( 1277 *OutStreamer, 1278 MCInstBuilder(PPC::BCC) 1279 .addImm(PPC::InvertPredicate( 1280 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1281 .addReg(MI->getOperand(2).getReg()) 1282 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1283 RetInst = MCInst(); 1284 RetInst.setOpcode(PPC::BLR8); 1285 } 1286 // .p2align 3 1287 // .begin: 1288 // b(lr)? # lis 0, FuncId[16..32] 1289 // nop # li 0, FuncId[0..15] 1290 // std 0, -8(1) 1291 // mflr 0 1292 // bl __xray_FunctionExit 1293 // mtlr 0 1294 // b(lr)? 1295 // 1296 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1297 // of instructions change. 1298 OutStreamer->EmitCodeAlignment(8); 1299 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1300 OutStreamer->EmitLabel(BeginOfSled); 1301 EmitToStreamer(*OutStreamer, RetInst); 1302 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1303 EmitToStreamer( 1304 *OutStreamer, 1305 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1306 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1307 EmitToStreamer(*OutStreamer, 1308 MCInstBuilder(PPC::BL8_NOP) 1309 .addExpr(MCSymbolRefExpr::create( 1310 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1311 OutContext))); 1312 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1313 EmitToStreamer(*OutStreamer, RetInst); 1314 if (IsConditional) 1315 OutStreamer->EmitLabel(FallthroughLabel); 1316 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1317 break; 1318 } 1319 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1320 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1321 case TargetOpcode::PATCHABLE_TAIL_CALL: 1322 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1323 // normal function exit from a tail exit. 1324 llvm_unreachable("Tail call is handled in the normal case. See comments " 1325 "around this assert."); 1326 } 1327 } 1328 1329 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1330 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1331 PPCTargetStreamer *TS = 1332 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1333 1334 if (TS) 1335 TS->emitAbiVersion(2); 1336 } 1337 1338 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1339 !isPositionIndependent()) 1340 return AsmPrinter::EmitStartOfAsmFile(M); 1341 1342 if (M.getPICLevel() == PICLevel::SmallPIC) 1343 return AsmPrinter::EmitStartOfAsmFile(M); 1344 1345 OutStreamer->SwitchSection(OutContext.getELFSection( 1346 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1347 1348 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1349 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1350 1351 OutStreamer->EmitLabel(CurrentPos); 1352 1353 // The GOT pointer points to the middle of the GOT, in order to reference the 1354 // entire 64kB range. 0x8000 is the midpoint. 1355 const MCExpr *tocExpr = 1356 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1357 MCConstantExpr::create(0x8000, OutContext), 1358 OutContext); 1359 1360 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1361 1362 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1363 } 1364 1365 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1366 // linux/ppc32 - Normal entry label. 1367 if (!Subtarget->isPPC64() && 1368 (!isPositionIndependent() || 1369 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1370 return AsmPrinter::EmitFunctionEntryLabel(); 1371 1372 if (!Subtarget->isPPC64()) { 1373 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1374 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1375 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1376 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1377 OutStreamer->EmitLabel(RelocSymbol); 1378 1379 const MCExpr *OffsExpr = 1380 MCBinaryExpr::createSub( 1381 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1382 OutContext), 1383 MCSymbolRefExpr::create(PICBase, OutContext), 1384 OutContext); 1385 OutStreamer->EmitValue(OffsExpr, 4); 1386 OutStreamer->EmitLabel(CurrentFnSym); 1387 return; 1388 } else 1389 return AsmPrinter::EmitFunctionEntryLabel(); 1390 } 1391 1392 // ELFv2 ABI - Normal entry label. 1393 if (Subtarget->isELFv2ABI()) { 1394 // In the Large code model, we allow arbitrary displacements between 1395 // the text section and its associated TOC section. We place the 1396 // full 8-byte offset to the TOC in memory immediately preceding 1397 // the function global entry point. 1398 if (TM.getCodeModel() == CodeModel::Large 1399 && !MF->getRegInfo().use_empty(PPC::X2)) { 1400 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1401 1402 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1403 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1404 const MCExpr *TOCDeltaExpr = 1405 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1406 MCSymbolRefExpr::create(GlobalEPSymbol, 1407 OutContext), 1408 OutContext); 1409 1410 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1411 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1412 } 1413 return AsmPrinter::EmitFunctionEntryLabel(); 1414 } 1415 1416 // Emit an official procedure descriptor. 1417 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1418 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1419 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1420 OutStreamer->SwitchSection(Section); 1421 OutStreamer->EmitLabel(CurrentFnSym); 1422 OutStreamer->EmitValueToAlignment(8); 1423 MCSymbol *Symbol1 = CurrentFnSymForSize; 1424 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1425 // entry point. 1426 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1427 8 /*size*/); 1428 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1429 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1430 OutStreamer->EmitValue( 1431 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1432 8/*size*/); 1433 // Emit a null environment pointer. 1434 OutStreamer->EmitIntValue(0, 8 /* size */); 1435 OutStreamer->SwitchSection(Current.first, Current.second); 1436 } 1437 1438 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1439 const DataLayout &DL = getDataLayout(); 1440 1441 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1442 1443 PPCTargetStreamer &TS = 1444 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1445 1446 if (!TOC.empty()) { 1447 MCSectionELF *Section; 1448 1449 if (isPPC64) 1450 Section = OutStreamer->getContext().getELFSection( 1451 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1452 else 1453 Section = OutStreamer->getContext().getELFSection( 1454 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1455 OutStreamer->SwitchSection(Section); 1456 1457 for (const auto &TOCMapPair : TOC) { 1458 const MCSymbol *const TOCEntryTarget = TOCMapPair.first; 1459 MCSymbol *const TOCEntryLabel = TOCMapPair.second; 1460 1461 OutStreamer->EmitLabel(TOCEntryLabel); 1462 if (isPPC64) { 1463 TS.emitTCEntry(*TOCEntryTarget); 1464 } else { 1465 OutStreamer->EmitValueToAlignment(4); 1466 OutStreamer->EmitSymbolValue(TOCEntryTarget, 4); 1467 } 1468 } 1469 } 1470 1471 return AsmPrinter::doFinalization(M); 1472 } 1473 1474 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1475 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1476 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1477 // provide two entry points. The ABI guarantees that when calling the 1478 // local entry point, r2 is set up by the caller to contain the TOC base 1479 // for this function, and when calling the global entry point, r12 is set 1480 // up by the caller to hold the address of the global entry point. We 1481 // thus emit a prefix sequence along the following lines: 1482 // 1483 // func: 1484 // .Lfunc_gepNN: 1485 // # global entry point 1486 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1487 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1488 // .Lfunc_lepNN: 1489 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1490 // # local entry point, followed by function body 1491 // 1492 // For the Large code model, we create 1493 // 1494 // .Lfunc_tocNN: 1495 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1496 // func: 1497 // .Lfunc_gepNN: 1498 // # global entry point 1499 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1500 // add r2,r2,r12 1501 // .Lfunc_lepNN: 1502 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1503 // # local entry point, followed by function body 1504 // 1505 // This ensures we have r2 set up correctly while executing the function 1506 // body, no matter which entry point is called. 1507 if (Subtarget->isELFv2ABI() 1508 // Only do all that if the function uses r2 in the first place. 1509 && !MF->getRegInfo().use_empty(PPC::X2)) { 1510 // Note: The logic here must be synchronized with the code in the 1511 // branch-selection pass which sets the offset of the first block in the 1512 // function. This matters because it affects the alignment. 1513 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1514 1515 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1516 OutStreamer->EmitLabel(GlobalEntryLabel); 1517 const MCSymbolRefExpr *GlobalEntryLabelExp = 1518 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1519 1520 if (TM.getCodeModel() != CodeModel::Large) { 1521 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1522 const MCExpr *TOCDeltaExpr = 1523 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1524 GlobalEntryLabelExp, OutContext); 1525 1526 const MCExpr *TOCDeltaHi = 1527 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1528 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1529 .addReg(PPC::X2) 1530 .addReg(PPC::X12) 1531 .addExpr(TOCDeltaHi)); 1532 1533 const MCExpr *TOCDeltaLo = 1534 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1535 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1536 .addReg(PPC::X2) 1537 .addReg(PPC::X2) 1538 .addExpr(TOCDeltaLo)); 1539 } else { 1540 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1541 const MCExpr *TOCOffsetDeltaExpr = 1542 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1543 GlobalEntryLabelExp, OutContext); 1544 1545 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1546 .addReg(PPC::X2) 1547 .addExpr(TOCOffsetDeltaExpr) 1548 .addReg(PPC::X12)); 1549 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1550 .addReg(PPC::X2) 1551 .addReg(PPC::X2) 1552 .addReg(PPC::X12)); 1553 } 1554 1555 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1556 OutStreamer->EmitLabel(LocalEntryLabel); 1557 const MCSymbolRefExpr *LocalEntryLabelExp = 1558 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1559 const MCExpr *LocalOffsetExp = 1560 MCBinaryExpr::createSub(LocalEntryLabelExp, 1561 GlobalEntryLabelExp, OutContext); 1562 1563 PPCTargetStreamer *TS = 1564 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1565 1566 if (TS) 1567 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1568 } 1569 } 1570 1571 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1572 /// directive. 1573 /// 1574 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1575 // Only the 64-bit target requires a traceback table. For now, 1576 // we only emit the word of zeroes that GDB requires to find 1577 // the end of the function, and zeroes for the eight-byte 1578 // mandatory fields. 1579 // FIXME: We should fill in the eight-byte mandatory fields as described in 1580 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1581 // currently make use of these fields). 1582 if (Subtarget->isPPC64()) { 1583 OutStreamer->EmitIntValue(0, 4/*size*/); 1584 OutStreamer->EmitIntValue(0, 8/*size*/); 1585 } 1586 } 1587 1588 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1589 static const char *const CPUDirectives[] = { 1590 "", 1591 "ppc", 1592 "ppc440", 1593 "ppc601", 1594 "ppc602", 1595 "ppc603", 1596 "ppc7400", 1597 "ppc750", 1598 "ppc970", 1599 "ppcA2", 1600 "ppce500", 1601 "ppce500mc", 1602 "ppce5500", 1603 "power3", 1604 "power4", 1605 "power5", 1606 "power5x", 1607 "power6", 1608 "power6x", 1609 "power7", 1610 // FIXME: why is power8 missing here? 1611 "ppc64", 1612 "ppc64le", 1613 "power9", 1614 "future" 1615 }; 1616 1617 // Get the numerically largest directive. 1618 // FIXME: How should we merge darwin directives? 1619 unsigned Directive = PPC::DIR_NONE; 1620 for (const Function &F : M) { 1621 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1622 unsigned FDir = STI.getCPUDirective(); 1623 Directive = Directive > FDir ? FDir : STI.getCPUDirective(); 1624 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1625 Directive = PPC::DIR_970; 1626 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1627 Directive = PPC::DIR_7400; 1628 if (STI.isPPC64() && Directive < PPC::DIR_64) 1629 Directive = PPC::DIR_64; 1630 } 1631 1632 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1633 1634 assert(Directive < array_lengthof(CPUDirectives) && 1635 "CPUDirectives[] might not be up-to-date!"); 1636 PPCTargetStreamer &TStreamer = 1637 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1638 TStreamer.emitMachine(CPUDirectives[Directive]); 1639 1640 // Prime text sections so they are adjacent. This reduces the likelihood a 1641 // large data or debug section causes a branch to exceed 16M limit. 1642 const TargetLoweringObjectFileMachO &TLOFMacho = 1643 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1644 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1645 if (TM.getRelocationModel() == Reloc::PIC_) { 1646 OutStreamer->SwitchSection( 1647 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1648 MachO::S_SYMBOL_STUBS | 1649 MachO::S_ATTR_PURE_INSTRUCTIONS, 1650 32, SectionKind::getText())); 1651 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1652 OutStreamer->SwitchSection( 1653 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1654 MachO::S_SYMBOL_STUBS | 1655 MachO::S_ATTR_PURE_INSTRUCTIONS, 1656 16, SectionKind::getText())); 1657 } 1658 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1659 } 1660 1661 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1662 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1663 1664 // Darwin/PPC always uses mach-o. 1665 const TargetLoweringObjectFileMachO &TLOFMacho = 1666 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1667 if (MMI) { 1668 MachineModuleInfoMachO &MMIMacho = 1669 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1670 1671 if (MAI->doesSupportExceptionHandling()) { 1672 // Add the (possibly multiple) personalities to the set of global values. 1673 // Only referenced functions get into the Personalities list. 1674 for (const Function *Personality : MMI->getPersonalities()) { 1675 if (Personality) { 1676 MCSymbol *NLPSym = 1677 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1678 MachineModuleInfoImpl::StubValueTy &StubSym = 1679 MMIMacho.getGVStubEntry(NLPSym); 1680 StubSym = 1681 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1682 } 1683 } 1684 } 1685 1686 // Output stubs for dynamically-linked functions. 1687 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1688 1689 // Output macho stubs for external and common global variables. 1690 if (!Stubs.empty()) { 1691 // Switch with ".non_lazy_symbol_pointer" directive. 1692 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1693 EmitAlignment(isPPC64 ? Align(8) : Align(4)); 1694 1695 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1696 // L_foo$stub: 1697 OutStreamer->EmitLabel(Stubs[i].first); 1698 // .indirect_symbol _foo 1699 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1700 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1701 MCSA_IndirectSymbol); 1702 1703 if (MCSym.getInt()) 1704 // External to current translation unit. 1705 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1706 else 1707 // Internal to current translation unit. 1708 // 1709 // When we place the LSDA into the TEXT section, the type info 1710 // pointers 1711 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1712 // However, sometimes the types are local to the file. So we need to 1713 // fill in the value for the NLP in those cases. 1714 OutStreamer->EmitValue( 1715 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1716 isPPC64 ? 8 : 4 /*size*/); 1717 } 1718 1719 Stubs.clear(); 1720 OutStreamer->AddBlankLine(); 1721 } 1722 } 1723 1724 // Funny Darwin hack: This flag tells the linker that no global symbols 1725 // contain code that falls through to other global symbols (e.g. the obvious 1726 // implementation of multiple entry points). If this doesn't occur, the 1727 // linker can safely perform dead code stripping. Since LLVM never generates 1728 // code that does this, it is always safe to set. 1729 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1730 1731 return AsmPrinter::doFinalization(M); 1732 } 1733 1734 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) { 1735 // Get the function descriptor symbol. 1736 CurrentFnDescSym = getSymbol(&MF.getFunction()); 1737 // Set the containing csect. 1738 MCSectionXCOFF *FnDescSec = OutStreamer->getContext().getXCOFFSection( 1739 CurrentFnDescSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD, 1740 XCOFF::C_HIDEXT, SectionKind::getData()); 1741 cast<MCSymbolXCOFF>(CurrentFnDescSym)->setContainingCsect(FnDescSec); 1742 1743 return AsmPrinter::SetupMachineFunction(MF); 1744 } 1745 1746 void PPCAIXAsmPrinter::ValidateGV(const GlobalVariable *GV) { 1747 // Early error checking limiting what is supported. 1748 if (GV->isThreadLocal()) 1749 report_fatal_error("Thread local not yet supported on AIX."); 1750 1751 if (GV->hasSection()) 1752 report_fatal_error("Custom section for Data not yet supported."); 1753 1754 if (GV->hasComdat()) 1755 report_fatal_error("COMDAT not yet supported by AIX."); 1756 } 1757 1758 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { 1759 ValidateGV(GV); 1760 1761 // External global variables are already handled. 1762 if (!GV->hasInitializer()) 1763 return; 1764 1765 // Create the symbol, set its storage class. 1766 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 1767 GVSym->setStorageClass( 1768 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 1769 1770 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1771 if ((!GVKind.isCommon() && !GVKind.isBSS() && !GVKind.isData() && 1772 !GVKind.isReadOnly()) || 1773 GVKind.isMergeable2ByteCString() || GVKind.isMergeable4ByteCString() || 1774 GVKind.isMergeableConst()) 1775 report_fatal_error("Encountered a global variable kind that is " 1776 "not supported yet."); 1777 1778 // Create the containing csect and switch to it. 1779 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>( 1780 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1781 OutStreamer->SwitchSection(Csect); 1782 GVSym->setContainingCsect(Csect); 1783 1784 const DataLayout &DL = GV->getParent()->getDataLayout(); 1785 1786 // Handle common symbols. 1787 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1788 unsigned Align = 1789 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV); 1790 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType()); 1791 1792 if (GVKind.isBSSLocal()) 1793 OutStreamer->EmitXCOFFLocalCommonSymbol( 1794 GVSym, Size, Csect->getQualNameSymbol(), Align); 1795 else 1796 OutStreamer->EmitCommonSymbol(Csect->getQualNameSymbol(), Size, Align); 1797 return; 1798 } 1799 1800 MCSymbol *EmittedInitSym = GVSym; 1801 EmitLinkage(GV, EmittedInitSym); 1802 EmitAlignment(getGVAlignment(GV, DL), GV); 1803 OutStreamer->EmitLabel(EmittedInitSym); 1804 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 1805 } 1806 1807 void PPCAIXAsmPrinter::EmitFunctionDescriptor() { 1808 const DataLayout &DL = getDataLayout(); 1809 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4; 1810 1811 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1812 // Emit function descriptor. 1813 OutStreamer->SwitchSection( 1814 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getContainingCsect()); 1815 OutStreamer->EmitLabel(CurrentFnDescSym); 1816 // Emit function entry point address. 1817 OutStreamer->EmitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext), 1818 PointerSize); 1819 // Emit TOC base address. 1820 const MCSectionXCOFF *TOCBaseSec = OutStreamer->getContext().getXCOFFSection( 1821 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1822 SectionKind::getData()); 1823 const MCSymbol *TOCBaseSym = TOCBaseSec->getQualNameSymbol(); 1824 OutStreamer->EmitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext), 1825 PointerSize); 1826 // Emit a null environment pointer. 1827 OutStreamer->EmitIntValue(0, PointerSize); 1828 1829 OutStreamer->SwitchSection(Current.first, Current.second); 1830 } 1831 1832 void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) { 1833 // If there are no functions in this module, we will never need to reference 1834 // the TOC base. 1835 if (M.empty()) 1836 return; 1837 1838 // Emit TOC base. 1839 MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection( 1840 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1841 SectionKind::getData()); 1842 // The TOC-base always has 0 size, but 4 byte alignment. 1843 TOCBaseSection->setAlignment(Align(4)); 1844 // Switch to section to emit TOC base. 1845 OutStreamer->SwitchSection(TOCBaseSection); 1846 1847 PPCTargetStreamer &TS = 1848 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1849 1850 for (auto &I : TOC) { 1851 // Setup the csect for the current TC entry. 1852 MCSectionXCOFF *TCEntry = OutStreamer->getContext().getXCOFFSection( 1853 cast<MCSymbolXCOFF>(I.first)->getUnqualifiedName(), XCOFF::XMC_TC, 1854 XCOFF::XTY_SD, XCOFF::C_HIDEXT, SectionKind::getData()); 1855 cast<MCSymbolXCOFF>(I.second)->setContainingCsect(TCEntry); 1856 OutStreamer->SwitchSection(TCEntry); 1857 1858 OutStreamer->EmitLabel(I.second); 1859 TS.emitTCEntry(*I.first); 1860 } 1861 } 1862 1863 MCSymbol * 1864 PPCAIXAsmPrinter::getMCSymbolForTOCPseudoMO(const MachineOperand &MO) { 1865 const GlobalObject *GO = nullptr; 1866 1867 // If the MO is a function or certain kind of globals, we want to make sure to 1868 // refer to the csect symbol, otherwise we can just do the default handling. 1869 if (MO.getType() != MachineOperand::MO_GlobalAddress || 1870 !(GO = dyn_cast<const GlobalObject>(MO.getGlobal()))) 1871 return PPCAsmPrinter::getMCSymbolForTOCPseudoMO(MO); 1872 1873 // Do an early error check for globals we don't support. This will go away 1874 // eventually. 1875 const auto *GV = dyn_cast<const GlobalVariable>(GO); 1876 if (GV) { 1877 ValidateGV(GV); 1878 } 1879 1880 MCSymbolXCOFF *XSym = cast<MCSymbolXCOFF>(getSymbol(GO)); 1881 1882 // If the global object is a global variable without initializer or is a 1883 // declaration of a function, then XSym is an external referenced symbol. 1884 // Hence we may need to explictly create a MCSectionXCOFF for it so that we 1885 // can return its symbol later. 1886 if (GO->isDeclaration()) { 1887 if (!XSym->hasContainingCsect()) { 1888 // Make sure the storage class is set. 1889 const XCOFF::StorageClass SC = 1890 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GO); 1891 XSym->setStorageClass(SC); 1892 1893 MCSectionXCOFF *Csect = OutStreamer->getContext().getXCOFFSection( 1894 XSym->getName(), isa<Function>(GO) ? XCOFF::XMC_DS : XCOFF::XMC_UA, 1895 XCOFF::XTY_ER, SC, SectionKind::getMetadata()); 1896 XSym->setContainingCsect(Csect); 1897 } 1898 1899 return XSym->getContainingCsect()->getQualNameSymbol(); 1900 } 1901 1902 // Handle initialized global variables. 1903 if (GV) { 1904 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1905 1906 // If the operand is a common then we should refer to the csect symbol. 1907 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1908 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>( 1909 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1910 return Csect->getQualNameSymbol(); 1911 } 1912 1913 // Other global variables are refered to by labels inside of a single csect, 1914 // so refer to the label directly. 1915 return getSymbol(GV); 1916 } 1917 1918 // If the MO is a function, we want to make sure to refer to the function 1919 // descriptor csect. 1920 return XSym->getContainingCsect()->getQualNameSymbol(); 1921 } 1922 1923 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1924 /// for a MachineFunction to the given output stream, in a format that the 1925 /// Darwin assembler can deal with. 1926 /// 1927 static AsmPrinter * 1928 createPPCAsmPrinterPass(TargetMachine &tm, 1929 std::unique_ptr<MCStreamer> &&Streamer) { 1930 if (tm.getTargetTriple().isMacOSX()) 1931 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1932 if (tm.getTargetTriple().isOSAIX()) 1933 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1934 1935 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1936 } 1937 1938 // Force static initialization. 1939 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1940 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1941 createPPCAsmPrinterPass); 1942 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1943 createPPCAsmPrinterPass); 1944 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1945 createPPCAsmPrinterPass); 1946 } 1947