1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "InstPrinter/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "llvm/ADT/MapVector.h" 29 #include "llvm/ADT/StringRef.h" 30 #include "llvm/ADT/Triple.h" 31 #include "llvm/ADT/Twine.h" 32 #include "llvm/BinaryFormat/ELF.h" 33 #include "llvm/BinaryFormat/MachO.h" 34 #include "llvm/CodeGen/AsmPrinter.h" 35 #include "llvm/CodeGen/MachineBasicBlock.h" 36 #include "llvm/CodeGen/MachineFunction.h" 37 #include "llvm/CodeGen/MachineInstr.h" 38 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 39 #include "llvm/CodeGen/MachineOperand.h" 40 #include "llvm/CodeGen/MachineRegisterInfo.h" 41 #include "llvm/CodeGen/StackMaps.h" 42 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 43 #include "llvm/IR/DataLayout.h" 44 #include "llvm/IR/GlobalValue.h" 45 #include "llvm/IR/Module.h" 46 #include "llvm/MC/MCAsmInfo.h" 47 #include "llvm/MC/MCContext.h" 48 #include "llvm/MC/MCExpr.h" 49 #include "llvm/MC/MCInst.h" 50 #include "llvm/MC/MCInstBuilder.h" 51 #include "llvm/MC/MCSectionELF.h" 52 #include "llvm/MC/MCSectionMachO.h" 53 #include "llvm/MC/MCStreamer.h" 54 #include "llvm/MC/MCSymbol.h" 55 #include "llvm/MC/MCSymbolELF.h" 56 #include "llvm/MC/SectionKind.h" 57 #include "llvm/Support/Casting.h" 58 #include "llvm/Support/CodeGen.h" 59 #include "llvm/Support/Debug.h" 60 #include "llvm/Support/ErrorHandling.h" 61 #include "llvm/Support/TargetRegistry.h" 62 #include "llvm/Support/raw_ostream.h" 63 #include "llvm/Target/TargetMachine.h" 64 #include <algorithm> 65 #include <cassert> 66 #include <cstdint> 67 #include <memory> 68 #include <new> 69 70 using namespace llvm; 71 72 #define DEBUG_TYPE "asmprinter" 73 74 namespace { 75 76 class PPCAsmPrinter : public AsmPrinter { 77 protected: 78 MapVector<MCSymbol *, MCSymbol *> TOC; 79 const PPCSubtarget *Subtarget; 80 StackMaps SM; 81 82 public: 83 explicit PPCAsmPrinter(TargetMachine &TM, 84 std::unique_ptr<MCStreamer> Streamer) 85 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 86 87 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 88 89 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 90 91 bool doInitialization(Module &M) override { 92 if (!TOC.empty()) 93 TOC.clear(); 94 return AsmPrinter::doInitialization(M); 95 } 96 97 void EmitInstruction(const MachineInstr *MI) override; 98 99 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 100 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 101 /// The \p MI would be INLINEASM ONLY. 102 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 103 104 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 105 const char *ExtraCode, raw_ostream &O) override; 106 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 107 const char *ExtraCode, raw_ostream &O) override; 108 109 void EmitEndOfAsmFile(Module &M) override; 110 111 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 112 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 113 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 114 bool runOnMachineFunction(MachineFunction &MF) override { 115 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 116 bool Changed = AsmPrinter::runOnMachineFunction(MF); 117 emitXRayTable(); 118 return Changed; 119 } 120 }; 121 122 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 123 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 124 public: 125 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 126 std::unique_ptr<MCStreamer> Streamer) 127 : PPCAsmPrinter(TM, std::move(Streamer)) {} 128 129 StringRef getPassName() const override { 130 return "Linux PPC Assembly Printer"; 131 } 132 133 bool doFinalization(Module &M) override; 134 void EmitStartOfAsmFile(Module &M) override; 135 136 void EmitFunctionEntryLabel() override; 137 138 void EmitFunctionBodyStart() override; 139 void EmitFunctionBodyEnd() override; 140 void EmitInstruction(const MachineInstr *MI) override; 141 }; 142 143 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 144 /// OS X 145 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 146 public: 147 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 148 std::unique_ptr<MCStreamer> Streamer) 149 : PPCAsmPrinter(TM, std::move(Streamer)) {} 150 151 StringRef getPassName() const override { 152 return "Darwin PPC Assembly Printer"; 153 } 154 155 bool doFinalization(Module &M) override; 156 void EmitStartOfAsmFile(Module &M) override; 157 }; 158 159 } // end anonymous namespace 160 161 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 162 raw_ostream &O) { 163 const DataLayout &DL = getDataLayout(); 164 const MachineOperand &MO = MI->getOperand(OpNo); 165 166 switch (MO.getType()) { 167 case MachineOperand::MO_Register: { 168 // The MI is INLINEASM ONLY and UseVSXReg is always false. 169 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 170 171 // Linux assembler (Others?) does not take register mnemonics. 172 // FIXME - What about special registers used in mfspr/mtspr? 173 if (!Subtarget->isDarwin()) 174 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 175 O << RegName; 176 return; 177 } 178 case MachineOperand::MO_Immediate: 179 O << MO.getImm(); 180 return; 181 182 case MachineOperand::MO_MachineBasicBlock: 183 MO.getMBB()->getSymbol()->print(O, MAI); 184 return; 185 case MachineOperand::MO_ConstantPoolIndex: 186 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 187 << MO.getIndex(); 188 return; 189 case MachineOperand::MO_BlockAddress: 190 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 191 return; 192 case MachineOperand::MO_GlobalAddress: { 193 // Computing the address of a global symbol, not calling it. 194 const GlobalValue *GV = MO.getGlobal(); 195 MCSymbol *SymToPrint; 196 197 // External or weakly linked global variables need non-lazily-resolved stubs 198 if (Subtarget->hasLazyResolverStub(GV)) { 199 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 200 MachineModuleInfoImpl::StubValueTy &StubSym = 201 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 202 SymToPrint); 203 if (!StubSym.getPointer()) 204 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 205 !GV->hasInternalLinkage()); 206 } else { 207 SymToPrint = getSymbol(GV); 208 } 209 210 SymToPrint->print(O, MAI); 211 212 printOffset(MO.getOffset(), O); 213 return; 214 } 215 216 default: 217 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 218 return; 219 } 220 } 221 222 /// PrintAsmOperand - Print out an operand for an inline asm expression. 223 /// 224 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 225 const char *ExtraCode, raw_ostream &O) { 226 // Does this asm operand have a single letter operand modifier? 227 if (ExtraCode && ExtraCode[0]) { 228 if (ExtraCode[1] != 0) return true; // Unknown modifier. 229 230 switch (ExtraCode[0]) { 231 default: 232 // See if this is a generic print operand 233 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 234 case 'c': // Don't print "$" before a global var name or constant. 235 break; // PPC never has a prefix. 236 case 'L': // Write second word of DImode reference. 237 // Verify that this operand has two consecutive registers. 238 if (!MI->getOperand(OpNo).isReg() || 239 OpNo+1 == MI->getNumOperands() || 240 !MI->getOperand(OpNo+1).isReg()) 241 return true; 242 ++OpNo; // Return the high-part. 243 break; 244 case 'I': 245 // Write 'i' if an integer constant, otherwise nothing. Used to print 246 // addi vs add, etc. 247 if (MI->getOperand(OpNo).isImm()) 248 O << "i"; 249 return false; 250 case 'x': 251 if(!MI->getOperand(OpNo).isReg()) 252 return true; 253 // This operand uses VSX numbering. 254 // If the operand is a VMX register, convert it to a VSX register. 255 unsigned Reg = MI->getOperand(OpNo).getReg(); 256 if (PPCInstrInfo::isVRRegister(Reg)) 257 Reg = PPC::VSX32 + (Reg - PPC::V0); 258 else if (PPCInstrInfo::isVFRegister(Reg)) 259 Reg = PPC::VSX32 + (Reg - PPC::VF0); 260 const char *RegName; 261 RegName = PPCInstPrinter::getRegisterName(Reg); 262 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 263 O << RegName; 264 return false; 265 } 266 } 267 268 printOperand(MI, OpNo, O); 269 return false; 270 } 271 272 // At the moment, all inline asm memory operands are a single register. 273 // In any case, the output of this routine should always be just one 274 // assembler operand. 275 276 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 277 const char *ExtraCode, 278 raw_ostream &O) { 279 if (ExtraCode && ExtraCode[0]) { 280 if (ExtraCode[1] != 0) return true; // Unknown modifier. 281 282 switch (ExtraCode[0]) { 283 default: return true; // Unknown modifier. 284 case 'y': // A memory reference for an X-form instruction 285 { 286 const char *RegName = "r0"; 287 if (!Subtarget->isDarwin()) 288 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 289 O << RegName << ", "; 290 printOperand(MI, OpNo, O); 291 return false; 292 } 293 case 'U': // Print 'u' for update form. 294 case 'X': // Print 'x' for indexed form. 295 { 296 // FIXME: Currently for PowerPC memory operands are always loaded 297 // into a register, so we never get an update or indexed form. 298 // This is bad even for offset forms, since even if we know we 299 // have a value in -16(r1), we will generate a load into r<n> 300 // and then load from 0(r<n>). Until that issue is fixed, 301 // tolerate 'U' and 'X' but don't output anything. 302 assert(MI->getOperand(OpNo).isReg()); 303 return false; 304 } 305 } 306 } 307 308 assert(MI->getOperand(OpNo).isReg()); 309 O << "0("; 310 printOperand(MI, OpNo, O); 311 O << ")"; 312 return false; 313 } 314 315 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 316 /// exists for it. If not, create one. Then return a symbol that references 317 /// the TOC entry. 318 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 319 MCSymbol *&TOCEntry = TOC[Sym]; 320 if (!TOCEntry) 321 TOCEntry = createTempSymbol("C"); 322 return TOCEntry; 323 } 324 325 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 326 emitStackMaps(SM); 327 } 328 329 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 330 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 331 332 SM.recordStackMap(MI); 333 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 334 335 // Scan ahead to trim the shadow. 336 const MachineBasicBlock &MBB = *MI.getParent(); 337 MachineBasicBlock::const_iterator MII(MI); 338 ++MII; 339 while (NumNOPBytes > 0) { 340 if (MII == MBB.end() || MII->isCall() || 341 MII->getOpcode() == PPC::DBG_VALUE || 342 MII->getOpcode() == TargetOpcode::PATCHPOINT || 343 MII->getOpcode() == TargetOpcode::STACKMAP) 344 break; 345 ++MII; 346 NumNOPBytes -= 4; 347 } 348 349 // Emit nops. 350 for (unsigned i = 0; i < NumNOPBytes; i += 4) 351 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 352 } 353 354 // Lower a patchpoint of the form: 355 // [<def>], <id>, <numBytes>, <target>, <numArgs> 356 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 357 SM.recordPatchPoint(MI); 358 PatchPointOpers Opers(&MI); 359 360 unsigned EncodedBytes = 0; 361 const MachineOperand &CalleeMO = Opers.getCallTarget(); 362 363 if (CalleeMO.isImm()) { 364 int64_t CallTarget = CalleeMO.getImm(); 365 if (CallTarget) { 366 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 367 "High 16 bits of call target should be zero."); 368 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 369 EncodedBytes = 0; 370 // Materialize the jump address: 371 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 372 .addReg(ScratchReg) 373 .addImm((CallTarget >> 32) & 0xFFFF)); 374 ++EncodedBytes; 375 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 376 .addReg(ScratchReg) 377 .addReg(ScratchReg) 378 .addImm(32).addImm(16)); 379 ++EncodedBytes; 380 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 381 .addReg(ScratchReg) 382 .addReg(ScratchReg) 383 .addImm((CallTarget >> 16) & 0xFFFF)); 384 ++EncodedBytes; 385 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 386 .addReg(ScratchReg) 387 .addReg(ScratchReg) 388 .addImm(CallTarget & 0xFFFF)); 389 390 // Save the current TOC pointer before the remote call. 391 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 392 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 393 .addReg(PPC::X2) 394 .addImm(TOCSaveOffset) 395 .addReg(PPC::X1)); 396 ++EncodedBytes; 397 398 // If we're on ELFv1, then we need to load the actual function pointer 399 // from the function descriptor. 400 if (!Subtarget->isELFv2ABI()) { 401 // Load the new TOC pointer and the function address, but not r11 402 // (needing this is rare, and loading it here would prevent passing it 403 // via a 'nest' parameter. 404 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 405 .addReg(PPC::X2) 406 .addImm(8) 407 .addReg(ScratchReg)); 408 ++EncodedBytes; 409 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 410 .addReg(ScratchReg) 411 .addImm(0) 412 .addReg(ScratchReg)); 413 ++EncodedBytes; 414 } 415 416 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 417 .addReg(ScratchReg)); 418 ++EncodedBytes; 419 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 420 ++EncodedBytes; 421 422 // Restore the TOC pointer after the call. 423 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 424 .addReg(PPC::X2) 425 .addImm(TOCSaveOffset) 426 .addReg(PPC::X1)); 427 ++EncodedBytes; 428 } 429 } else if (CalleeMO.isGlobal()) { 430 const GlobalValue *GValue = CalleeMO.getGlobal(); 431 MCSymbol *MOSymbol = getSymbol(GValue); 432 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 433 434 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 435 .addExpr(SymVar)); 436 EncodedBytes += 2; 437 } 438 439 // Each instruction is 4 bytes. 440 EncodedBytes *= 4; 441 442 // Emit padding. 443 unsigned NumBytes = Opers.getNumPatchBytes(); 444 assert(NumBytes >= EncodedBytes && 445 "Patchpoint can't request size less than the length of a call."); 446 assert((NumBytes - EncodedBytes) % 4 == 0 && 447 "Invalid number of NOP bytes requested!"); 448 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 449 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 450 } 451 452 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 453 /// call to __tls_get_addr to the current output stream. 454 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 455 MCSymbolRefExpr::VariantKind VK) { 456 StringRef Name = "__tls_get_addr"; 457 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 458 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 459 460 assert(MI->getOperand(0).isReg() && 461 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 462 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 463 "GETtls[ld]ADDR[32] must define GPR3"); 464 assert(MI->getOperand(1).isReg() && 465 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 466 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 467 "GETtls[ld]ADDR[32] must read GPR3"); 468 469 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 470 isPositionIndependent()) 471 Kind = MCSymbolRefExpr::VK_PLT; 472 const MCExpr *TlsRef = 473 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 474 475 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 476 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt()) 477 TlsRef = MCBinaryExpr::createAdd(TlsRef, 478 MCConstantExpr::create(32768, OutContext), 479 OutContext); 480 const MachineOperand &MO = MI->getOperand(2); 481 const GlobalValue *GValue = MO.getGlobal(); 482 MCSymbol *MOSymbol = getSymbol(GValue); 483 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 484 EmitToStreamer(*OutStreamer, 485 MCInstBuilder(Subtarget->isPPC64() ? 486 PPC::BL8_NOP_TLS : PPC::BL_TLS) 487 .addExpr(TlsRef) 488 .addExpr(SymVar)); 489 } 490 491 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 492 /// the current output stream. 493 /// 494 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 495 MCInst TmpInst; 496 bool isPPC64 = Subtarget->isPPC64(); 497 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 498 const Module *M = MF->getFunction().getParent(); 499 PICLevel::Level PL = M->getPICLevel(); 500 501 #ifndef NDEBUG 502 // Validate that SPE and FPU are mutually exclusive in codegen 503 if (!MI->isInlineAsm()) { 504 for (const MachineOperand &MO: MI->operands()) { 505 if (MO.isReg()) { 506 unsigned Reg = MO.getReg(); 507 if (Subtarget->hasSPE()) { 508 if (PPC::F4RCRegClass.contains(Reg) || 509 PPC::F8RCRegClass.contains(Reg) || 510 PPC::QBRCRegClass.contains(Reg) || 511 PPC::QFRCRegClass.contains(Reg) || 512 PPC::QSRCRegClass.contains(Reg) || 513 PPC::VFRCRegClass.contains(Reg) || 514 PPC::VRRCRegClass.contains(Reg) || 515 PPC::VSFRCRegClass.contains(Reg) || 516 PPC::VSSRCRegClass.contains(Reg) 517 ) 518 llvm_unreachable("SPE targets cannot have FPRegs!"); 519 } else { 520 if (PPC::SPERCRegClass.contains(Reg)) 521 llvm_unreachable("SPE register found in FPU-targeted code!"); 522 } 523 } 524 } 525 } 526 #endif 527 // Lower multi-instruction pseudo operations. 528 switch (MI->getOpcode()) { 529 default: break; 530 case TargetOpcode::DBG_VALUE: 531 llvm_unreachable("Should be handled target independently"); 532 case TargetOpcode::STACKMAP: 533 return LowerSTACKMAP(SM, *MI); 534 case TargetOpcode::PATCHPOINT: 535 return LowerPATCHPOINT(SM, *MI); 536 537 case PPC::MoveGOTtoLR: { 538 // Transform %lr = MoveGOTtoLR 539 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 540 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 541 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 542 // blrl 543 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 544 MCSymbol *GOTSymbol = 545 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 546 const MCExpr *OffsExpr = 547 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 548 MCSymbolRefExpr::VK_PPC_LOCAL, 549 OutContext), 550 MCConstantExpr::create(4, OutContext), 551 OutContext); 552 553 // Emit the 'bl'. 554 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 555 return; 556 } 557 case PPC::MovePCtoLR: 558 case PPC::MovePCtoLR8: { 559 // Transform %lr = MovePCtoLR 560 // Into this, where the label is the PIC base: 561 // bl L1$pb 562 // L1$pb: 563 MCSymbol *PICBase = MF->getPICBaseSymbol(); 564 565 // Emit the 'bl'. 566 EmitToStreamer(*OutStreamer, 567 MCInstBuilder(PPC::BL) 568 // FIXME: We would like an efficient form for this, so we 569 // don't have to do a lot of extra uniquing. 570 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 571 572 // Emit the label. 573 OutStreamer->EmitLabel(PICBase); 574 return; 575 } 576 case PPC::UpdateGBR: { 577 // Transform %rd = UpdateGBR(%rt, %ri) 578 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 579 // add %rd, %rt, %ri 580 // or into (if secure plt mode is on): 581 // addis r30, r30, .LTOC - .L0$pb@ha 582 // addi r30, r30, .LTOC - .L0$pb@l 583 // Get the offset from the GOT Base Register to the GOT 584 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 585 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 586 unsigned PICR = TmpInst.getOperand(0).getReg(); 587 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 588 const MCExpr *PB = 589 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 590 OutContext); 591 592 const MCExpr *LTOCDeltaExpr = 593 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 594 PB, OutContext); 595 596 const MCExpr *LTOCDeltaHi = 597 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 598 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 599 .addReg(PICR) 600 .addReg(PICR) 601 .addExpr(LTOCDeltaHi)); 602 603 const MCExpr *LTOCDeltaLo = 604 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 605 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 606 .addReg(PICR) 607 .addReg(PICR) 608 .addExpr(LTOCDeltaLo)); 609 return; 610 } else { 611 MCSymbol *PICOffset = 612 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 613 TmpInst.setOpcode(PPC::LWZ); 614 const MCExpr *Exp = 615 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 616 const MCExpr *PB = 617 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 618 MCSymbolRefExpr::VK_None, 619 OutContext); 620 const MCOperand TR = TmpInst.getOperand(1); 621 const MCOperand PICR = TmpInst.getOperand(0); 622 623 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 624 TmpInst.getOperand(1) = 625 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 626 TmpInst.getOperand(0) = TR; 627 TmpInst.getOperand(2) = PICR; 628 EmitToStreamer(*OutStreamer, TmpInst); 629 630 TmpInst.setOpcode(PPC::ADD4); 631 TmpInst.getOperand(0) = PICR; 632 TmpInst.getOperand(1) = TR; 633 TmpInst.getOperand(2) = PICR; 634 EmitToStreamer(*OutStreamer, TmpInst); 635 return; 636 } 637 } 638 case PPC::LWZtoc: { 639 // Transform %r3 = LWZtoc @min1, %r2 640 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 641 642 // Change the opcode to LWZ, and the global address operand to be a 643 // reference to the GOT entry we will synthesize later. 644 TmpInst.setOpcode(PPC::LWZ); 645 const MachineOperand &MO = MI->getOperand(1); 646 647 // Map symbol -> label of TOC entry 648 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 649 MCSymbol *MOSymbol = nullptr; 650 if (MO.isGlobal()) 651 MOSymbol = getSymbol(MO.getGlobal()); 652 else if (MO.isCPI()) 653 MOSymbol = GetCPISymbol(MO.getIndex()); 654 else if (MO.isJTI()) 655 MOSymbol = GetJTISymbol(MO.getIndex()); 656 else if (MO.isBlockAddress()) 657 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 658 659 if (PL == PICLevel::SmallPIC) { 660 const MCExpr *Exp = 661 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 662 OutContext); 663 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 664 } else { 665 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 666 667 const MCExpr *Exp = 668 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 669 OutContext); 670 const MCExpr *PB = 671 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 672 OutContext); 673 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 674 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 675 } 676 EmitToStreamer(*OutStreamer, TmpInst); 677 return; 678 } 679 case PPC::LDtocJTI: 680 case PPC::LDtocCPT: 681 case PPC::LDtocBA: 682 case PPC::LDtoc: { 683 // Transform %x3 = LDtoc @min1, %x2 684 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 685 686 // Change the opcode to LD, and the global address operand to be a 687 // reference to the TOC entry we will synthesize later. 688 TmpInst.setOpcode(PPC::LD); 689 const MachineOperand &MO = MI->getOperand(1); 690 691 // Map symbol -> label of TOC entry 692 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 693 MCSymbol *MOSymbol = nullptr; 694 if (MO.isGlobal()) 695 MOSymbol = getSymbol(MO.getGlobal()); 696 else if (MO.isCPI()) 697 MOSymbol = GetCPISymbol(MO.getIndex()); 698 else if (MO.isJTI()) 699 MOSymbol = GetJTISymbol(MO.getIndex()); 700 else if (MO.isBlockAddress()) 701 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 702 703 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 704 705 const MCExpr *Exp = 706 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 707 OutContext); 708 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 709 EmitToStreamer(*OutStreamer, TmpInst); 710 return; 711 } 712 713 case PPC::ADDIStocHA: { 714 // Transform %xd = ADDIStocHA %x2, @sym 715 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 716 717 // Change the opcode to ADDIS8. If the global address is external, has 718 // common linkage, is a non-local function address, or is a jump table 719 // address, then generate a TOC entry and reference that. Otherwise 720 // reference the symbol directly. 721 TmpInst.setOpcode(PPC::ADDIS8); 722 const MachineOperand &MO = MI->getOperand(2); 723 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 724 MO.isBlockAddress()) && 725 "Invalid operand for ADDIStocHA!"); 726 MCSymbol *MOSymbol = nullptr; 727 bool GlobalToc = false; 728 729 if (MO.isGlobal()) { 730 const GlobalValue *GV = MO.getGlobal(); 731 MOSymbol = getSymbol(GV); 732 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 733 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 734 } else if (MO.isCPI()) { 735 MOSymbol = GetCPISymbol(MO.getIndex()); 736 } else if (MO.isJTI()) { 737 MOSymbol = GetJTISymbol(MO.getIndex()); 738 } else if (MO.isBlockAddress()) { 739 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 740 } 741 742 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 743 TM.getCodeModel() == CodeModel::Large) 744 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 745 746 const MCExpr *Exp = 747 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 748 OutContext); 749 750 if (!MO.isJTI() && MO.getOffset()) 751 Exp = MCBinaryExpr::createAdd(Exp, 752 MCConstantExpr::create(MO.getOffset(), 753 OutContext), 754 OutContext); 755 756 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 757 EmitToStreamer(*OutStreamer, TmpInst); 758 return; 759 } 760 case PPC::LDtocL: { 761 // Transform %xd = LDtocL @sym, %xs 762 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 763 764 // Change the opcode to LD. If the global address is external, has 765 // common linkage, or is a jump table address, then reference the 766 // associated TOC entry. Otherwise reference the symbol directly. 767 TmpInst.setOpcode(PPC::LD); 768 const MachineOperand &MO = MI->getOperand(1); 769 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 770 MO.isBlockAddress()) && 771 "Invalid operand for LDtocL!"); 772 MCSymbol *MOSymbol = nullptr; 773 774 if (MO.isJTI()) 775 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 776 else if (MO.isBlockAddress()) { 777 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 778 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 779 } 780 else if (MO.isCPI()) { 781 MOSymbol = GetCPISymbol(MO.getIndex()); 782 if (TM.getCodeModel() == CodeModel::Large) 783 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 784 } 785 else if (MO.isGlobal()) { 786 const GlobalValue *GV = MO.getGlobal(); 787 MOSymbol = getSymbol(GV); 788 LLVM_DEBUG( 789 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 790 assert((GVFlags & PPCII::MO_NLP_FLAG) && 791 "LDtocL used on symbol that could be accessed directly is " 792 "invalid. Must match ADDIStocHA.")); 793 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 794 } 795 796 const MCExpr *Exp = 797 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 798 OutContext); 799 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 800 EmitToStreamer(*OutStreamer, TmpInst); 801 return; 802 } 803 case PPC::ADDItocL: { 804 // Transform %xd = ADDItocL %xs, @sym 805 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 806 807 // Change the opcode to ADDI8. If the global address is external, then 808 // generate a TOC entry and reference that. Otherwise reference the 809 // symbol directly. 810 TmpInst.setOpcode(PPC::ADDI8); 811 const MachineOperand &MO = MI->getOperand(2); 812 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 813 MCSymbol *MOSymbol = nullptr; 814 815 if (MO.isGlobal()) { 816 const GlobalValue *GV = MO.getGlobal(); 817 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 818 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 819 "Interposable definitions must use indirect access.")); 820 MOSymbol = getSymbol(GV); 821 } else if (MO.isCPI()) { 822 MOSymbol = GetCPISymbol(MO.getIndex()); 823 } 824 825 const MCExpr *Exp = 826 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 827 OutContext); 828 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 829 EmitToStreamer(*OutStreamer, TmpInst); 830 return; 831 } 832 case PPC::ADDISgotTprelHA: { 833 // Transform: %xd = ADDISgotTprelHA %x2, @sym 834 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 835 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 836 const MachineOperand &MO = MI->getOperand(2); 837 const GlobalValue *GValue = MO.getGlobal(); 838 MCSymbol *MOSymbol = getSymbol(GValue); 839 const MCExpr *SymGotTprel = 840 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 841 OutContext); 842 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 843 .addReg(MI->getOperand(0).getReg()) 844 .addReg(MI->getOperand(1).getReg()) 845 .addExpr(SymGotTprel)); 846 return; 847 } 848 case PPC::LDgotTprelL: 849 case PPC::LDgotTprelL32: { 850 // Transform %xd = LDgotTprelL @sym, %xs 851 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 852 853 // Change the opcode to LD. 854 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 855 const MachineOperand &MO = MI->getOperand(1); 856 const GlobalValue *GValue = MO.getGlobal(); 857 MCSymbol *MOSymbol = getSymbol(GValue); 858 const MCExpr *Exp = 859 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 860 OutContext); 861 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 862 EmitToStreamer(*OutStreamer, TmpInst); 863 return; 864 } 865 866 case PPC::PPC32PICGOT: { 867 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 868 MCSymbol *GOTRef = OutContext.createTempSymbol(); 869 MCSymbol *NextInstr = OutContext.createTempSymbol(); 870 871 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 872 // FIXME: We would like an efficient form for this, so we don't have to do 873 // a lot of extra uniquing. 874 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 875 const MCExpr *OffsExpr = 876 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 877 MCSymbolRefExpr::create(GOTRef, OutContext), 878 OutContext); 879 OutStreamer->EmitLabel(GOTRef); 880 OutStreamer->EmitValue(OffsExpr, 4); 881 OutStreamer->EmitLabel(NextInstr); 882 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 883 .addReg(MI->getOperand(0).getReg())); 884 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 885 .addReg(MI->getOperand(1).getReg()) 886 .addImm(0) 887 .addReg(MI->getOperand(0).getReg())); 888 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 889 .addReg(MI->getOperand(0).getReg()) 890 .addReg(MI->getOperand(1).getReg()) 891 .addReg(MI->getOperand(0).getReg())); 892 return; 893 } 894 case PPC::PPC32GOT: { 895 MCSymbol *GOTSymbol = 896 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 897 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 898 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 899 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 900 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 901 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 902 .addReg(MI->getOperand(0).getReg()) 903 .addExpr(SymGotTlsL)); 904 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 905 .addReg(MI->getOperand(0).getReg()) 906 .addReg(MI->getOperand(0).getReg()) 907 .addExpr(SymGotTlsHA)); 908 return; 909 } 910 case PPC::ADDIStlsgdHA: { 911 // Transform: %xd = ADDIStlsgdHA %x2, @sym 912 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 913 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 914 const MachineOperand &MO = MI->getOperand(2); 915 const GlobalValue *GValue = MO.getGlobal(); 916 MCSymbol *MOSymbol = getSymbol(GValue); 917 const MCExpr *SymGotTlsGD = 918 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 919 OutContext); 920 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 921 .addReg(MI->getOperand(0).getReg()) 922 .addReg(MI->getOperand(1).getReg()) 923 .addExpr(SymGotTlsGD)); 924 return; 925 } 926 case PPC::ADDItlsgdL: 927 // Transform: %xd = ADDItlsgdL %xs, @sym 928 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 929 case PPC::ADDItlsgdL32: { 930 // Transform: %rd = ADDItlsgdL32 %rs, @sym 931 // Into: %rd = ADDI %rs, sym@got@tlsgd 932 const MachineOperand &MO = MI->getOperand(2); 933 const GlobalValue *GValue = MO.getGlobal(); 934 MCSymbol *MOSymbol = getSymbol(GValue); 935 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 936 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 937 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 938 OutContext); 939 EmitToStreamer(*OutStreamer, 940 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 941 .addReg(MI->getOperand(0).getReg()) 942 .addReg(MI->getOperand(1).getReg()) 943 .addExpr(SymGotTlsGD)); 944 return; 945 } 946 case PPC::GETtlsADDR: 947 // Transform: %x3 = GETtlsADDR %x3, @sym 948 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 949 case PPC::GETtlsADDR32: { 950 // Transform: %r3 = GETtlsADDR32 %r3, @sym 951 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 952 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 953 return; 954 } 955 case PPC::ADDIStlsldHA: { 956 // Transform: %xd = ADDIStlsldHA %x2, @sym 957 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 958 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 959 const MachineOperand &MO = MI->getOperand(2); 960 const GlobalValue *GValue = MO.getGlobal(); 961 MCSymbol *MOSymbol = getSymbol(GValue); 962 const MCExpr *SymGotTlsLD = 963 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 964 OutContext); 965 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 966 .addReg(MI->getOperand(0).getReg()) 967 .addReg(MI->getOperand(1).getReg()) 968 .addExpr(SymGotTlsLD)); 969 return; 970 } 971 case PPC::ADDItlsldL: 972 // Transform: %xd = ADDItlsldL %xs, @sym 973 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 974 case PPC::ADDItlsldL32: { 975 // Transform: %rd = ADDItlsldL32 %rs, @sym 976 // Into: %rd = ADDI %rs, sym@got@tlsld 977 const MachineOperand &MO = MI->getOperand(2); 978 const GlobalValue *GValue = MO.getGlobal(); 979 MCSymbol *MOSymbol = getSymbol(GValue); 980 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 981 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 982 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 983 OutContext); 984 EmitToStreamer(*OutStreamer, 985 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 986 .addReg(MI->getOperand(0).getReg()) 987 .addReg(MI->getOperand(1).getReg()) 988 .addExpr(SymGotTlsLD)); 989 return; 990 } 991 case PPC::GETtlsldADDR: 992 // Transform: %x3 = GETtlsldADDR %x3, @sym 993 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 994 case PPC::GETtlsldADDR32: { 995 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 996 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 997 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 998 return; 999 } 1000 case PPC::ADDISdtprelHA: 1001 // Transform: %xd = ADDISdtprelHA %xs, @sym 1002 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1003 case PPC::ADDISdtprelHA32: { 1004 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1005 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1006 const MachineOperand &MO = MI->getOperand(2); 1007 const GlobalValue *GValue = MO.getGlobal(); 1008 MCSymbol *MOSymbol = getSymbol(GValue); 1009 const MCExpr *SymDtprel = 1010 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1011 OutContext); 1012 EmitToStreamer( 1013 *OutStreamer, 1014 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1015 .addReg(MI->getOperand(0).getReg()) 1016 .addReg(MI->getOperand(1).getReg()) 1017 .addExpr(SymDtprel)); 1018 return; 1019 } 1020 case PPC::ADDIdtprelL: 1021 // Transform: %xd = ADDIdtprelL %xs, @sym 1022 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1023 case PPC::ADDIdtprelL32: { 1024 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1025 // Into: %rd = ADDI %rs, sym@dtprel@l 1026 const MachineOperand &MO = MI->getOperand(2); 1027 const GlobalValue *GValue = MO.getGlobal(); 1028 MCSymbol *MOSymbol = getSymbol(GValue); 1029 const MCExpr *SymDtprel = 1030 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1031 OutContext); 1032 EmitToStreamer(*OutStreamer, 1033 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1034 .addReg(MI->getOperand(0).getReg()) 1035 .addReg(MI->getOperand(1).getReg()) 1036 .addExpr(SymDtprel)); 1037 return; 1038 } 1039 case PPC::MFOCRF: 1040 case PPC::MFOCRF8: 1041 if (!Subtarget->hasMFOCRF()) { 1042 // Transform: %r3 = MFOCRF %cr7 1043 // Into: %r3 = MFCR ;; cr7 1044 unsigned NewOpcode = 1045 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1046 OutStreamer->AddComment(PPCInstPrinter:: 1047 getRegisterName(MI->getOperand(1).getReg())); 1048 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1049 .addReg(MI->getOperand(0).getReg())); 1050 return; 1051 } 1052 break; 1053 case PPC::MTOCRF: 1054 case PPC::MTOCRF8: 1055 if (!Subtarget->hasMFOCRF()) { 1056 // Transform: %cr7 = MTOCRF %r3 1057 // Into: MTCRF mask, %r3 ;; cr7 1058 unsigned NewOpcode = 1059 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1060 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1061 ->getEncodingValue(MI->getOperand(0).getReg()); 1062 OutStreamer->AddComment(PPCInstPrinter:: 1063 getRegisterName(MI->getOperand(0).getReg())); 1064 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1065 .addImm(Mask) 1066 .addReg(MI->getOperand(1).getReg())); 1067 return; 1068 } 1069 break; 1070 case PPC::LD: 1071 case PPC::STD: 1072 case PPC::LWA_32: 1073 case PPC::LWA: { 1074 // Verify alignment is legal, so we don't create relocations 1075 // that can't be supported. 1076 // FIXME: This test is currently disabled for Darwin. The test 1077 // suite shows a handful of test cases that fail this check for 1078 // Darwin. Those need to be investigated before this sanity test 1079 // can be enabled for those subtargets. 1080 if (!Subtarget->isDarwin()) { 1081 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1082 const MachineOperand &MO = MI->getOperand(OpNum); 1083 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1084 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1085 } 1086 // Now process the instruction normally. 1087 break; 1088 } 1089 } 1090 1091 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1092 EmitToStreamer(*OutStreamer, TmpInst); 1093 } 1094 1095 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1096 if (!Subtarget->isPPC64()) 1097 return PPCAsmPrinter::EmitInstruction(MI); 1098 1099 switch (MI->getOpcode()) { 1100 default: 1101 return PPCAsmPrinter::EmitInstruction(MI); 1102 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1103 // .begin: 1104 // b .end # lis 0, FuncId[16..32] 1105 // nop # li 0, FuncId[0..15] 1106 // std 0, -8(1) 1107 // mflr 0 1108 // bl __xray_FunctionEntry 1109 // mtlr 0 1110 // .end: 1111 // 1112 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1113 // of instructions change. 1114 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1115 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1116 OutStreamer->EmitLabel(BeginOfSled); 1117 EmitToStreamer(*OutStreamer, 1118 MCInstBuilder(PPC::B).addExpr( 1119 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1120 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1121 EmitToStreamer( 1122 *OutStreamer, 1123 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1124 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1125 EmitToStreamer(*OutStreamer, 1126 MCInstBuilder(PPC::BL8_NOP) 1127 .addExpr(MCSymbolRefExpr::create( 1128 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1129 OutContext))); 1130 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1131 OutStreamer->EmitLabel(EndOfSled); 1132 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1133 break; 1134 } 1135 case TargetOpcode::PATCHABLE_RET: { 1136 unsigned RetOpcode = MI->getOperand(0).getImm(); 1137 MCInst RetInst; 1138 RetInst.setOpcode(RetOpcode); 1139 for (const auto &MO : 1140 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1141 MCOperand MCOp; 1142 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1143 RetInst.addOperand(MCOp); 1144 } 1145 1146 bool IsConditional; 1147 if (RetOpcode == PPC::BCCLR) { 1148 IsConditional = true; 1149 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1150 RetOpcode == PPC::TCRETURNai8) { 1151 break; 1152 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1153 IsConditional = false; 1154 } else { 1155 EmitToStreamer(*OutStreamer, RetInst); 1156 break; 1157 } 1158 1159 MCSymbol *FallthroughLabel; 1160 if (IsConditional) { 1161 // Before: 1162 // bgtlr cr0 1163 // 1164 // After: 1165 // ble cr0, .end 1166 // .p2align 3 1167 // .begin: 1168 // blr # lis 0, FuncId[16..32] 1169 // nop # li 0, FuncId[0..15] 1170 // std 0, -8(1) 1171 // mflr 0 1172 // bl __xray_FunctionExit 1173 // mtlr 0 1174 // blr 1175 // .end: 1176 // 1177 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1178 // of instructions change. 1179 FallthroughLabel = OutContext.createTempSymbol(); 1180 EmitToStreamer( 1181 *OutStreamer, 1182 MCInstBuilder(PPC::BCC) 1183 .addImm(PPC::InvertPredicate( 1184 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1185 .addReg(MI->getOperand(2).getReg()) 1186 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1187 RetInst = MCInst(); 1188 RetInst.setOpcode(PPC::BLR8); 1189 } 1190 // .p2align 3 1191 // .begin: 1192 // b(lr)? # lis 0, FuncId[16..32] 1193 // nop # li 0, FuncId[0..15] 1194 // std 0, -8(1) 1195 // mflr 0 1196 // bl __xray_FunctionExit 1197 // mtlr 0 1198 // b(lr)? 1199 // 1200 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1201 // of instructions change. 1202 OutStreamer->EmitCodeAlignment(8); 1203 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1204 OutStreamer->EmitLabel(BeginOfSled); 1205 EmitToStreamer(*OutStreamer, RetInst); 1206 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1207 EmitToStreamer( 1208 *OutStreamer, 1209 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1210 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1211 EmitToStreamer(*OutStreamer, 1212 MCInstBuilder(PPC::BL8_NOP) 1213 .addExpr(MCSymbolRefExpr::create( 1214 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1215 OutContext))); 1216 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1217 EmitToStreamer(*OutStreamer, RetInst); 1218 if (IsConditional) 1219 OutStreamer->EmitLabel(FallthroughLabel); 1220 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1221 break; 1222 } 1223 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1224 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1225 case TargetOpcode::PATCHABLE_TAIL_CALL: 1226 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1227 // normal function exit from a tail exit. 1228 llvm_unreachable("Tail call is handled in the normal case. See comments " 1229 "around this assert."); 1230 } 1231 } 1232 1233 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1234 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1235 PPCTargetStreamer *TS = 1236 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1237 1238 if (TS) 1239 TS->emitAbiVersion(2); 1240 } 1241 1242 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1243 !isPositionIndependent()) 1244 return AsmPrinter::EmitStartOfAsmFile(M); 1245 1246 if (M.getPICLevel() == PICLevel::SmallPIC) 1247 return AsmPrinter::EmitStartOfAsmFile(M); 1248 1249 OutStreamer->SwitchSection(OutContext.getELFSection( 1250 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1251 1252 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1253 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1254 1255 OutStreamer->EmitLabel(CurrentPos); 1256 1257 // The GOT pointer points to the middle of the GOT, in order to reference the 1258 // entire 64kB range. 0x8000 is the midpoint. 1259 const MCExpr *tocExpr = 1260 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1261 MCConstantExpr::create(0x8000, OutContext), 1262 OutContext); 1263 1264 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1265 1266 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1267 } 1268 1269 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1270 // linux/ppc32 - Normal entry label. 1271 if (!Subtarget->isPPC64() && 1272 (!isPositionIndependent() || 1273 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1274 return AsmPrinter::EmitFunctionEntryLabel(); 1275 1276 if (!Subtarget->isPPC64()) { 1277 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1278 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1279 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1280 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1281 OutStreamer->EmitLabel(RelocSymbol); 1282 1283 const MCExpr *OffsExpr = 1284 MCBinaryExpr::createSub( 1285 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1286 OutContext), 1287 MCSymbolRefExpr::create(PICBase, OutContext), 1288 OutContext); 1289 OutStreamer->EmitValue(OffsExpr, 4); 1290 OutStreamer->EmitLabel(CurrentFnSym); 1291 return; 1292 } else 1293 return AsmPrinter::EmitFunctionEntryLabel(); 1294 } 1295 1296 // ELFv2 ABI - Normal entry label. 1297 if (Subtarget->isELFv2ABI()) { 1298 // In the Large code model, we allow arbitrary displacements between 1299 // the text section and its associated TOC section. We place the 1300 // full 8-byte offset to the TOC in memory immediately preceding 1301 // the function global entry point. 1302 if (TM.getCodeModel() == CodeModel::Large 1303 && !MF->getRegInfo().use_empty(PPC::X2)) { 1304 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1305 1306 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1307 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1308 const MCExpr *TOCDeltaExpr = 1309 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1310 MCSymbolRefExpr::create(GlobalEPSymbol, 1311 OutContext), 1312 OutContext); 1313 1314 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1315 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1316 } 1317 return AsmPrinter::EmitFunctionEntryLabel(); 1318 } 1319 1320 // Emit an official procedure descriptor. 1321 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1322 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1323 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1324 OutStreamer->SwitchSection(Section); 1325 OutStreamer->EmitLabel(CurrentFnSym); 1326 OutStreamer->EmitValueToAlignment(8); 1327 MCSymbol *Symbol1 = CurrentFnSymForSize; 1328 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1329 // entry point. 1330 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1331 8 /*size*/); 1332 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1333 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1334 OutStreamer->EmitValue( 1335 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1336 8/*size*/); 1337 // Emit a null environment pointer. 1338 OutStreamer->EmitIntValue(0, 8 /* size */); 1339 OutStreamer->SwitchSection(Current.first, Current.second); 1340 } 1341 1342 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1343 const DataLayout &DL = getDataLayout(); 1344 1345 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1346 1347 PPCTargetStreamer &TS = 1348 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1349 1350 if (!TOC.empty()) { 1351 MCSectionELF *Section; 1352 1353 if (isPPC64) 1354 Section = OutStreamer->getContext().getELFSection( 1355 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1356 else 1357 Section = OutStreamer->getContext().getELFSection( 1358 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1359 OutStreamer->SwitchSection(Section); 1360 1361 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1362 E = TOC.end(); I != E; ++I) { 1363 OutStreamer->EmitLabel(I->second); 1364 MCSymbol *S = I->first; 1365 if (isPPC64) { 1366 TS.emitTCEntry(*S); 1367 } else { 1368 OutStreamer->EmitValueToAlignment(4); 1369 OutStreamer->EmitSymbolValue(S, 4); 1370 } 1371 } 1372 } 1373 1374 return AsmPrinter::doFinalization(M); 1375 } 1376 1377 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1378 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1379 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1380 // provide two entry points. The ABI guarantees that when calling the 1381 // local entry point, r2 is set up by the caller to contain the TOC base 1382 // for this function, and when calling the global entry point, r12 is set 1383 // up by the caller to hold the address of the global entry point. We 1384 // thus emit a prefix sequence along the following lines: 1385 // 1386 // func: 1387 // .Lfunc_gepNN: 1388 // # global entry point 1389 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1390 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1391 // .Lfunc_lepNN: 1392 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1393 // # local entry point, followed by function body 1394 // 1395 // For the Large code model, we create 1396 // 1397 // .Lfunc_tocNN: 1398 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1399 // func: 1400 // .Lfunc_gepNN: 1401 // # global entry point 1402 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1403 // add r2,r2,r12 1404 // .Lfunc_lepNN: 1405 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1406 // # local entry point, followed by function body 1407 // 1408 // This ensures we have r2 set up correctly while executing the function 1409 // body, no matter which entry point is called. 1410 if (Subtarget->isELFv2ABI() 1411 // Only do all that if the function uses r2 in the first place. 1412 && !MF->getRegInfo().use_empty(PPC::X2)) { 1413 // Note: The logic here must be synchronized with the code in the 1414 // branch-selection pass which sets the offset of the first block in the 1415 // function. This matters because it affects the alignment. 1416 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1417 1418 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1419 OutStreamer->EmitLabel(GlobalEntryLabel); 1420 const MCSymbolRefExpr *GlobalEntryLabelExp = 1421 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1422 1423 if (TM.getCodeModel() != CodeModel::Large) { 1424 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1425 const MCExpr *TOCDeltaExpr = 1426 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1427 GlobalEntryLabelExp, OutContext); 1428 1429 const MCExpr *TOCDeltaHi = 1430 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1431 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1432 .addReg(PPC::X2) 1433 .addReg(PPC::X12) 1434 .addExpr(TOCDeltaHi)); 1435 1436 const MCExpr *TOCDeltaLo = 1437 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1438 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1439 .addReg(PPC::X2) 1440 .addReg(PPC::X2) 1441 .addExpr(TOCDeltaLo)); 1442 } else { 1443 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1444 const MCExpr *TOCOffsetDeltaExpr = 1445 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1446 GlobalEntryLabelExp, OutContext); 1447 1448 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1449 .addReg(PPC::X2) 1450 .addExpr(TOCOffsetDeltaExpr) 1451 .addReg(PPC::X12)); 1452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1453 .addReg(PPC::X2) 1454 .addReg(PPC::X2) 1455 .addReg(PPC::X12)); 1456 } 1457 1458 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1459 OutStreamer->EmitLabel(LocalEntryLabel); 1460 const MCSymbolRefExpr *LocalEntryLabelExp = 1461 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1462 const MCExpr *LocalOffsetExp = 1463 MCBinaryExpr::createSub(LocalEntryLabelExp, 1464 GlobalEntryLabelExp, OutContext); 1465 1466 PPCTargetStreamer *TS = 1467 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1468 1469 if (TS) 1470 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1471 } 1472 } 1473 1474 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1475 /// directive. 1476 /// 1477 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1478 // Only the 64-bit target requires a traceback table. For now, 1479 // we only emit the word of zeroes that GDB requires to find 1480 // the end of the function, and zeroes for the eight-byte 1481 // mandatory fields. 1482 // FIXME: We should fill in the eight-byte mandatory fields as described in 1483 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1484 // currently make use of these fields). 1485 if (Subtarget->isPPC64()) { 1486 OutStreamer->EmitIntValue(0, 4/*size*/); 1487 OutStreamer->EmitIntValue(0, 8/*size*/); 1488 } 1489 } 1490 1491 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1492 static const char *const CPUDirectives[] = { 1493 "", 1494 "ppc", 1495 "ppc440", 1496 "ppc601", 1497 "ppc602", 1498 "ppc603", 1499 "ppc7400", 1500 "ppc750", 1501 "ppc970", 1502 "ppcA2", 1503 "ppce500", 1504 "ppce500mc", 1505 "ppce5500", 1506 "power3", 1507 "power4", 1508 "power5", 1509 "power5x", 1510 "power6", 1511 "power6x", 1512 "power7", 1513 // FIXME: why is power8 missing here? 1514 "ppc64", 1515 "ppc64le", 1516 "power9" 1517 }; 1518 1519 // Get the numerically largest directive. 1520 // FIXME: How should we merge darwin directives? 1521 unsigned Directive = PPC::DIR_NONE; 1522 for (const Function &F : M) { 1523 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1524 unsigned FDir = STI.getDarwinDirective(); 1525 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1526 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1527 Directive = PPC::DIR_970; 1528 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1529 Directive = PPC::DIR_7400; 1530 if (STI.isPPC64() && Directive < PPC::DIR_64) 1531 Directive = PPC::DIR_64; 1532 } 1533 1534 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1535 1536 assert(Directive < array_lengthof(CPUDirectives) && 1537 "CPUDirectives[] might not be up-to-date!"); 1538 PPCTargetStreamer &TStreamer = 1539 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1540 TStreamer.emitMachine(CPUDirectives[Directive]); 1541 1542 // Prime text sections so they are adjacent. This reduces the likelihood a 1543 // large data or debug section causes a branch to exceed 16M limit. 1544 const TargetLoweringObjectFileMachO &TLOFMacho = 1545 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1546 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1547 if (TM.getRelocationModel() == Reloc::PIC_) { 1548 OutStreamer->SwitchSection( 1549 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1550 MachO::S_SYMBOL_STUBS | 1551 MachO::S_ATTR_PURE_INSTRUCTIONS, 1552 32, SectionKind::getText())); 1553 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1554 OutStreamer->SwitchSection( 1555 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1556 MachO::S_SYMBOL_STUBS | 1557 MachO::S_ATTR_PURE_INSTRUCTIONS, 1558 16, SectionKind::getText())); 1559 } 1560 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1561 } 1562 1563 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1564 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1565 1566 // Darwin/PPC always uses mach-o. 1567 const TargetLoweringObjectFileMachO &TLOFMacho = 1568 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1569 if (MMI) { 1570 MachineModuleInfoMachO &MMIMacho = 1571 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1572 1573 if (MAI->doesSupportExceptionHandling()) { 1574 // Add the (possibly multiple) personalities to the set of global values. 1575 // Only referenced functions get into the Personalities list. 1576 for (const Function *Personality : MMI->getPersonalities()) { 1577 if (Personality) { 1578 MCSymbol *NLPSym = 1579 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1580 MachineModuleInfoImpl::StubValueTy &StubSym = 1581 MMIMacho.getGVStubEntry(NLPSym); 1582 StubSym = 1583 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1584 } 1585 } 1586 } 1587 1588 // Output stubs for dynamically-linked functions. 1589 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1590 1591 // Output macho stubs for external and common global variables. 1592 if (!Stubs.empty()) { 1593 // Switch with ".non_lazy_symbol_pointer" directive. 1594 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1595 EmitAlignment(isPPC64 ? 3 : 2); 1596 1597 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1598 // L_foo$stub: 1599 OutStreamer->EmitLabel(Stubs[i].first); 1600 // .indirect_symbol _foo 1601 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1602 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1603 MCSA_IndirectSymbol); 1604 1605 if (MCSym.getInt()) 1606 // External to current translation unit. 1607 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1608 else 1609 // Internal to current translation unit. 1610 // 1611 // When we place the LSDA into the TEXT section, the type info 1612 // pointers 1613 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1614 // However, sometimes the types are local to the file. So we need to 1615 // fill in the value for the NLP in those cases. 1616 OutStreamer->EmitValue( 1617 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1618 isPPC64 ? 8 : 4 /*size*/); 1619 } 1620 1621 Stubs.clear(); 1622 OutStreamer->AddBlankLine(); 1623 } 1624 } 1625 1626 // Funny Darwin hack: This flag tells the linker that no global symbols 1627 // contain code that falls through to other global symbols (e.g. the obvious 1628 // implementation of multiple entry points). If this doesn't occur, the 1629 // linker can safely perform dead code stripping. Since LLVM never generates 1630 // code that does this, it is always safe to set. 1631 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1632 1633 return AsmPrinter::doFinalization(M); 1634 } 1635 1636 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1637 /// for a MachineFunction to the given output stream, in a format that the 1638 /// Darwin assembler can deal with. 1639 /// 1640 static AsmPrinter * 1641 createPPCAsmPrinterPass(TargetMachine &tm, 1642 std::unique_ptr<MCStreamer> &&Streamer) { 1643 if (tm.getTargetTriple().isMacOSX()) 1644 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1645 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1646 } 1647 1648 // Force static initialization. 1649 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1650 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1651 createPPCAsmPrinterPass); 1652 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1653 createPPCAsmPrinterPass); 1654 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1655 createPPCAsmPrinterPass); 1656 } 1657