1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "InstPrinter/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "llvm/ADT/MapVector.h" 29 #include "llvm/ADT/StringRef.h" 30 #include "llvm/ADT/Triple.h" 31 #include "llvm/ADT/Twine.h" 32 #include "llvm/BinaryFormat/ELF.h" 33 #include "llvm/BinaryFormat/MachO.h" 34 #include "llvm/CodeGen/AsmPrinter.h" 35 #include "llvm/CodeGen/MachineBasicBlock.h" 36 #include "llvm/CodeGen/MachineFunction.h" 37 #include "llvm/CodeGen/MachineInstr.h" 38 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 39 #include "llvm/CodeGen/MachineOperand.h" 40 #include "llvm/CodeGen/MachineRegisterInfo.h" 41 #include "llvm/CodeGen/StackMaps.h" 42 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 43 #include "llvm/IR/DataLayout.h" 44 #include "llvm/IR/GlobalValue.h" 45 #include "llvm/IR/Module.h" 46 #include "llvm/MC/MCAsmInfo.h" 47 #include "llvm/MC/MCContext.h" 48 #include "llvm/MC/MCExpr.h" 49 #include "llvm/MC/MCInst.h" 50 #include "llvm/MC/MCInstBuilder.h" 51 #include "llvm/MC/MCSectionELF.h" 52 #include "llvm/MC/MCSectionMachO.h" 53 #include "llvm/MC/MCStreamer.h" 54 #include "llvm/MC/MCSymbol.h" 55 #include "llvm/MC/MCSymbolELF.h" 56 #include "llvm/MC/SectionKind.h" 57 #include "llvm/Support/Casting.h" 58 #include "llvm/Support/CodeGen.h" 59 #include "llvm/Support/Debug.h" 60 #include "llvm/Support/ErrorHandling.h" 61 #include "llvm/Support/TargetRegistry.h" 62 #include "llvm/Support/raw_ostream.h" 63 #include "llvm/Target/TargetMachine.h" 64 #include <algorithm> 65 #include <cassert> 66 #include <cstdint> 67 #include <memory> 68 #include <new> 69 70 using namespace llvm; 71 72 #define DEBUG_TYPE "asmprinter" 73 74 namespace { 75 76 class PPCAsmPrinter : public AsmPrinter { 77 protected: 78 MapVector<MCSymbol *, MCSymbol *> TOC; 79 const PPCSubtarget *Subtarget; 80 StackMaps SM; 81 82 public: 83 explicit PPCAsmPrinter(TargetMachine &TM, 84 std::unique_ptr<MCStreamer> Streamer) 85 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 86 87 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 88 89 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 90 91 bool doInitialization(Module &M) override { 92 if (!TOC.empty()) 93 TOC.clear(); 94 return AsmPrinter::doInitialization(M); 95 } 96 97 void EmitInstruction(const MachineInstr *MI) override; 98 99 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 100 101 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 102 unsigned AsmVariant, const char *ExtraCode, 103 raw_ostream &O) override; 104 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 105 unsigned AsmVariant, const char *ExtraCode, 106 raw_ostream &O) override; 107 108 void EmitEndOfAsmFile(Module &M) override; 109 110 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 111 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 112 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 113 bool runOnMachineFunction(MachineFunction &MF) override { 114 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 115 bool Changed = AsmPrinter::runOnMachineFunction(MF); 116 emitXRayTable(); 117 return Changed; 118 } 119 }; 120 121 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 122 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 123 public: 124 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 125 std::unique_ptr<MCStreamer> Streamer) 126 : PPCAsmPrinter(TM, std::move(Streamer)) {} 127 128 StringRef getPassName() const override { 129 return "Linux PPC Assembly Printer"; 130 } 131 132 bool doFinalization(Module &M) override; 133 void EmitStartOfAsmFile(Module &M) override; 134 135 void EmitFunctionEntryLabel() override; 136 137 void EmitFunctionBodyStart() override; 138 void EmitFunctionBodyEnd() override; 139 void EmitInstruction(const MachineInstr *MI) override; 140 }; 141 142 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 143 /// OS X 144 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 145 public: 146 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 147 std::unique_ptr<MCStreamer> Streamer) 148 : PPCAsmPrinter(TM, std::move(Streamer)) {} 149 150 StringRef getPassName() const override { 151 return "Darwin PPC Assembly Printer"; 152 } 153 154 bool doFinalization(Module &M) override; 155 void EmitStartOfAsmFile(Module &M) override; 156 }; 157 158 } // end anonymous namespace 159 160 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 161 raw_ostream &O) { 162 const DataLayout &DL = getDataLayout(); 163 const MachineOperand &MO = MI->getOperand(OpNo); 164 165 switch (MO.getType()) { 166 case MachineOperand::MO_Register: { 167 unsigned Reg = PPCInstrInfo::getRegNumForOperand(MI->getDesc(), 168 MO.getReg(), OpNo); 169 170 const char *RegName = PPCInstPrinter::getRegisterName(Reg); 171 172 // Linux assembler (Others?) does not take register mnemonics. 173 // FIXME - What about special registers used in mfspr/mtspr? 174 if (!Subtarget->isDarwin()) 175 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 176 O << RegName; 177 return; 178 } 179 case MachineOperand::MO_Immediate: 180 O << MO.getImm(); 181 return; 182 183 case MachineOperand::MO_MachineBasicBlock: 184 MO.getMBB()->getSymbol()->print(O, MAI); 185 return; 186 case MachineOperand::MO_ConstantPoolIndex: 187 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 188 << MO.getIndex(); 189 return; 190 case MachineOperand::MO_BlockAddress: 191 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 192 return; 193 case MachineOperand::MO_GlobalAddress: { 194 // Computing the address of a global symbol, not calling it. 195 const GlobalValue *GV = MO.getGlobal(); 196 MCSymbol *SymToPrint; 197 198 // External or weakly linked global variables need non-lazily-resolved stubs 199 if (Subtarget->hasLazyResolverStub(GV)) { 200 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 201 MachineModuleInfoImpl::StubValueTy &StubSym = 202 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 203 SymToPrint); 204 if (!StubSym.getPointer()) 205 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 206 !GV->hasInternalLinkage()); 207 } else { 208 SymToPrint = getSymbol(GV); 209 } 210 211 SymToPrint->print(O, MAI); 212 213 printOffset(MO.getOffset(), O); 214 return; 215 } 216 217 default: 218 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 219 return; 220 } 221 } 222 223 /// PrintAsmOperand - Print out an operand for an inline asm expression. 224 /// 225 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 226 unsigned AsmVariant, 227 const char *ExtraCode, raw_ostream &O) { 228 // Does this asm operand have a single letter operand modifier? 229 if (ExtraCode && ExtraCode[0]) { 230 if (ExtraCode[1] != 0) return true; // Unknown modifier. 231 232 switch (ExtraCode[0]) { 233 default: 234 // See if this is a generic print operand 235 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 236 case 'c': // Don't print "$" before a global var name or constant. 237 break; // PPC never has a prefix. 238 case 'L': // Write second word of DImode reference. 239 // Verify that this operand has two consecutive registers. 240 if (!MI->getOperand(OpNo).isReg() || 241 OpNo+1 == MI->getNumOperands() || 242 !MI->getOperand(OpNo+1).isReg()) 243 return true; 244 ++OpNo; // Return the high-part. 245 break; 246 case 'I': 247 // Write 'i' if an integer constant, otherwise nothing. Used to print 248 // addi vs add, etc. 249 if (MI->getOperand(OpNo).isImm()) 250 O << "i"; 251 return false; 252 case 'x': 253 if(!MI->getOperand(OpNo).isReg()) 254 return true; 255 // This operand uses VSX numbering. 256 // If the operand is a VMX register, convert it to a VSX register. 257 unsigned Reg = MI->getOperand(OpNo).getReg(); 258 if (PPCInstrInfo::isVRRegister(Reg)) 259 Reg = PPC::VSX32 + (Reg - PPC::V0); 260 else if (PPCInstrInfo::isVFRegister(Reg)) 261 Reg = PPC::VSX32 + (Reg - PPC::VF0); 262 const char *RegName; 263 RegName = PPCInstPrinter::getRegisterName(Reg); 264 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 265 O << RegName; 266 return false; 267 } 268 } 269 270 printOperand(MI, OpNo, O); 271 return false; 272 } 273 274 // At the moment, all inline asm memory operands are a single register. 275 // In any case, the output of this routine should always be just one 276 // assembler operand. 277 278 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 279 unsigned AsmVariant, 280 const char *ExtraCode, 281 raw_ostream &O) { 282 if (ExtraCode && ExtraCode[0]) { 283 if (ExtraCode[1] != 0) return true; // Unknown modifier. 284 285 switch (ExtraCode[0]) { 286 default: return true; // Unknown modifier. 287 case 'y': // A memory reference for an X-form instruction 288 { 289 const char *RegName = "r0"; 290 if (!Subtarget->isDarwin()) 291 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 292 O << RegName << ", "; 293 printOperand(MI, OpNo, O); 294 return false; 295 } 296 case 'U': // Print 'u' for update form. 297 case 'X': // Print 'x' for indexed form. 298 { 299 // FIXME: Currently for PowerPC memory operands are always loaded 300 // into a register, so we never get an update or indexed form. 301 // This is bad even for offset forms, since even if we know we 302 // have a value in -16(r1), we will generate a load into r<n> 303 // and then load from 0(r<n>). Until that issue is fixed, 304 // tolerate 'U' and 'X' but don't output anything. 305 assert(MI->getOperand(OpNo).isReg()); 306 return false; 307 } 308 } 309 } 310 311 assert(MI->getOperand(OpNo).isReg()); 312 O << "0("; 313 printOperand(MI, OpNo, O); 314 O << ")"; 315 return false; 316 } 317 318 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 319 /// exists for it. If not, create one. Then return a symbol that references 320 /// the TOC entry. 321 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 322 MCSymbol *&TOCEntry = TOC[Sym]; 323 if (!TOCEntry) 324 TOCEntry = createTempSymbol("C"); 325 return TOCEntry; 326 } 327 328 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 329 emitStackMaps(SM); 330 } 331 332 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 333 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 334 335 SM.recordStackMap(MI); 336 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 337 338 // Scan ahead to trim the shadow. 339 const MachineBasicBlock &MBB = *MI.getParent(); 340 MachineBasicBlock::const_iterator MII(MI); 341 ++MII; 342 while (NumNOPBytes > 0) { 343 if (MII == MBB.end() || MII->isCall() || 344 MII->getOpcode() == PPC::DBG_VALUE || 345 MII->getOpcode() == TargetOpcode::PATCHPOINT || 346 MII->getOpcode() == TargetOpcode::STACKMAP) 347 break; 348 ++MII; 349 NumNOPBytes -= 4; 350 } 351 352 // Emit nops. 353 for (unsigned i = 0; i < NumNOPBytes; i += 4) 354 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 355 } 356 357 // Lower a patchpoint of the form: 358 // [<def>], <id>, <numBytes>, <target>, <numArgs> 359 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 360 SM.recordPatchPoint(MI); 361 PatchPointOpers Opers(&MI); 362 363 unsigned EncodedBytes = 0; 364 const MachineOperand &CalleeMO = Opers.getCallTarget(); 365 366 if (CalleeMO.isImm()) { 367 int64_t CallTarget = CalleeMO.getImm(); 368 if (CallTarget) { 369 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 370 "High 16 bits of call target should be zero."); 371 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 372 EncodedBytes = 0; 373 // Materialize the jump address: 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 375 .addReg(ScratchReg) 376 .addImm((CallTarget >> 32) & 0xFFFF)); 377 ++EncodedBytes; 378 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 379 .addReg(ScratchReg) 380 .addReg(ScratchReg) 381 .addImm(32).addImm(16)); 382 ++EncodedBytes; 383 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 384 .addReg(ScratchReg) 385 .addReg(ScratchReg) 386 .addImm((CallTarget >> 16) & 0xFFFF)); 387 ++EncodedBytes; 388 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 389 .addReg(ScratchReg) 390 .addReg(ScratchReg) 391 .addImm(CallTarget & 0xFFFF)); 392 393 // Save the current TOC pointer before the remote call. 394 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 395 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 396 .addReg(PPC::X2) 397 .addImm(TOCSaveOffset) 398 .addReg(PPC::X1)); 399 ++EncodedBytes; 400 401 // If we're on ELFv1, then we need to load the actual function pointer 402 // from the function descriptor. 403 if (!Subtarget->isELFv2ABI()) { 404 // Load the new TOC pointer and the function address, but not r11 405 // (needing this is rare, and loading it here would prevent passing it 406 // via a 'nest' parameter. 407 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 408 .addReg(PPC::X2) 409 .addImm(8) 410 .addReg(ScratchReg)); 411 ++EncodedBytes; 412 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 413 .addReg(ScratchReg) 414 .addImm(0) 415 .addReg(ScratchReg)); 416 ++EncodedBytes; 417 } 418 419 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 420 .addReg(ScratchReg)); 421 ++EncodedBytes; 422 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 423 ++EncodedBytes; 424 425 // Restore the TOC pointer after the call. 426 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 427 .addReg(PPC::X2) 428 .addImm(TOCSaveOffset) 429 .addReg(PPC::X1)); 430 ++EncodedBytes; 431 } 432 } else if (CalleeMO.isGlobal()) { 433 const GlobalValue *GValue = CalleeMO.getGlobal(); 434 MCSymbol *MOSymbol = getSymbol(GValue); 435 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 436 437 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 438 .addExpr(SymVar)); 439 EncodedBytes += 2; 440 } 441 442 // Each instruction is 4 bytes. 443 EncodedBytes *= 4; 444 445 // Emit padding. 446 unsigned NumBytes = Opers.getNumPatchBytes(); 447 assert(NumBytes >= EncodedBytes && 448 "Patchpoint can't request size less than the length of a call."); 449 assert((NumBytes - EncodedBytes) % 4 == 0 && 450 "Invalid number of NOP bytes requested!"); 451 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 453 } 454 455 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 456 /// call to __tls_get_addr to the current output stream. 457 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 458 MCSymbolRefExpr::VariantKind VK) { 459 StringRef Name = "__tls_get_addr"; 460 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 461 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 462 463 assert(MI->getOperand(0).isReg() && 464 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 465 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 466 "GETtls[ld]ADDR[32] must define GPR3"); 467 assert(MI->getOperand(1).isReg() && 468 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 469 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 470 "GETtls[ld]ADDR[32] must read GPR3"); 471 472 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 473 isPositionIndependent()) 474 Kind = MCSymbolRefExpr::VK_PLT; 475 const MCExpr *TlsRef = 476 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 477 478 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 479 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt()) 480 TlsRef = MCBinaryExpr::createAdd(TlsRef, 481 MCConstantExpr::create(32768, OutContext), 482 OutContext); 483 const MachineOperand &MO = MI->getOperand(2); 484 const GlobalValue *GValue = MO.getGlobal(); 485 MCSymbol *MOSymbol = getSymbol(GValue); 486 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 487 EmitToStreamer(*OutStreamer, 488 MCInstBuilder(Subtarget->isPPC64() ? 489 PPC::BL8_NOP_TLS : PPC::BL_TLS) 490 .addExpr(TlsRef) 491 .addExpr(SymVar)); 492 } 493 494 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 495 /// the current output stream. 496 /// 497 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 498 MCInst TmpInst; 499 bool isPPC64 = Subtarget->isPPC64(); 500 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 501 const Module *M = MF->getFunction().getParent(); 502 PICLevel::Level PL = M->getPICLevel(); 503 504 #ifndef NDEBUG 505 // Validate that SPE and FPU are mutually exclusive in codegen 506 if (!MI->isInlineAsm()) { 507 for (const MachineOperand &MO: MI->operands()) { 508 if (MO.isReg()) { 509 unsigned Reg = MO.getReg(); 510 if (Subtarget->hasSPE()) { 511 if (PPC::F4RCRegClass.contains(Reg) || 512 PPC::F8RCRegClass.contains(Reg) || 513 PPC::QBRCRegClass.contains(Reg) || 514 PPC::QFRCRegClass.contains(Reg) || 515 PPC::QSRCRegClass.contains(Reg) || 516 PPC::VFRCRegClass.contains(Reg) || 517 PPC::VRRCRegClass.contains(Reg) || 518 PPC::VSFRCRegClass.contains(Reg) || 519 PPC::VSSRCRegClass.contains(Reg) 520 ) 521 llvm_unreachable("SPE targets cannot have FPRegs!"); 522 } else { 523 if (PPC::SPERCRegClass.contains(Reg)) 524 llvm_unreachable("SPE register found in FPU-targeted code!"); 525 } 526 } 527 } 528 } 529 #endif 530 // Lower multi-instruction pseudo operations. 531 switch (MI->getOpcode()) { 532 default: break; 533 case TargetOpcode::DBG_VALUE: 534 llvm_unreachable("Should be handled target independently"); 535 case TargetOpcode::STACKMAP: 536 return LowerSTACKMAP(SM, *MI); 537 case TargetOpcode::PATCHPOINT: 538 return LowerPATCHPOINT(SM, *MI); 539 540 case PPC::MoveGOTtoLR: { 541 // Transform %lr = MoveGOTtoLR 542 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 543 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 544 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 545 // blrl 546 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 547 MCSymbol *GOTSymbol = 548 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 549 const MCExpr *OffsExpr = 550 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 551 MCSymbolRefExpr::VK_PPC_LOCAL, 552 OutContext), 553 MCConstantExpr::create(4, OutContext), 554 OutContext); 555 556 // Emit the 'bl'. 557 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 558 return; 559 } 560 case PPC::MovePCtoLR: 561 case PPC::MovePCtoLR8: { 562 // Transform %lr = MovePCtoLR 563 // Into this, where the label is the PIC base: 564 // bl L1$pb 565 // L1$pb: 566 MCSymbol *PICBase = MF->getPICBaseSymbol(); 567 568 // Emit the 'bl'. 569 EmitToStreamer(*OutStreamer, 570 MCInstBuilder(PPC::BL) 571 // FIXME: We would like an efficient form for this, so we 572 // don't have to do a lot of extra uniquing. 573 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 574 575 // Emit the label. 576 OutStreamer->EmitLabel(PICBase); 577 return; 578 } 579 case PPC::UpdateGBR: { 580 // Transform %rd = UpdateGBR(%rt, %ri) 581 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 582 // add %rd, %rt, %ri 583 // or into (if secure plt mode is on): 584 // addis r30, r30, .LTOC - .L0$pb@ha 585 // addi r30, r30, .LTOC - .L0$pb@l 586 // Get the offset from the GOT Base Register to the GOT 587 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 588 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 589 unsigned PICR = TmpInst.getOperand(0).getReg(); 590 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 591 const MCExpr *PB = 592 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 593 OutContext); 594 595 const MCExpr *LTOCDeltaExpr = 596 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 597 PB, OutContext); 598 599 const MCExpr *LTOCDeltaHi = 600 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 601 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 602 .addReg(PICR) 603 .addReg(PICR) 604 .addExpr(LTOCDeltaHi)); 605 606 const MCExpr *LTOCDeltaLo = 607 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 608 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 609 .addReg(PICR) 610 .addReg(PICR) 611 .addExpr(LTOCDeltaLo)); 612 return; 613 } else { 614 MCSymbol *PICOffset = 615 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 616 TmpInst.setOpcode(PPC::LWZ); 617 const MCExpr *Exp = 618 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 619 const MCExpr *PB = 620 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 621 MCSymbolRefExpr::VK_None, 622 OutContext); 623 const MCOperand TR = TmpInst.getOperand(1); 624 const MCOperand PICR = TmpInst.getOperand(0); 625 626 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 627 TmpInst.getOperand(1) = 628 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 629 TmpInst.getOperand(0) = TR; 630 TmpInst.getOperand(2) = PICR; 631 EmitToStreamer(*OutStreamer, TmpInst); 632 633 TmpInst.setOpcode(PPC::ADD4); 634 TmpInst.getOperand(0) = PICR; 635 TmpInst.getOperand(1) = TR; 636 TmpInst.getOperand(2) = PICR; 637 EmitToStreamer(*OutStreamer, TmpInst); 638 return; 639 } 640 } 641 case PPC::LWZtoc: { 642 // Transform %r3 = LWZtoc @min1, %r2 643 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 644 645 // Change the opcode to LWZ, and the global address operand to be a 646 // reference to the GOT entry we will synthesize later. 647 TmpInst.setOpcode(PPC::LWZ); 648 const MachineOperand &MO = MI->getOperand(1); 649 650 // Map symbol -> label of TOC entry 651 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 652 MCSymbol *MOSymbol = nullptr; 653 if (MO.isGlobal()) 654 MOSymbol = getSymbol(MO.getGlobal()); 655 else if (MO.isCPI()) 656 MOSymbol = GetCPISymbol(MO.getIndex()); 657 else if (MO.isJTI()) 658 MOSymbol = GetJTISymbol(MO.getIndex()); 659 else if (MO.isBlockAddress()) 660 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 661 662 if (PL == PICLevel::SmallPIC) { 663 const MCExpr *Exp = 664 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 665 OutContext); 666 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 667 } else { 668 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 669 670 const MCExpr *Exp = 671 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 672 OutContext); 673 const MCExpr *PB = 674 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 675 OutContext); 676 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 677 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 678 } 679 EmitToStreamer(*OutStreamer, TmpInst); 680 return; 681 } 682 case PPC::LDtocJTI: 683 case PPC::LDtocCPT: 684 case PPC::LDtocBA: 685 case PPC::LDtoc: { 686 // Transform %x3 = LDtoc @min1, %x2 687 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 688 689 // Change the opcode to LD, and the global address operand to be a 690 // reference to the TOC entry we will synthesize later. 691 TmpInst.setOpcode(PPC::LD); 692 const MachineOperand &MO = MI->getOperand(1); 693 694 // Map symbol -> label of TOC entry 695 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 696 MCSymbol *MOSymbol = nullptr; 697 if (MO.isGlobal()) 698 MOSymbol = getSymbol(MO.getGlobal()); 699 else if (MO.isCPI()) 700 MOSymbol = GetCPISymbol(MO.getIndex()); 701 else if (MO.isJTI()) 702 MOSymbol = GetJTISymbol(MO.getIndex()); 703 else if (MO.isBlockAddress()) 704 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 705 706 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 707 708 const MCExpr *Exp = 709 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 710 OutContext); 711 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 712 EmitToStreamer(*OutStreamer, TmpInst); 713 return; 714 } 715 716 case PPC::ADDIStocHA: { 717 // Transform %xd = ADDIStocHA %x2, @sym 718 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 719 720 // Change the opcode to ADDIS8. If the global address is external, has 721 // common linkage, is a non-local function address, or is a jump table 722 // address, then generate a TOC entry and reference that. Otherwise 723 // reference the symbol directly. 724 TmpInst.setOpcode(PPC::ADDIS8); 725 const MachineOperand &MO = MI->getOperand(2); 726 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 727 MO.isBlockAddress()) && 728 "Invalid operand for ADDIStocHA!"); 729 MCSymbol *MOSymbol = nullptr; 730 bool GlobalToc = false; 731 732 if (MO.isGlobal()) { 733 const GlobalValue *GV = MO.getGlobal(); 734 MOSymbol = getSymbol(GV); 735 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 736 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 737 } else if (MO.isCPI()) { 738 MOSymbol = GetCPISymbol(MO.getIndex()); 739 } else if (MO.isJTI()) { 740 MOSymbol = GetJTISymbol(MO.getIndex()); 741 } else if (MO.isBlockAddress()) { 742 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 743 } 744 745 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 746 TM.getCodeModel() == CodeModel::Large) 747 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 748 749 const MCExpr *Exp = 750 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 751 OutContext); 752 753 if (!MO.isJTI() && MO.getOffset()) 754 Exp = MCBinaryExpr::createAdd(Exp, 755 MCConstantExpr::create(MO.getOffset(), 756 OutContext), 757 OutContext); 758 759 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 760 EmitToStreamer(*OutStreamer, TmpInst); 761 return; 762 } 763 case PPC::LDtocL: { 764 // Transform %xd = LDtocL @sym, %xs 765 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 766 767 // Change the opcode to LD. If the global address is external, has 768 // common linkage, or is a jump table address, then reference the 769 // associated TOC entry. Otherwise reference the symbol directly. 770 TmpInst.setOpcode(PPC::LD); 771 const MachineOperand &MO = MI->getOperand(1); 772 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 773 MO.isBlockAddress()) && 774 "Invalid operand for LDtocL!"); 775 MCSymbol *MOSymbol = nullptr; 776 777 if (MO.isJTI()) 778 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 779 else if (MO.isBlockAddress()) { 780 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 781 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 782 } 783 else if (MO.isCPI()) { 784 MOSymbol = GetCPISymbol(MO.getIndex()); 785 if (TM.getCodeModel() == CodeModel::Large) 786 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 787 } 788 else if (MO.isGlobal()) { 789 const GlobalValue *GV = MO.getGlobal(); 790 MOSymbol = getSymbol(GV); 791 LLVM_DEBUG( 792 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 793 assert((GVFlags & PPCII::MO_NLP_FLAG) && 794 "LDtocL used on symbol that could be accessed directly is " 795 "invalid. Must match ADDIStocHA.")); 796 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 797 } 798 799 const MCExpr *Exp = 800 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 801 OutContext); 802 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 803 EmitToStreamer(*OutStreamer, TmpInst); 804 return; 805 } 806 case PPC::ADDItocL: { 807 // Transform %xd = ADDItocL %xs, @sym 808 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 809 810 // Change the opcode to ADDI8. If the global address is external, then 811 // generate a TOC entry and reference that. Otherwise reference the 812 // symbol directly. 813 TmpInst.setOpcode(PPC::ADDI8); 814 const MachineOperand &MO = MI->getOperand(2); 815 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 816 MCSymbol *MOSymbol = nullptr; 817 818 if (MO.isGlobal()) { 819 const GlobalValue *GV = MO.getGlobal(); 820 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 821 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 822 "Interposable definitions must use indirect access.")); 823 MOSymbol = getSymbol(GV); 824 } else if (MO.isCPI()) { 825 MOSymbol = GetCPISymbol(MO.getIndex()); 826 } 827 828 const MCExpr *Exp = 829 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 830 OutContext); 831 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 832 EmitToStreamer(*OutStreamer, TmpInst); 833 return; 834 } 835 case PPC::ADDISgotTprelHA: { 836 // Transform: %xd = ADDISgotTprelHA %x2, @sym 837 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 838 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 839 const MachineOperand &MO = MI->getOperand(2); 840 const GlobalValue *GValue = MO.getGlobal(); 841 MCSymbol *MOSymbol = getSymbol(GValue); 842 const MCExpr *SymGotTprel = 843 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 844 OutContext); 845 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 846 .addReg(MI->getOperand(0).getReg()) 847 .addReg(MI->getOperand(1).getReg()) 848 .addExpr(SymGotTprel)); 849 return; 850 } 851 case PPC::LDgotTprelL: 852 case PPC::LDgotTprelL32: { 853 // Transform %xd = LDgotTprelL @sym, %xs 854 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 855 856 // Change the opcode to LD. 857 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 858 const MachineOperand &MO = MI->getOperand(1); 859 const GlobalValue *GValue = MO.getGlobal(); 860 MCSymbol *MOSymbol = getSymbol(GValue); 861 const MCExpr *Exp = 862 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 863 OutContext); 864 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 865 EmitToStreamer(*OutStreamer, TmpInst); 866 return; 867 } 868 869 case PPC::PPC32PICGOT: { 870 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 871 MCSymbol *GOTRef = OutContext.createTempSymbol(); 872 MCSymbol *NextInstr = OutContext.createTempSymbol(); 873 874 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 875 // FIXME: We would like an efficient form for this, so we don't have to do 876 // a lot of extra uniquing. 877 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 878 const MCExpr *OffsExpr = 879 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 880 MCSymbolRefExpr::create(GOTRef, OutContext), 881 OutContext); 882 OutStreamer->EmitLabel(GOTRef); 883 OutStreamer->EmitValue(OffsExpr, 4); 884 OutStreamer->EmitLabel(NextInstr); 885 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 886 .addReg(MI->getOperand(0).getReg())); 887 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 888 .addReg(MI->getOperand(1).getReg()) 889 .addImm(0) 890 .addReg(MI->getOperand(0).getReg())); 891 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 892 .addReg(MI->getOperand(0).getReg()) 893 .addReg(MI->getOperand(1).getReg()) 894 .addReg(MI->getOperand(0).getReg())); 895 return; 896 } 897 case PPC::PPC32GOT: { 898 MCSymbol *GOTSymbol = 899 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 900 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 901 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 902 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 903 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 904 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 905 .addReg(MI->getOperand(0).getReg()) 906 .addExpr(SymGotTlsL)); 907 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 908 .addReg(MI->getOperand(0).getReg()) 909 .addReg(MI->getOperand(0).getReg()) 910 .addExpr(SymGotTlsHA)); 911 return; 912 } 913 case PPC::ADDIStlsgdHA: { 914 // Transform: %xd = ADDIStlsgdHA %x2, @sym 915 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 916 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 917 const MachineOperand &MO = MI->getOperand(2); 918 const GlobalValue *GValue = MO.getGlobal(); 919 MCSymbol *MOSymbol = getSymbol(GValue); 920 const MCExpr *SymGotTlsGD = 921 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 922 OutContext); 923 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 924 .addReg(MI->getOperand(0).getReg()) 925 .addReg(MI->getOperand(1).getReg()) 926 .addExpr(SymGotTlsGD)); 927 return; 928 } 929 case PPC::ADDItlsgdL: 930 // Transform: %xd = ADDItlsgdL %xs, @sym 931 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 932 case PPC::ADDItlsgdL32: { 933 // Transform: %rd = ADDItlsgdL32 %rs, @sym 934 // Into: %rd = ADDI %rs, sym@got@tlsgd 935 const MachineOperand &MO = MI->getOperand(2); 936 const GlobalValue *GValue = MO.getGlobal(); 937 MCSymbol *MOSymbol = getSymbol(GValue); 938 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 939 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 940 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 941 OutContext); 942 EmitToStreamer(*OutStreamer, 943 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 944 .addReg(MI->getOperand(0).getReg()) 945 .addReg(MI->getOperand(1).getReg()) 946 .addExpr(SymGotTlsGD)); 947 return; 948 } 949 case PPC::GETtlsADDR: 950 // Transform: %x3 = GETtlsADDR %x3, @sym 951 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 952 case PPC::GETtlsADDR32: { 953 // Transform: %r3 = GETtlsADDR32 %r3, @sym 954 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 955 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 956 return; 957 } 958 case PPC::ADDIStlsldHA: { 959 // Transform: %xd = ADDIStlsldHA %x2, @sym 960 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 961 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 962 const MachineOperand &MO = MI->getOperand(2); 963 const GlobalValue *GValue = MO.getGlobal(); 964 MCSymbol *MOSymbol = getSymbol(GValue); 965 const MCExpr *SymGotTlsLD = 966 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 967 OutContext); 968 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 969 .addReg(MI->getOperand(0).getReg()) 970 .addReg(MI->getOperand(1).getReg()) 971 .addExpr(SymGotTlsLD)); 972 return; 973 } 974 case PPC::ADDItlsldL: 975 // Transform: %xd = ADDItlsldL %xs, @sym 976 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 977 case PPC::ADDItlsldL32: { 978 // Transform: %rd = ADDItlsldL32 %rs, @sym 979 // Into: %rd = ADDI %rs, sym@got@tlsld 980 const MachineOperand &MO = MI->getOperand(2); 981 const GlobalValue *GValue = MO.getGlobal(); 982 MCSymbol *MOSymbol = getSymbol(GValue); 983 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 984 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 985 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 986 OutContext); 987 EmitToStreamer(*OutStreamer, 988 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 989 .addReg(MI->getOperand(0).getReg()) 990 .addReg(MI->getOperand(1).getReg()) 991 .addExpr(SymGotTlsLD)); 992 return; 993 } 994 case PPC::GETtlsldADDR: 995 // Transform: %x3 = GETtlsldADDR %x3, @sym 996 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 997 case PPC::GETtlsldADDR32: { 998 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 999 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1000 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1001 return; 1002 } 1003 case PPC::ADDISdtprelHA: 1004 // Transform: %xd = ADDISdtprelHA %xs, @sym 1005 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1006 case PPC::ADDISdtprelHA32: { 1007 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1008 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1009 const MachineOperand &MO = MI->getOperand(2); 1010 const GlobalValue *GValue = MO.getGlobal(); 1011 MCSymbol *MOSymbol = getSymbol(GValue); 1012 const MCExpr *SymDtprel = 1013 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1014 OutContext); 1015 EmitToStreamer( 1016 *OutStreamer, 1017 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1018 .addReg(MI->getOperand(0).getReg()) 1019 .addReg(MI->getOperand(1).getReg()) 1020 .addExpr(SymDtprel)); 1021 return; 1022 } 1023 case PPC::ADDIdtprelL: 1024 // Transform: %xd = ADDIdtprelL %xs, @sym 1025 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1026 case PPC::ADDIdtprelL32: { 1027 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1028 // Into: %rd = ADDI %rs, sym@dtprel@l 1029 const MachineOperand &MO = MI->getOperand(2); 1030 const GlobalValue *GValue = MO.getGlobal(); 1031 MCSymbol *MOSymbol = getSymbol(GValue); 1032 const MCExpr *SymDtprel = 1033 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1034 OutContext); 1035 EmitToStreamer(*OutStreamer, 1036 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1037 .addReg(MI->getOperand(0).getReg()) 1038 .addReg(MI->getOperand(1).getReg()) 1039 .addExpr(SymDtprel)); 1040 return; 1041 } 1042 case PPC::MFOCRF: 1043 case PPC::MFOCRF8: 1044 if (!Subtarget->hasMFOCRF()) { 1045 // Transform: %r3 = MFOCRF %cr7 1046 // Into: %r3 = MFCR ;; cr7 1047 unsigned NewOpcode = 1048 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1049 OutStreamer->AddComment(PPCInstPrinter:: 1050 getRegisterName(MI->getOperand(1).getReg())); 1051 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1052 .addReg(MI->getOperand(0).getReg())); 1053 return; 1054 } 1055 break; 1056 case PPC::MTOCRF: 1057 case PPC::MTOCRF8: 1058 if (!Subtarget->hasMFOCRF()) { 1059 // Transform: %cr7 = MTOCRF %r3 1060 // Into: MTCRF mask, %r3 ;; cr7 1061 unsigned NewOpcode = 1062 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1063 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1064 ->getEncodingValue(MI->getOperand(0).getReg()); 1065 OutStreamer->AddComment(PPCInstPrinter:: 1066 getRegisterName(MI->getOperand(0).getReg())); 1067 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1068 .addImm(Mask) 1069 .addReg(MI->getOperand(1).getReg())); 1070 return; 1071 } 1072 break; 1073 case PPC::LD: 1074 case PPC::STD: 1075 case PPC::LWA_32: 1076 case PPC::LWA: { 1077 // Verify alignment is legal, so we don't create relocations 1078 // that can't be supported. 1079 // FIXME: This test is currently disabled for Darwin. The test 1080 // suite shows a handful of test cases that fail this check for 1081 // Darwin. Those need to be investigated before this sanity test 1082 // can be enabled for those subtargets. 1083 if (!Subtarget->isDarwin()) { 1084 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1085 const MachineOperand &MO = MI->getOperand(OpNum); 1086 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1087 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1088 } 1089 // Now process the instruction normally. 1090 break; 1091 } 1092 } 1093 1094 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1095 EmitToStreamer(*OutStreamer, TmpInst); 1096 } 1097 1098 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1099 if (!Subtarget->isPPC64()) 1100 return PPCAsmPrinter::EmitInstruction(MI); 1101 1102 switch (MI->getOpcode()) { 1103 default: 1104 return PPCAsmPrinter::EmitInstruction(MI); 1105 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1106 // .begin: 1107 // b .end # lis 0, FuncId[16..32] 1108 // nop # li 0, FuncId[0..15] 1109 // std 0, -8(1) 1110 // mflr 0 1111 // bl __xray_FunctionEntry 1112 // mtlr 0 1113 // .end: 1114 // 1115 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1116 // of instructions change. 1117 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1118 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1119 OutStreamer->EmitLabel(BeginOfSled); 1120 EmitToStreamer(*OutStreamer, 1121 MCInstBuilder(PPC::B).addExpr( 1122 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1123 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1124 EmitToStreamer( 1125 *OutStreamer, 1126 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1127 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1128 EmitToStreamer(*OutStreamer, 1129 MCInstBuilder(PPC::BL8_NOP) 1130 .addExpr(MCSymbolRefExpr::create( 1131 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1132 OutContext))); 1133 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1134 OutStreamer->EmitLabel(EndOfSled); 1135 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1136 break; 1137 } 1138 case TargetOpcode::PATCHABLE_RET: { 1139 unsigned RetOpcode = MI->getOperand(0).getImm(); 1140 MCInst RetInst; 1141 RetInst.setOpcode(RetOpcode); 1142 for (const auto &MO : 1143 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1144 MCOperand MCOp; 1145 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1146 RetInst.addOperand(MCOp); 1147 } 1148 1149 bool IsConditional; 1150 if (RetOpcode == PPC::BCCLR) { 1151 IsConditional = true; 1152 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1153 RetOpcode == PPC::TCRETURNai8) { 1154 break; 1155 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1156 IsConditional = false; 1157 } else { 1158 EmitToStreamer(*OutStreamer, RetInst); 1159 break; 1160 } 1161 1162 MCSymbol *FallthroughLabel; 1163 if (IsConditional) { 1164 // Before: 1165 // bgtlr cr0 1166 // 1167 // After: 1168 // ble cr0, .end 1169 // .p2align 3 1170 // .begin: 1171 // blr # lis 0, FuncId[16..32] 1172 // nop # li 0, FuncId[0..15] 1173 // std 0, -8(1) 1174 // mflr 0 1175 // bl __xray_FunctionExit 1176 // mtlr 0 1177 // blr 1178 // .end: 1179 // 1180 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1181 // of instructions change. 1182 FallthroughLabel = OutContext.createTempSymbol(); 1183 EmitToStreamer( 1184 *OutStreamer, 1185 MCInstBuilder(PPC::BCC) 1186 .addImm(PPC::InvertPredicate( 1187 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1188 .addReg(MI->getOperand(2).getReg()) 1189 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1190 RetInst = MCInst(); 1191 RetInst.setOpcode(PPC::BLR8); 1192 } 1193 // .p2align 3 1194 // .begin: 1195 // b(lr)? # lis 0, FuncId[16..32] 1196 // nop # li 0, FuncId[0..15] 1197 // std 0, -8(1) 1198 // mflr 0 1199 // bl __xray_FunctionExit 1200 // mtlr 0 1201 // b(lr)? 1202 // 1203 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1204 // of instructions change. 1205 OutStreamer->EmitCodeAlignment(8); 1206 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1207 OutStreamer->EmitLabel(BeginOfSled); 1208 EmitToStreamer(*OutStreamer, RetInst); 1209 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1210 EmitToStreamer( 1211 *OutStreamer, 1212 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1213 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1214 EmitToStreamer(*OutStreamer, 1215 MCInstBuilder(PPC::BL8_NOP) 1216 .addExpr(MCSymbolRefExpr::create( 1217 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1218 OutContext))); 1219 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1220 EmitToStreamer(*OutStreamer, RetInst); 1221 if (IsConditional) 1222 OutStreamer->EmitLabel(FallthroughLabel); 1223 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1224 break; 1225 } 1226 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1227 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1228 case TargetOpcode::PATCHABLE_TAIL_CALL: 1229 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1230 // normal function exit from a tail exit. 1231 llvm_unreachable("Tail call is handled in the normal case. See comments " 1232 "around this assert."); 1233 } 1234 } 1235 1236 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1237 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1238 PPCTargetStreamer *TS = 1239 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1240 1241 if (TS) 1242 TS->emitAbiVersion(2); 1243 } 1244 1245 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1246 !isPositionIndependent()) 1247 return AsmPrinter::EmitStartOfAsmFile(M); 1248 1249 if (M.getPICLevel() == PICLevel::SmallPIC) 1250 return AsmPrinter::EmitStartOfAsmFile(M); 1251 1252 OutStreamer->SwitchSection(OutContext.getELFSection( 1253 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1254 1255 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1256 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1257 1258 OutStreamer->EmitLabel(CurrentPos); 1259 1260 // The GOT pointer points to the middle of the GOT, in order to reference the 1261 // entire 64kB range. 0x8000 is the midpoint. 1262 const MCExpr *tocExpr = 1263 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1264 MCConstantExpr::create(0x8000, OutContext), 1265 OutContext); 1266 1267 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1268 1269 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1270 } 1271 1272 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1273 // linux/ppc32 - Normal entry label. 1274 if (!Subtarget->isPPC64() && 1275 (!isPositionIndependent() || 1276 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1277 return AsmPrinter::EmitFunctionEntryLabel(); 1278 1279 if (!Subtarget->isPPC64()) { 1280 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1281 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1282 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1283 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1284 OutStreamer->EmitLabel(RelocSymbol); 1285 1286 const MCExpr *OffsExpr = 1287 MCBinaryExpr::createSub( 1288 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1289 OutContext), 1290 MCSymbolRefExpr::create(PICBase, OutContext), 1291 OutContext); 1292 OutStreamer->EmitValue(OffsExpr, 4); 1293 OutStreamer->EmitLabel(CurrentFnSym); 1294 return; 1295 } else 1296 return AsmPrinter::EmitFunctionEntryLabel(); 1297 } 1298 1299 // ELFv2 ABI - Normal entry label. 1300 if (Subtarget->isELFv2ABI()) { 1301 // In the Large code model, we allow arbitrary displacements between 1302 // the text section and its associated TOC section. We place the 1303 // full 8-byte offset to the TOC in memory immediately preceding 1304 // the function global entry point. 1305 if (TM.getCodeModel() == CodeModel::Large 1306 && !MF->getRegInfo().use_empty(PPC::X2)) { 1307 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1308 1309 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1310 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1311 const MCExpr *TOCDeltaExpr = 1312 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1313 MCSymbolRefExpr::create(GlobalEPSymbol, 1314 OutContext), 1315 OutContext); 1316 1317 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1318 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1319 } 1320 return AsmPrinter::EmitFunctionEntryLabel(); 1321 } 1322 1323 // Emit an official procedure descriptor. 1324 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1325 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1326 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1327 OutStreamer->SwitchSection(Section); 1328 OutStreamer->EmitLabel(CurrentFnSym); 1329 OutStreamer->EmitValueToAlignment(8); 1330 MCSymbol *Symbol1 = CurrentFnSymForSize; 1331 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1332 // entry point. 1333 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1334 8 /*size*/); 1335 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1336 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1337 OutStreamer->EmitValue( 1338 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1339 8/*size*/); 1340 // Emit a null environment pointer. 1341 OutStreamer->EmitIntValue(0, 8 /* size */); 1342 OutStreamer->SwitchSection(Current.first, Current.second); 1343 } 1344 1345 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1346 const DataLayout &DL = getDataLayout(); 1347 1348 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1349 1350 PPCTargetStreamer &TS = 1351 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1352 1353 if (!TOC.empty()) { 1354 MCSectionELF *Section; 1355 1356 if (isPPC64) 1357 Section = OutStreamer->getContext().getELFSection( 1358 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1359 else 1360 Section = OutStreamer->getContext().getELFSection( 1361 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1362 OutStreamer->SwitchSection(Section); 1363 1364 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1365 E = TOC.end(); I != E; ++I) { 1366 OutStreamer->EmitLabel(I->second); 1367 MCSymbol *S = I->first; 1368 if (isPPC64) { 1369 TS.emitTCEntry(*S); 1370 } else { 1371 OutStreamer->EmitValueToAlignment(4); 1372 OutStreamer->EmitSymbolValue(S, 4); 1373 } 1374 } 1375 } 1376 1377 return AsmPrinter::doFinalization(M); 1378 } 1379 1380 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1381 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1382 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1383 // provide two entry points. The ABI guarantees that when calling the 1384 // local entry point, r2 is set up by the caller to contain the TOC base 1385 // for this function, and when calling the global entry point, r12 is set 1386 // up by the caller to hold the address of the global entry point. We 1387 // thus emit a prefix sequence along the following lines: 1388 // 1389 // func: 1390 // .Lfunc_gepNN: 1391 // # global entry point 1392 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1393 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1394 // .Lfunc_lepNN: 1395 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1396 // # local entry point, followed by function body 1397 // 1398 // For the Large code model, we create 1399 // 1400 // .Lfunc_tocNN: 1401 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1402 // func: 1403 // .Lfunc_gepNN: 1404 // # global entry point 1405 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1406 // add r2,r2,r12 1407 // .Lfunc_lepNN: 1408 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1409 // # local entry point, followed by function body 1410 // 1411 // This ensures we have r2 set up correctly while executing the function 1412 // body, no matter which entry point is called. 1413 if (Subtarget->isELFv2ABI() 1414 // Only do all that if the function uses r2 in the first place. 1415 && !MF->getRegInfo().use_empty(PPC::X2)) { 1416 // Note: The logic here must be synchronized with the code in the 1417 // branch-selection pass which sets the offset of the first block in the 1418 // function. This matters because it affects the alignment. 1419 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1420 1421 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1422 OutStreamer->EmitLabel(GlobalEntryLabel); 1423 const MCSymbolRefExpr *GlobalEntryLabelExp = 1424 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1425 1426 if (TM.getCodeModel() != CodeModel::Large) { 1427 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1428 const MCExpr *TOCDeltaExpr = 1429 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1430 GlobalEntryLabelExp, OutContext); 1431 1432 const MCExpr *TOCDeltaHi = 1433 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1434 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1435 .addReg(PPC::X2) 1436 .addReg(PPC::X12) 1437 .addExpr(TOCDeltaHi)); 1438 1439 const MCExpr *TOCDeltaLo = 1440 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1441 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1442 .addReg(PPC::X2) 1443 .addReg(PPC::X2) 1444 .addExpr(TOCDeltaLo)); 1445 } else { 1446 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1447 const MCExpr *TOCOffsetDeltaExpr = 1448 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1449 GlobalEntryLabelExp, OutContext); 1450 1451 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1452 .addReg(PPC::X2) 1453 .addExpr(TOCOffsetDeltaExpr) 1454 .addReg(PPC::X12)); 1455 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1456 .addReg(PPC::X2) 1457 .addReg(PPC::X2) 1458 .addReg(PPC::X12)); 1459 } 1460 1461 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1462 OutStreamer->EmitLabel(LocalEntryLabel); 1463 const MCSymbolRefExpr *LocalEntryLabelExp = 1464 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1465 const MCExpr *LocalOffsetExp = 1466 MCBinaryExpr::createSub(LocalEntryLabelExp, 1467 GlobalEntryLabelExp, OutContext); 1468 1469 PPCTargetStreamer *TS = 1470 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1471 1472 if (TS) 1473 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1474 } 1475 } 1476 1477 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1478 /// directive. 1479 /// 1480 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1481 // Only the 64-bit target requires a traceback table. For now, 1482 // we only emit the word of zeroes that GDB requires to find 1483 // the end of the function, and zeroes for the eight-byte 1484 // mandatory fields. 1485 // FIXME: We should fill in the eight-byte mandatory fields as described in 1486 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1487 // currently make use of these fields). 1488 if (Subtarget->isPPC64()) { 1489 OutStreamer->EmitIntValue(0, 4/*size*/); 1490 OutStreamer->EmitIntValue(0, 8/*size*/); 1491 } 1492 } 1493 1494 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1495 static const char *const CPUDirectives[] = { 1496 "", 1497 "ppc", 1498 "ppc440", 1499 "ppc601", 1500 "ppc602", 1501 "ppc603", 1502 "ppc7400", 1503 "ppc750", 1504 "ppc970", 1505 "ppcA2", 1506 "ppce500", 1507 "ppce500mc", 1508 "ppce5500", 1509 "power3", 1510 "power4", 1511 "power5", 1512 "power5x", 1513 "power6", 1514 "power6x", 1515 "power7", 1516 // FIXME: why is power8 missing here? 1517 "ppc64", 1518 "ppc64le", 1519 "power9" 1520 }; 1521 1522 // Get the numerically largest directive. 1523 // FIXME: How should we merge darwin directives? 1524 unsigned Directive = PPC::DIR_NONE; 1525 for (const Function &F : M) { 1526 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1527 unsigned FDir = STI.getDarwinDirective(); 1528 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1529 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1530 Directive = PPC::DIR_970; 1531 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1532 Directive = PPC::DIR_7400; 1533 if (STI.isPPC64() && Directive < PPC::DIR_64) 1534 Directive = PPC::DIR_64; 1535 } 1536 1537 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1538 1539 assert(Directive < array_lengthof(CPUDirectives) && 1540 "CPUDirectives[] might not be up-to-date!"); 1541 PPCTargetStreamer &TStreamer = 1542 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1543 TStreamer.emitMachine(CPUDirectives[Directive]); 1544 1545 // Prime text sections so they are adjacent. This reduces the likelihood a 1546 // large data or debug section causes a branch to exceed 16M limit. 1547 const TargetLoweringObjectFileMachO &TLOFMacho = 1548 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1549 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1550 if (TM.getRelocationModel() == Reloc::PIC_) { 1551 OutStreamer->SwitchSection( 1552 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1553 MachO::S_SYMBOL_STUBS | 1554 MachO::S_ATTR_PURE_INSTRUCTIONS, 1555 32, SectionKind::getText())); 1556 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1557 OutStreamer->SwitchSection( 1558 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1559 MachO::S_SYMBOL_STUBS | 1560 MachO::S_ATTR_PURE_INSTRUCTIONS, 1561 16, SectionKind::getText())); 1562 } 1563 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1564 } 1565 1566 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1567 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1568 1569 // Darwin/PPC always uses mach-o. 1570 const TargetLoweringObjectFileMachO &TLOFMacho = 1571 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1572 if (MMI) { 1573 MachineModuleInfoMachO &MMIMacho = 1574 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1575 1576 if (MAI->doesSupportExceptionHandling()) { 1577 // Add the (possibly multiple) personalities to the set of global values. 1578 // Only referenced functions get into the Personalities list. 1579 for (const Function *Personality : MMI->getPersonalities()) { 1580 if (Personality) { 1581 MCSymbol *NLPSym = 1582 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1583 MachineModuleInfoImpl::StubValueTy &StubSym = 1584 MMIMacho.getGVStubEntry(NLPSym); 1585 StubSym = 1586 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1587 } 1588 } 1589 } 1590 1591 // Output stubs for dynamically-linked functions. 1592 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1593 1594 // Output macho stubs for external and common global variables. 1595 if (!Stubs.empty()) { 1596 // Switch with ".non_lazy_symbol_pointer" directive. 1597 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1598 EmitAlignment(isPPC64 ? 3 : 2); 1599 1600 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1601 // L_foo$stub: 1602 OutStreamer->EmitLabel(Stubs[i].first); 1603 // .indirect_symbol _foo 1604 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1605 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1606 MCSA_IndirectSymbol); 1607 1608 if (MCSym.getInt()) 1609 // External to current translation unit. 1610 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1611 else 1612 // Internal to current translation unit. 1613 // 1614 // When we place the LSDA into the TEXT section, the type info 1615 // pointers 1616 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1617 // However, sometimes the types are local to the file. So we need to 1618 // fill in the value for the NLP in those cases. 1619 OutStreamer->EmitValue( 1620 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1621 isPPC64 ? 8 : 4 /*size*/); 1622 } 1623 1624 Stubs.clear(); 1625 OutStreamer->AddBlankLine(); 1626 } 1627 } 1628 1629 // Funny Darwin hack: This flag tells the linker that no global symbols 1630 // contain code that falls through to other global symbols (e.g. the obvious 1631 // implementation of multiple entry points). If this doesn't occur, the 1632 // linker can safely perform dead code stripping. Since LLVM never generates 1633 // code that does this, it is always safe to set. 1634 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1635 1636 return AsmPrinter::doFinalization(M); 1637 } 1638 1639 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1640 /// for a MachineFunction to the given output stream, in a format that the 1641 /// Darwin assembler can deal with. 1642 /// 1643 static AsmPrinter * 1644 createPPCAsmPrinterPass(TargetMachine &tm, 1645 std::unique_ptr<MCStreamer> &&Streamer) { 1646 if (tm.getTargetTriple().isMacOSX()) 1647 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1648 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1649 } 1650 1651 // Force static initialization. 1652 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1653 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1654 createPPCAsmPrinterPass); 1655 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1656 createPPCAsmPrinterPass); 1657 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1658 createPPCAsmPrinterPass); 1659 } 1660