1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "InstPrinter/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "llvm/ADT/MapVector.h" 29 #include "llvm/ADT/StringRef.h" 30 #include "llvm/ADT/Triple.h" 31 #include "llvm/ADT/Twine.h" 32 #include "llvm/BinaryFormat/ELF.h" 33 #include "llvm/BinaryFormat/MachO.h" 34 #include "llvm/CodeGen/AsmPrinter.h" 35 #include "llvm/CodeGen/MachineBasicBlock.h" 36 #include "llvm/CodeGen/MachineFunction.h" 37 #include "llvm/CodeGen/MachineInstr.h" 38 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 39 #include "llvm/CodeGen/MachineOperand.h" 40 #include "llvm/CodeGen/MachineRegisterInfo.h" 41 #include "llvm/CodeGen/StackMaps.h" 42 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 43 #include "llvm/IR/DataLayout.h" 44 #include "llvm/IR/GlobalValue.h" 45 #include "llvm/IR/Module.h" 46 #include "llvm/MC/MCAsmInfo.h" 47 #include "llvm/MC/MCContext.h" 48 #include "llvm/MC/MCExpr.h" 49 #include "llvm/MC/MCInst.h" 50 #include "llvm/MC/MCInstBuilder.h" 51 #include "llvm/MC/MCSectionELF.h" 52 #include "llvm/MC/MCSectionMachO.h" 53 #include "llvm/MC/MCStreamer.h" 54 #include "llvm/MC/MCSymbol.h" 55 #include "llvm/MC/MCSymbolELF.h" 56 #include "llvm/MC/SectionKind.h" 57 #include "llvm/Support/Casting.h" 58 #include "llvm/Support/CodeGen.h" 59 #include "llvm/Support/Debug.h" 60 #include "llvm/Support/ErrorHandling.h" 61 #include "llvm/Support/TargetRegistry.h" 62 #include "llvm/Support/raw_ostream.h" 63 #include "llvm/Target/TargetMachine.h" 64 #include <algorithm> 65 #include <cassert> 66 #include <cstdint> 67 #include <memory> 68 #include <new> 69 70 using namespace llvm; 71 72 #define DEBUG_TYPE "asmprinter" 73 74 namespace { 75 76 class PPCAsmPrinter : public AsmPrinter { 77 protected: 78 MapVector<MCSymbol *, MCSymbol *> TOC; 79 const PPCSubtarget *Subtarget; 80 StackMaps SM; 81 82 public: 83 explicit PPCAsmPrinter(TargetMachine &TM, 84 std::unique_ptr<MCStreamer> Streamer) 85 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 86 87 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 88 89 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 90 91 bool doInitialization(Module &M) override { 92 if (!TOC.empty()) 93 TOC.clear(); 94 return AsmPrinter::doInitialization(M); 95 } 96 97 void EmitInstruction(const MachineInstr *MI) override; 98 99 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 100 101 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 102 unsigned AsmVariant, const char *ExtraCode, 103 raw_ostream &O) override; 104 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 105 unsigned AsmVariant, const char *ExtraCode, 106 raw_ostream &O) override; 107 108 void EmitEndOfAsmFile(Module &M) override; 109 110 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 111 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 112 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 113 bool runOnMachineFunction(MachineFunction &MF) override { 114 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 115 bool Changed = AsmPrinter::runOnMachineFunction(MF); 116 emitXRayTable(); 117 return Changed; 118 } 119 }; 120 121 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 122 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 123 public: 124 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 125 std::unique_ptr<MCStreamer> Streamer) 126 : PPCAsmPrinter(TM, std::move(Streamer)) {} 127 128 StringRef getPassName() const override { 129 return "Linux PPC Assembly Printer"; 130 } 131 132 bool doFinalization(Module &M) override; 133 void EmitStartOfAsmFile(Module &M) override; 134 135 void EmitFunctionEntryLabel() override; 136 137 void EmitFunctionBodyStart() override; 138 void EmitFunctionBodyEnd() override; 139 void EmitInstruction(const MachineInstr *MI) override; 140 }; 141 142 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 143 /// OS X 144 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 145 public: 146 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 147 std::unique_ptr<MCStreamer> Streamer) 148 : PPCAsmPrinter(TM, std::move(Streamer)) {} 149 150 StringRef getPassName() const override { 151 return "Darwin PPC Assembly Printer"; 152 } 153 154 bool doFinalization(Module &M) override; 155 void EmitStartOfAsmFile(Module &M) override; 156 }; 157 158 } // end anonymous namespace 159 160 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 161 raw_ostream &O) { 162 const DataLayout &DL = getDataLayout(); 163 const MachineOperand &MO = MI->getOperand(OpNo); 164 165 switch (MO.getType()) { 166 case MachineOperand::MO_Register: { 167 unsigned Reg = PPCInstrInfo::getRegNumForOperand(MI->getDesc(), 168 MO.getReg(), OpNo); 169 170 const char *RegName = PPCInstPrinter::getRegisterName(Reg); 171 172 // Linux assembler (Others?) does not take register mnemonics. 173 // FIXME - What about special registers used in mfspr/mtspr? 174 if (!Subtarget->isDarwin()) 175 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 176 O << RegName; 177 return; 178 } 179 case MachineOperand::MO_Immediate: 180 O << MO.getImm(); 181 return; 182 183 case MachineOperand::MO_MachineBasicBlock: 184 MO.getMBB()->getSymbol()->print(O, MAI); 185 return; 186 case MachineOperand::MO_ConstantPoolIndex: 187 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 188 << MO.getIndex(); 189 return; 190 case MachineOperand::MO_BlockAddress: 191 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 192 return; 193 case MachineOperand::MO_GlobalAddress: { 194 // Computing the address of a global symbol, not calling it. 195 const GlobalValue *GV = MO.getGlobal(); 196 MCSymbol *SymToPrint; 197 198 // External or weakly linked global variables need non-lazily-resolved stubs 199 if (Subtarget->hasLazyResolverStub(GV)) { 200 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 201 MachineModuleInfoImpl::StubValueTy &StubSym = 202 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 203 SymToPrint); 204 if (!StubSym.getPointer()) 205 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 206 !GV->hasInternalLinkage()); 207 } else { 208 SymToPrint = getSymbol(GV); 209 } 210 211 SymToPrint->print(O, MAI); 212 213 printOffset(MO.getOffset(), O); 214 return; 215 } 216 217 default: 218 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 219 return; 220 } 221 } 222 223 /// PrintAsmOperand - Print out an operand for an inline asm expression. 224 /// 225 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 226 unsigned AsmVariant, 227 const char *ExtraCode, raw_ostream &O) { 228 // Does this asm operand have a single letter operand modifier? 229 if (ExtraCode && ExtraCode[0]) { 230 if (ExtraCode[1] != 0) return true; // Unknown modifier. 231 232 switch (ExtraCode[0]) { 233 default: 234 // See if this is a generic print operand 235 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 236 case 'c': // Don't print "$" before a global var name or constant. 237 break; // PPC never has a prefix. 238 case 'L': // Write second word of DImode reference. 239 // Verify that this operand has two consecutive registers. 240 if (!MI->getOperand(OpNo).isReg() || 241 OpNo+1 == MI->getNumOperands() || 242 !MI->getOperand(OpNo+1).isReg()) 243 return true; 244 ++OpNo; // Return the high-part. 245 break; 246 case 'I': 247 // Write 'i' if an integer constant, otherwise nothing. Used to print 248 // addi vs add, etc. 249 if (MI->getOperand(OpNo).isImm()) 250 O << "i"; 251 return false; 252 case 'x': 253 if(!MI->getOperand(OpNo).isReg()) 254 return true; 255 // This operand uses VSX numbering. 256 // If the operand is a VMX register, convert it to a VSX register. 257 unsigned Reg = MI->getOperand(OpNo).getReg(); 258 if (PPCInstrInfo::isVRRegister(Reg)) 259 Reg = PPC::VSX32 + (Reg - PPC::V0); 260 else if (PPCInstrInfo::isVFRegister(Reg)) 261 Reg = PPC::VSX32 + (Reg - PPC::VF0); 262 const char *RegName; 263 RegName = PPCInstPrinter::getRegisterName(Reg); 264 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 265 O << RegName; 266 return false; 267 } 268 } 269 270 printOperand(MI, OpNo, O); 271 return false; 272 } 273 274 // At the moment, all inline asm memory operands are a single register. 275 // In any case, the output of this routine should always be just one 276 // assembler operand. 277 278 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 279 unsigned AsmVariant, 280 const char *ExtraCode, 281 raw_ostream &O) { 282 if (ExtraCode && ExtraCode[0]) { 283 if (ExtraCode[1] != 0) return true; // Unknown modifier. 284 285 switch (ExtraCode[0]) { 286 default: return true; // Unknown modifier. 287 case 'y': // A memory reference for an X-form instruction 288 { 289 const char *RegName = "r0"; 290 if (!Subtarget->isDarwin()) 291 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 292 O << RegName << ", "; 293 printOperand(MI, OpNo, O); 294 return false; 295 } 296 case 'U': // Print 'u' for update form. 297 case 'X': // Print 'x' for indexed form. 298 { 299 // FIXME: Currently for PowerPC memory operands are always loaded 300 // into a register, so we never get an update or indexed form. 301 // This is bad even for offset forms, since even if we know we 302 // have a value in -16(r1), we will generate a load into r<n> 303 // and then load from 0(r<n>). Until that issue is fixed, 304 // tolerate 'U' and 'X' but don't output anything. 305 assert(MI->getOperand(OpNo).isReg()); 306 return false; 307 } 308 } 309 } 310 311 assert(MI->getOperand(OpNo).isReg()); 312 O << "0("; 313 printOperand(MI, OpNo, O); 314 O << ")"; 315 return false; 316 } 317 318 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 319 /// exists for it. If not, create one. Then return a symbol that references 320 /// the TOC entry. 321 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 322 MCSymbol *&TOCEntry = TOC[Sym]; 323 if (!TOCEntry) 324 TOCEntry = createTempSymbol("C"); 325 return TOCEntry; 326 } 327 328 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 329 emitStackMaps(SM); 330 } 331 332 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 333 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 334 335 SM.recordStackMap(MI); 336 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 337 338 // Scan ahead to trim the shadow. 339 const MachineBasicBlock &MBB = *MI.getParent(); 340 MachineBasicBlock::const_iterator MII(MI); 341 ++MII; 342 while (NumNOPBytes > 0) { 343 if (MII == MBB.end() || MII->isCall() || 344 MII->getOpcode() == PPC::DBG_VALUE || 345 MII->getOpcode() == TargetOpcode::PATCHPOINT || 346 MII->getOpcode() == TargetOpcode::STACKMAP) 347 break; 348 ++MII; 349 NumNOPBytes -= 4; 350 } 351 352 // Emit nops. 353 for (unsigned i = 0; i < NumNOPBytes; i += 4) 354 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 355 } 356 357 // Lower a patchpoint of the form: 358 // [<def>], <id>, <numBytes>, <target>, <numArgs> 359 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 360 SM.recordPatchPoint(MI); 361 PatchPointOpers Opers(&MI); 362 363 unsigned EncodedBytes = 0; 364 const MachineOperand &CalleeMO = Opers.getCallTarget(); 365 366 if (CalleeMO.isImm()) { 367 int64_t CallTarget = CalleeMO.getImm(); 368 if (CallTarget) { 369 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 370 "High 16 bits of call target should be zero."); 371 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 372 EncodedBytes = 0; 373 // Materialize the jump address: 374 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 375 .addReg(ScratchReg) 376 .addImm((CallTarget >> 32) & 0xFFFF)); 377 ++EncodedBytes; 378 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 379 .addReg(ScratchReg) 380 .addReg(ScratchReg) 381 .addImm(32).addImm(16)); 382 ++EncodedBytes; 383 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 384 .addReg(ScratchReg) 385 .addReg(ScratchReg) 386 .addImm((CallTarget >> 16) & 0xFFFF)); 387 ++EncodedBytes; 388 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 389 .addReg(ScratchReg) 390 .addReg(ScratchReg) 391 .addImm(CallTarget & 0xFFFF)); 392 393 // Save the current TOC pointer before the remote call. 394 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 395 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 396 .addReg(PPC::X2) 397 .addImm(TOCSaveOffset) 398 .addReg(PPC::X1)); 399 ++EncodedBytes; 400 401 // If we're on ELFv1, then we need to load the actual function pointer 402 // from the function descriptor. 403 if (!Subtarget->isELFv2ABI()) { 404 // Load the new TOC pointer and the function address, but not r11 405 // (needing this is rare, and loading it here would prevent passing it 406 // via a 'nest' parameter. 407 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 408 .addReg(PPC::X2) 409 .addImm(8) 410 .addReg(ScratchReg)); 411 ++EncodedBytes; 412 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 413 .addReg(ScratchReg) 414 .addImm(0) 415 .addReg(ScratchReg)); 416 ++EncodedBytes; 417 } 418 419 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 420 .addReg(ScratchReg)); 421 ++EncodedBytes; 422 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 423 ++EncodedBytes; 424 425 // Restore the TOC pointer after the call. 426 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 427 .addReg(PPC::X2) 428 .addImm(TOCSaveOffset) 429 .addReg(PPC::X1)); 430 ++EncodedBytes; 431 } 432 } else if (CalleeMO.isGlobal()) { 433 const GlobalValue *GValue = CalleeMO.getGlobal(); 434 MCSymbol *MOSymbol = getSymbol(GValue); 435 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 436 437 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 438 .addExpr(SymVar)); 439 EncodedBytes += 2; 440 } 441 442 // Each instruction is 4 bytes. 443 EncodedBytes *= 4; 444 445 // Emit padding. 446 unsigned NumBytes = Opers.getNumPatchBytes(); 447 assert(NumBytes >= EncodedBytes && 448 "Patchpoint can't request size less than the length of a call."); 449 assert((NumBytes - EncodedBytes) % 4 == 0 && 450 "Invalid number of NOP bytes requested!"); 451 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 452 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 453 } 454 455 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 456 /// call to __tls_get_addr to the current output stream. 457 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 458 MCSymbolRefExpr::VariantKind VK) { 459 StringRef Name = "__tls_get_addr"; 460 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 461 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 462 463 assert(MI->getOperand(0).isReg() && 464 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 465 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 466 "GETtls[ld]ADDR[32] must define GPR3"); 467 assert(MI->getOperand(1).isReg() && 468 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 469 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 470 "GETtls[ld]ADDR[32] must read GPR3"); 471 472 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 473 isPositionIndependent()) 474 Kind = MCSymbolRefExpr::VK_PLT; 475 const MCSymbolRefExpr *TlsRef = 476 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 477 const MachineOperand &MO = MI->getOperand(2); 478 const GlobalValue *GValue = MO.getGlobal(); 479 MCSymbol *MOSymbol = getSymbol(GValue); 480 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 481 EmitToStreamer(*OutStreamer, 482 MCInstBuilder(Subtarget->isPPC64() ? 483 PPC::BL8_NOP_TLS : PPC::BL_TLS) 484 .addExpr(TlsRef) 485 .addExpr(SymVar)); 486 } 487 488 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 489 /// the current output stream. 490 /// 491 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 492 MCInst TmpInst; 493 bool isPPC64 = Subtarget->isPPC64(); 494 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 495 const Module *M = MF->getFunction().getParent(); 496 PICLevel::Level PL = M->getPICLevel(); 497 498 #ifndef NDEBUG 499 // Validate that SPE and FPU are mutually exclusive in codegen 500 if (!MI->isInlineAsm()) { 501 for (const MachineOperand &MO: MI->operands()) { 502 if (MO.isReg()) { 503 unsigned Reg = MO.getReg(); 504 if (Subtarget->hasSPE()) { 505 if (PPC::F4RCRegClass.contains(Reg) || 506 PPC::F8RCRegClass.contains(Reg) || 507 PPC::QBRCRegClass.contains(Reg) || 508 PPC::QFRCRegClass.contains(Reg) || 509 PPC::QSRCRegClass.contains(Reg) || 510 PPC::VFRCRegClass.contains(Reg) || 511 PPC::VRRCRegClass.contains(Reg) || 512 PPC::VSFRCRegClass.contains(Reg) || 513 PPC::VSSRCRegClass.contains(Reg) 514 ) 515 llvm_unreachable("SPE targets cannot have FPRegs!"); 516 } else { 517 if (PPC::SPERCRegClass.contains(Reg)) 518 llvm_unreachable("SPE register found in FPU-targeted code!"); 519 } 520 } 521 } 522 } 523 #endif 524 // Lower multi-instruction pseudo operations. 525 switch (MI->getOpcode()) { 526 default: break; 527 case TargetOpcode::DBG_VALUE: 528 llvm_unreachable("Should be handled target independently"); 529 case TargetOpcode::STACKMAP: 530 return LowerSTACKMAP(SM, *MI); 531 case TargetOpcode::PATCHPOINT: 532 return LowerPATCHPOINT(SM, *MI); 533 534 case PPC::MoveGOTtoLR: { 535 // Transform %lr = MoveGOTtoLR 536 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 537 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 538 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 539 // blrl 540 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 541 MCSymbol *GOTSymbol = 542 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 543 const MCExpr *OffsExpr = 544 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 545 MCSymbolRefExpr::VK_PPC_LOCAL, 546 OutContext), 547 MCConstantExpr::create(4, OutContext), 548 OutContext); 549 550 // Emit the 'bl'. 551 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 552 return; 553 } 554 case PPC::MovePCtoLR: 555 case PPC::MovePCtoLR8: { 556 // Transform %lr = MovePCtoLR 557 // Into this, where the label is the PIC base: 558 // bl L1$pb 559 // L1$pb: 560 MCSymbol *PICBase = MF->getPICBaseSymbol(); 561 562 // Emit the 'bl'. 563 EmitToStreamer(*OutStreamer, 564 MCInstBuilder(PPC::BL) 565 // FIXME: We would like an efficient form for this, so we 566 // don't have to do a lot of extra uniquing. 567 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 568 569 // Emit the label. 570 OutStreamer->EmitLabel(PICBase); 571 return; 572 } 573 case PPC::UpdateGBR: { 574 // Transform %rd = UpdateGBR(%rt, %ri) 575 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 576 // add %rd, %rt, %ri 577 // or into (if secure plt mode is on): 578 // addis r30, r30, .LTOC - .L0$pb@ha 579 // addi r30, r30, .LTOC - .L0$pb@l 580 // Get the offset from the GOT Base Register to the GOT 581 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 582 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 583 unsigned PICR = TmpInst.getOperand(0).getReg(); 584 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 585 const MCExpr *PB = 586 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 587 OutContext); 588 589 const MCExpr *LTOCDeltaExpr = 590 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 591 PB, OutContext); 592 593 const MCExpr *LTOCDeltaHi = 594 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 595 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 596 .addReg(PICR) 597 .addReg(PICR) 598 .addExpr(LTOCDeltaHi)); 599 600 const MCExpr *LTOCDeltaLo = 601 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 602 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 603 .addReg(PICR) 604 .addReg(PICR) 605 .addExpr(LTOCDeltaLo)); 606 return; 607 } else { 608 MCSymbol *PICOffset = 609 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 610 TmpInst.setOpcode(PPC::LWZ); 611 const MCExpr *Exp = 612 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 613 const MCExpr *PB = 614 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 615 MCSymbolRefExpr::VK_None, 616 OutContext); 617 const MCOperand TR = TmpInst.getOperand(1); 618 const MCOperand PICR = TmpInst.getOperand(0); 619 620 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 621 TmpInst.getOperand(1) = 622 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 623 TmpInst.getOperand(0) = TR; 624 TmpInst.getOperand(2) = PICR; 625 EmitToStreamer(*OutStreamer, TmpInst); 626 627 TmpInst.setOpcode(PPC::ADD4); 628 TmpInst.getOperand(0) = PICR; 629 TmpInst.getOperand(1) = TR; 630 TmpInst.getOperand(2) = PICR; 631 EmitToStreamer(*OutStreamer, TmpInst); 632 return; 633 } 634 } 635 case PPC::LWZtoc: { 636 // Transform %r3 = LWZtoc @min1, %r2 637 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 638 639 // Change the opcode to LWZ, and the global address operand to be a 640 // reference to the GOT entry we will synthesize later. 641 TmpInst.setOpcode(PPC::LWZ); 642 const MachineOperand &MO = MI->getOperand(1); 643 644 // Map symbol -> label of TOC entry 645 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 646 MCSymbol *MOSymbol = nullptr; 647 if (MO.isGlobal()) 648 MOSymbol = getSymbol(MO.getGlobal()); 649 else if (MO.isCPI()) 650 MOSymbol = GetCPISymbol(MO.getIndex()); 651 else if (MO.isJTI()) 652 MOSymbol = GetJTISymbol(MO.getIndex()); 653 else if (MO.isBlockAddress()) 654 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 655 656 if (PL == PICLevel::SmallPIC) { 657 const MCExpr *Exp = 658 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 659 OutContext); 660 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 661 } else { 662 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 663 664 const MCExpr *Exp = 665 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 666 OutContext); 667 const MCExpr *PB = 668 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 669 OutContext); 670 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 671 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 672 } 673 EmitToStreamer(*OutStreamer, TmpInst); 674 return; 675 } 676 case PPC::LDtocJTI: 677 case PPC::LDtocCPT: 678 case PPC::LDtocBA: 679 case PPC::LDtoc: { 680 // Transform %x3 = LDtoc @min1, %x2 681 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 682 683 // Change the opcode to LD, and the global address operand to be a 684 // reference to the TOC entry we will synthesize later. 685 TmpInst.setOpcode(PPC::LD); 686 const MachineOperand &MO = MI->getOperand(1); 687 688 // Map symbol -> label of TOC entry 689 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 690 MCSymbol *MOSymbol = nullptr; 691 if (MO.isGlobal()) 692 MOSymbol = getSymbol(MO.getGlobal()); 693 else if (MO.isCPI()) 694 MOSymbol = GetCPISymbol(MO.getIndex()); 695 else if (MO.isJTI()) 696 MOSymbol = GetJTISymbol(MO.getIndex()); 697 else if (MO.isBlockAddress()) 698 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 699 700 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 701 702 const MCExpr *Exp = 703 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 704 OutContext); 705 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 706 EmitToStreamer(*OutStreamer, TmpInst); 707 return; 708 } 709 710 case PPC::ADDIStocHA: { 711 // Transform %xd = ADDIStocHA %x2, @sym 712 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 713 714 // Change the opcode to ADDIS8. If the global address is external, has 715 // common linkage, is a non-local function address, or is a jump table 716 // address, then generate a TOC entry and reference that. Otherwise 717 // reference the symbol directly. 718 TmpInst.setOpcode(PPC::ADDIS8); 719 const MachineOperand &MO = MI->getOperand(2); 720 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 721 MO.isBlockAddress()) && 722 "Invalid operand for ADDIStocHA!"); 723 MCSymbol *MOSymbol = nullptr; 724 bool GlobalToc = false; 725 726 if (MO.isGlobal()) { 727 const GlobalValue *GV = MO.getGlobal(); 728 MOSymbol = getSymbol(GV); 729 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 730 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 731 } else if (MO.isCPI()) { 732 MOSymbol = GetCPISymbol(MO.getIndex()); 733 } else if (MO.isJTI()) { 734 MOSymbol = GetJTISymbol(MO.getIndex()); 735 } else if (MO.isBlockAddress()) { 736 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 737 } 738 739 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 740 TM.getCodeModel() == CodeModel::Large) 741 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 742 743 const MCExpr *Exp = 744 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 745 OutContext); 746 747 if (!MO.isJTI() && MO.getOffset()) 748 Exp = MCBinaryExpr::createAdd(Exp, 749 MCConstantExpr::create(MO.getOffset(), 750 OutContext), 751 OutContext); 752 753 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 754 EmitToStreamer(*OutStreamer, TmpInst); 755 return; 756 } 757 case PPC::LDtocL: { 758 // Transform %xd = LDtocL @sym, %xs 759 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 760 761 // Change the opcode to LD. If the global address is external, has 762 // common linkage, or is a jump table address, then reference the 763 // associated TOC entry. Otherwise reference the symbol directly. 764 TmpInst.setOpcode(PPC::LD); 765 const MachineOperand &MO = MI->getOperand(1); 766 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 767 MO.isBlockAddress()) && 768 "Invalid operand for LDtocL!"); 769 MCSymbol *MOSymbol = nullptr; 770 771 if (MO.isJTI()) 772 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 773 else if (MO.isBlockAddress()) { 774 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 775 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 776 } 777 else if (MO.isCPI()) { 778 MOSymbol = GetCPISymbol(MO.getIndex()); 779 if (TM.getCodeModel() == CodeModel::Large) 780 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 781 } 782 else if (MO.isGlobal()) { 783 const GlobalValue *GV = MO.getGlobal(); 784 MOSymbol = getSymbol(GV); 785 LLVM_DEBUG( 786 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 787 assert((GVFlags & PPCII::MO_NLP_FLAG) && 788 "LDtocL used on symbol that could be accessed directly is " 789 "invalid. Must match ADDIStocHA.")); 790 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 791 } 792 793 const MCExpr *Exp = 794 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 795 OutContext); 796 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 797 EmitToStreamer(*OutStreamer, TmpInst); 798 return; 799 } 800 case PPC::ADDItocL: { 801 // Transform %xd = ADDItocL %xs, @sym 802 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 803 804 // Change the opcode to ADDI8. If the global address is external, then 805 // generate a TOC entry and reference that. Otherwise reference the 806 // symbol directly. 807 TmpInst.setOpcode(PPC::ADDI8); 808 const MachineOperand &MO = MI->getOperand(2); 809 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 810 MCSymbol *MOSymbol = nullptr; 811 812 if (MO.isGlobal()) { 813 const GlobalValue *GV = MO.getGlobal(); 814 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 815 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 816 "Interposable definitions must use indirect access.")); 817 MOSymbol = getSymbol(GV); 818 } else if (MO.isCPI()) { 819 MOSymbol = GetCPISymbol(MO.getIndex()); 820 } 821 822 const MCExpr *Exp = 823 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 824 OutContext); 825 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 826 EmitToStreamer(*OutStreamer, TmpInst); 827 return; 828 } 829 case PPC::ADDISgotTprelHA: { 830 // Transform: %xd = ADDISgotTprelHA %x2, @sym 831 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 832 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 833 const MachineOperand &MO = MI->getOperand(2); 834 const GlobalValue *GValue = MO.getGlobal(); 835 MCSymbol *MOSymbol = getSymbol(GValue); 836 const MCExpr *SymGotTprel = 837 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 838 OutContext); 839 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 840 .addReg(MI->getOperand(0).getReg()) 841 .addReg(MI->getOperand(1).getReg()) 842 .addExpr(SymGotTprel)); 843 return; 844 } 845 case PPC::LDgotTprelL: 846 case PPC::LDgotTprelL32: { 847 // Transform %xd = LDgotTprelL @sym, %xs 848 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 849 850 // Change the opcode to LD. 851 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 852 const MachineOperand &MO = MI->getOperand(1); 853 const GlobalValue *GValue = MO.getGlobal(); 854 MCSymbol *MOSymbol = getSymbol(GValue); 855 const MCExpr *Exp = 856 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 857 OutContext); 858 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 859 EmitToStreamer(*OutStreamer, TmpInst); 860 return; 861 } 862 863 case PPC::PPC32PICGOT: { 864 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 865 MCSymbol *GOTRef = OutContext.createTempSymbol(); 866 MCSymbol *NextInstr = OutContext.createTempSymbol(); 867 868 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 869 // FIXME: We would like an efficient form for this, so we don't have to do 870 // a lot of extra uniquing. 871 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 872 const MCExpr *OffsExpr = 873 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 874 MCSymbolRefExpr::create(GOTRef, OutContext), 875 OutContext); 876 OutStreamer->EmitLabel(GOTRef); 877 OutStreamer->EmitValue(OffsExpr, 4); 878 OutStreamer->EmitLabel(NextInstr); 879 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 880 .addReg(MI->getOperand(0).getReg())); 881 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 882 .addReg(MI->getOperand(1).getReg()) 883 .addImm(0) 884 .addReg(MI->getOperand(0).getReg())); 885 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 886 .addReg(MI->getOperand(0).getReg()) 887 .addReg(MI->getOperand(1).getReg()) 888 .addReg(MI->getOperand(0).getReg())); 889 return; 890 } 891 case PPC::PPC32GOT: { 892 MCSymbol *GOTSymbol = 893 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 894 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 895 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 896 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 897 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 898 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 899 .addReg(MI->getOperand(0).getReg()) 900 .addExpr(SymGotTlsL)); 901 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 902 .addReg(MI->getOperand(0).getReg()) 903 .addReg(MI->getOperand(0).getReg()) 904 .addExpr(SymGotTlsHA)); 905 return; 906 } 907 case PPC::ADDIStlsgdHA: { 908 // Transform: %xd = ADDIStlsgdHA %x2, @sym 909 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 910 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 911 const MachineOperand &MO = MI->getOperand(2); 912 const GlobalValue *GValue = MO.getGlobal(); 913 MCSymbol *MOSymbol = getSymbol(GValue); 914 const MCExpr *SymGotTlsGD = 915 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 916 OutContext); 917 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 918 .addReg(MI->getOperand(0).getReg()) 919 .addReg(MI->getOperand(1).getReg()) 920 .addExpr(SymGotTlsGD)); 921 return; 922 } 923 case PPC::ADDItlsgdL: 924 // Transform: %xd = ADDItlsgdL %xs, @sym 925 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 926 case PPC::ADDItlsgdL32: { 927 // Transform: %rd = ADDItlsgdL32 %rs, @sym 928 // Into: %rd = ADDI %rs, sym@got@tlsgd 929 const MachineOperand &MO = MI->getOperand(2); 930 const GlobalValue *GValue = MO.getGlobal(); 931 MCSymbol *MOSymbol = getSymbol(GValue); 932 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 933 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 934 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 935 OutContext); 936 EmitToStreamer(*OutStreamer, 937 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 938 .addReg(MI->getOperand(0).getReg()) 939 .addReg(MI->getOperand(1).getReg()) 940 .addExpr(SymGotTlsGD)); 941 return; 942 } 943 case PPC::GETtlsADDR: 944 // Transform: %x3 = GETtlsADDR %x3, @sym 945 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 946 case PPC::GETtlsADDR32: { 947 // Transform: %r3 = GETtlsADDR32 %r3, @sym 948 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 949 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 950 return; 951 } 952 case PPC::ADDIStlsldHA: { 953 // Transform: %xd = ADDIStlsldHA %x2, @sym 954 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 955 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 956 const MachineOperand &MO = MI->getOperand(2); 957 const GlobalValue *GValue = MO.getGlobal(); 958 MCSymbol *MOSymbol = getSymbol(GValue); 959 const MCExpr *SymGotTlsLD = 960 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 961 OutContext); 962 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 963 .addReg(MI->getOperand(0).getReg()) 964 .addReg(MI->getOperand(1).getReg()) 965 .addExpr(SymGotTlsLD)); 966 return; 967 } 968 case PPC::ADDItlsldL: 969 // Transform: %xd = ADDItlsldL %xs, @sym 970 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 971 case PPC::ADDItlsldL32: { 972 // Transform: %rd = ADDItlsldL32 %rs, @sym 973 // Into: %rd = ADDI %rs, sym@got@tlsld 974 const MachineOperand &MO = MI->getOperand(2); 975 const GlobalValue *GValue = MO.getGlobal(); 976 MCSymbol *MOSymbol = getSymbol(GValue); 977 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 978 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 979 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 980 OutContext); 981 EmitToStreamer(*OutStreamer, 982 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 983 .addReg(MI->getOperand(0).getReg()) 984 .addReg(MI->getOperand(1).getReg()) 985 .addExpr(SymGotTlsLD)); 986 return; 987 } 988 case PPC::GETtlsldADDR: 989 // Transform: %x3 = GETtlsldADDR %x3, @sym 990 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 991 case PPC::GETtlsldADDR32: { 992 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 993 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 994 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 995 return; 996 } 997 case PPC::ADDISdtprelHA: 998 // Transform: %xd = ADDISdtprelHA %xs, @sym 999 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1000 case PPC::ADDISdtprelHA32: { 1001 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1002 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1003 const MachineOperand &MO = MI->getOperand(2); 1004 const GlobalValue *GValue = MO.getGlobal(); 1005 MCSymbol *MOSymbol = getSymbol(GValue); 1006 const MCExpr *SymDtprel = 1007 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1008 OutContext); 1009 EmitToStreamer( 1010 *OutStreamer, 1011 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1012 .addReg(MI->getOperand(0).getReg()) 1013 .addReg(MI->getOperand(1).getReg()) 1014 .addExpr(SymDtprel)); 1015 return; 1016 } 1017 case PPC::ADDIdtprelL: 1018 // Transform: %xd = ADDIdtprelL %xs, @sym 1019 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1020 case PPC::ADDIdtprelL32: { 1021 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1022 // Into: %rd = ADDI %rs, sym@dtprel@l 1023 const MachineOperand &MO = MI->getOperand(2); 1024 const GlobalValue *GValue = MO.getGlobal(); 1025 MCSymbol *MOSymbol = getSymbol(GValue); 1026 const MCExpr *SymDtprel = 1027 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1028 OutContext); 1029 EmitToStreamer(*OutStreamer, 1030 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1031 .addReg(MI->getOperand(0).getReg()) 1032 .addReg(MI->getOperand(1).getReg()) 1033 .addExpr(SymDtprel)); 1034 return; 1035 } 1036 case PPC::MFOCRF: 1037 case PPC::MFOCRF8: 1038 if (!Subtarget->hasMFOCRF()) { 1039 // Transform: %r3 = MFOCRF %cr7 1040 // Into: %r3 = MFCR ;; cr7 1041 unsigned NewOpcode = 1042 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1043 OutStreamer->AddComment(PPCInstPrinter:: 1044 getRegisterName(MI->getOperand(1).getReg())); 1045 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1046 .addReg(MI->getOperand(0).getReg())); 1047 return; 1048 } 1049 break; 1050 case PPC::MTOCRF: 1051 case PPC::MTOCRF8: 1052 if (!Subtarget->hasMFOCRF()) { 1053 // Transform: %cr7 = MTOCRF %r3 1054 // Into: MTCRF mask, %r3 ;; cr7 1055 unsigned NewOpcode = 1056 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1057 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1058 ->getEncodingValue(MI->getOperand(0).getReg()); 1059 OutStreamer->AddComment(PPCInstPrinter:: 1060 getRegisterName(MI->getOperand(0).getReg())); 1061 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1062 .addImm(Mask) 1063 .addReg(MI->getOperand(1).getReg())); 1064 return; 1065 } 1066 break; 1067 case PPC::LD: 1068 case PPC::STD: 1069 case PPC::LWA_32: 1070 case PPC::LWA: { 1071 // Verify alignment is legal, so we don't create relocations 1072 // that can't be supported. 1073 // FIXME: This test is currently disabled for Darwin. The test 1074 // suite shows a handful of test cases that fail this check for 1075 // Darwin. Those need to be investigated before this sanity test 1076 // can be enabled for those subtargets. 1077 if (!Subtarget->isDarwin()) { 1078 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1079 const MachineOperand &MO = MI->getOperand(OpNum); 1080 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1081 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1082 } 1083 // Now process the instruction normally. 1084 break; 1085 } 1086 } 1087 1088 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1089 EmitToStreamer(*OutStreamer, TmpInst); 1090 } 1091 1092 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1093 if (!Subtarget->isPPC64()) 1094 return PPCAsmPrinter::EmitInstruction(MI); 1095 1096 switch (MI->getOpcode()) { 1097 default: 1098 return PPCAsmPrinter::EmitInstruction(MI); 1099 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1100 // .begin: 1101 // b .end # lis 0, FuncId[16..32] 1102 // nop # li 0, FuncId[0..15] 1103 // std 0, -8(1) 1104 // mflr 0 1105 // bl __xray_FunctionEntry 1106 // mtlr 0 1107 // .end: 1108 // 1109 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1110 // of instructions change. 1111 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1112 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1113 OutStreamer->EmitLabel(BeginOfSled); 1114 EmitToStreamer(*OutStreamer, 1115 MCInstBuilder(PPC::B).addExpr( 1116 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1117 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1118 EmitToStreamer( 1119 *OutStreamer, 1120 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1121 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1122 EmitToStreamer(*OutStreamer, 1123 MCInstBuilder(PPC::BL8_NOP) 1124 .addExpr(MCSymbolRefExpr::create( 1125 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1126 OutContext))); 1127 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1128 OutStreamer->EmitLabel(EndOfSled); 1129 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1130 break; 1131 } 1132 case TargetOpcode::PATCHABLE_RET: { 1133 unsigned RetOpcode = MI->getOperand(0).getImm(); 1134 MCInst RetInst; 1135 RetInst.setOpcode(RetOpcode); 1136 for (const auto &MO : 1137 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1138 MCOperand MCOp; 1139 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1140 RetInst.addOperand(MCOp); 1141 } 1142 1143 bool IsConditional; 1144 if (RetOpcode == PPC::BCCLR) { 1145 IsConditional = true; 1146 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1147 RetOpcode == PPC::TCRETURNai8) { 1148 break; 1149 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1150 IsConditional = false; 1151 } else { 1152 EmitToStreamer(*OutStreamer, RetInst); 1153 break; 1154 } 1155 1156 MCSymbol *FallthroughLabel; 1157 if (IsConditional) { 1158 // Before: 1159 // bgtlr cr0 1160 // 1161 // After: 1162 // ble cr0, .end 1163 // .p2align 3 1164 // .begin: 1165 // blr # lis 0, FuncId[16..32] 1166 // nop # li 0, FuncId[0..15] 1167 // std 0, -8(1) 1168 // mflr 0 1169 // bl __xray_FunctionExit 1170 // mtlr 0 1171 // blr 1172 // .end: 1173 // 1174 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1175 // of instructions change. 1176 FallthroughLabel = OutContext.createTempSymbol(); 1177 EmitToStreamer( 1178 *OutStreamer, 1179 MCInstBuilder(PPC::BCC) 1180 .addImm(PPC::InvertPredicate( 1181 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1182 .addReg(MI->getOperand(2).getReg()) 1183 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1184 RetInst = MCInst(); 1185 RetInst.setOpcode(PPC::BLR8); 1186 } 1187 // .p2align 3 1188 // .begin: 1189 // b(lr)? # lis 0, FuncId[16..32] 1190 // nop # li 0, FuncId[0..15] 1191 // std 0, -8(1) 1192 // mflr 0 1193 // bl __xray_FunctionExit 1194 // mtlr 0 1195 // b(lr)? 1196 // 1197 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1198 // of instructions change. 1199 OutStreamer->EmitCodeAlignment(8); 1200 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1201 OutStreamer->EmitLabel(BeginOfSled); 1202 EmitToStreamer(*OutStreamer, RetInst); 1203 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1204 EmitToStreamer( 1205 *OutStreamer, 1206 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1207 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1208 EmitToStreamer(*OutStreamer, 1209 MCInstBuilder(PPC::BL8_NOP) 1210 .addExpr(MCSymbolRefExpr::create( 1211 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1212 OutContext))); 1213 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1214 EmitToStreamer(*OutStreamer, RetInst); 1215 if (IsConditional) 1216 OutStreamer->EmitLabel(FallthroughLabel); 1217 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1218 break; 1219 } 1220 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1221 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1222 case TargetOpcode::PATCHABLE_TAIL_CALL: 1223 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1224 // normal function exit from a tail exit. 1225 llvm_unreachable("Tail call is handled in the normal case. See comments " 1226 "around this assert."); 1227 } 1228 } 1229 1230 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1231 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1232 PPCTargetStreamer *TS = 1233 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1234 1235 if (TS) 1236 TS->emitAbiVersion(2); 1237 } 1238 1239 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1240 !isPositionIndependent()) 1241 return AsmPrinter::EmitStartOfAsmFile(M); 1242 1243 if (M.getPICLevel() == PICLevel::SmallPIC) 1244 return AsmPrinter::EmitStartOfAsmFile(M); 1245 1246 OutStreamer->SwitchSection(OutContext.getELFSection( 1247 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1248 1249 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1250 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1251 1252 OutStreamer->EmitLabel(CurrentPos); 1253 1254 // The GOT pointer points to the middle of the GOT, in order to reference the 1255 // entire 64kB range. 0x8000 is the midpoint. 1256 const MCExpr *tocExpr = 1257 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1258 MCConstantExpr::create(0x8000, OutContext), 1259 OutContext); 1260 1261 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1262 1263 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1264 } 1265 1266 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1267 // linux/ppc32 - Normal entry label. 1268 if (!Subtarget->isPPC64() && 1269 (!isPositionIndependent() || 1270 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1271 return AsmPrinter::EmitFunctionEntryLabel(); 1272 1273 if (!Subtarget->isPPC64()) { 1274 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1275 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1276 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1277 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1278 OutStreamer->EmitLabel(RelocSymbol); 1279 1280 const MCExpr *OffsExpr = 1281 MCBinaryExpr::createSub( 1282 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1283 OutContext), 1284 MCSymbolRefExpr::create(PICBase, OutContext), 1285 OutContext); 1286 OutStreamer->EmitValue(OffsExpr, 4); 1287 OutStreamer->EmitLabel(CurrentFnSym); 1288 return; 1289 } else 1290 return AsmPrinter::EmitFunctionEntryLabel(); 1291 } 1292 1293 // ELFv2 ABI - Normal entry label. 1294 if (Subtarget->isELFv2ABI()) { 1295 // In the Large code model, we allow arbitrary displacements between 1296 // the text section and its associated TOC section. We place the 1297 // full 8-byte offset to the TOC in memory immediately preceding 1298 // the function global entry point. 1299 if (TM.getCodeModel() == CodeModel::Large 1300 && !MF->getRegInfo().use_empty(PPC::X2)) { 1301 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1302 1303 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1304 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1305 const MCExpr *TOCDeltaExpr = 1306 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1307 MCSymbolRefExpr::create(GlobalEPSymbol, 1308 OutContext), 1309 OutContext); 1310 1311 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1312 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1313 } 1314 return AsmPrinter::EmitFunctionEntryLabel(); 1315 } 1316 1317 // Emit an official procedure descriptor. 1318 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1319 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1320 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1321 OutStreamer->SwitchSection(Section); 1322 OutStreamer->EmitLabel(CurrentFnSym); 1323 OutStreamer->EmitValueToAlignment(8); 1324 MCSymbol *Symbol1 = CurrentFnSymForSize; 1325 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1326 // entry point. 1327 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1328 8 /*size*/); 1329 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1330 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1331 OutStreamer->EmitValue( 1332 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1333 8/*size*/); 1334 // Emit a null environment pointer. 1335 OutStreamer->EmitIntValue(0, 8 /* size */); 1336 OutStreamer->SwitchSection(Current.first, Current.second); 1337 } 1338 1339 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1340 const DataLayout &DL = getDataLayout(); 1341 1342 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1343 1344 PPCTargetStreamer &TS = 1345 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1346 1347 if (!TOC.empty()) { 1348 MCSectionELF *Section; 1349 1350 if (isPPC64) 1351 Section = OutStreamer->getContext().getELFSection( 1352 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1353 else 1354 Section = OutStreamer->getContext().getELFSection( 1355 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1356 OutStreamer->SwitchSection(Section); 1357 1358 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1359 E = TOC.end(); I != E; ++I) { 1360 OutStreamer->EmitLabel(I->second); 1361 MCSymbol *S = I->first; 1362 if (isPPC64) { 1363 TS.emitTCEntry(*S); 1364 } else { 1365 OutStreamer->EmitValueToAlignment(4); 1366 OutStreamer->EmitSymbolValue(S, 4); 1367 } 1368 } 1369 } 1370 1371 return AsmPrinter::doFinalization(M); 1372 } 1373 1374 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1375 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1376 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1377 // provide two entry points. The ABI guarantees that when calling the 1378 // local entry point, r2 is set up by the caller to contain the TOC base 1379 // for this function, and when calling the global entry point, r12 is set 1380 // up by the caller to hold the address of the global entry point. We 1381 // thus emit a prefix sequence along the following lines: 1382 // 1383 // func: 1384 // .Lfunc_gepNN: 1385 // # global entry point 1386 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1387 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1388 // .Lfunc_lepNN: 1389 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1390 // # local entry point, followed by function body 1391 // 1392 // For the Large code model, we create 1393 // 1394 // .Lfunc_tocNN: 1395 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1396 // func: 1397 // .Lfunc_gepNN: 1398 // # global entry point 1399 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1400 // add r2,r2,r12 1401 // .Lfunc_lepNN: 1402 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1403 // # local entry point, followed by function body 1404 // 1405 // This ensures we have r2 set up correctly while executing the function 1406 // body, no matter which entry point is called. 1407 if (Subtarget->isELFv2ABI() 1408 // Only do all that if the function uses r2 in the first place. 1409 && !MF->getRegInfo().use_empty(PPC::X2)) { 1410 // Note: The logic here must be synchronized with the code in the 1411 // branch-selection pass which sets the offset of the first block in the 1412 // function. This matters because it affects the alignment. 1413 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1414 1415 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1416 OutStreamer->EmitLabel(GlobalEntryLabel); 1417 const MCSymbolRefExpr *GlobalEntryLabelExp = 1418 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1419 1420 if (TM.getCodeModel() != CodeModel::Large) { 1421 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1422 const MCExpr *TOCDeltaExpr = 1423 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1424 GlobalEntryLabelExp, OutContext); 1425 1426 const MCExpr *TOCDeltaHi = 1427 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1428 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1429 .addReg(PPC::X2) 1430 .addReg(PPC::X12) 1431 .addExpr(TOCDeltaHi)); 1432 1433 const MCExpr *TOCDeltaLo = 1434 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1435 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1436 .addReg(PPC::X2) 1437 .addReg(PPC::X2) 1438 .addExpr(TOCDeltaLo)); 1439 } else { 1440 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1441 const MCExpr *TOCOffsetDeltaExpr = 1442 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1443 GlobalEntryLabelExp, OutContext); 1444 1445 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1446 .addReg(PPC::X2) 1447 .addExpr(TOCOffsetDeltaExpr) 1448 .addReg(PPC::X12)); 1449 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1450 .addReg(PPC::X2) 1451 .addReg(PPC::X2) 1452 .addReg(PPC::X12)); 1453 } 1454 1455 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1456 OutStreamer->EmitLabel(LocalEntryLabel); 1457 const MCSymbolRefExpr *LocalEntryLabelExp = 1458 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1459 const MCExpr *LocalOffsetExp = 1460 MCBinaryExpr::createSub(LocalEntryLabelExp, 1461 GlobalEntryLabelExp, OutContext); 1462 1463 PPCTargetStreamer *TS = 1464 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1465 1466 if (TS) 1467 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1468 } 1469 } 1470 1471 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1472 /// directive. 1473 /// 1474 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1475 // Only the 64-bit target requires a traceback table. For now, 1476 // we only emit the word of zeroes that GDB requires to find 1477 // the end of the function, and zeroes for the eight-byte 1478 // mandatory fields. 1479 // FIXME: We should fill in the eight-byte mandatory fields as described in 1480 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1481 // currently make use of these fields). 1482 if (Subtarget->isPPC64()) { 1483 OutStreamer->EmitIntValue(0, 4/*size*/); 1484 OutStreamer->EmitIntValue(0, 8/*size*/); 1485 } 1486 } 1487 1488 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1489 static const char *const CPUDirectives[] = { 1490 "", 1491 "ppc", 1492 "ppc440", 1493 "ppc601", 1494 "ppc602", 1495 "ppc603", 1496 "ppc7400", 1497 "ppc750", 1498 "ppc970", 1499 "ppcA2", 1500 "ppce500", 1501 "ppce500mc", 1502 "ppce5500", 1503 "power3", 1504 "power4", 1505 "power5", 1506 "power5x", 1507 "power6", 1508 "power6x", 1509 "power7", 1510 // FIXME: why is power8 missing here? 1511 "ppc64", 1512 "ppc64le", 1513 "power9" 1514 }; 1515 1516 // Get the numerically largest directive. 1517 // FIXME: How should we merge darwin directives? 1518 unsigned Directive = PPC::DIR_NONE; 1519 for (const Function &F : M) { 1520 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1521 unsigned FDir = STI.getDarwinDirective(); 1522 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1523 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1524 Directive = PPC::DIR_970; 1525 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1526 Directive = PPC::DIR_7400; 1527 if (STI.isPPC64() && Directive < PPC::DIR_64) 1528 Directive = PPC::DIR_64; 1529 } 1530 1531 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1532 1533 assert(Directive < array_lengthof(CPUDirectives) && 1534 "CPUDirectives[] might not be up-to-date!"); 1535 PPCTargetStreamer &TStreamer = 1536 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1537 TStreamer.emitMachine(CPUDirectives[Directive]); 1538 1539 // Prime text sections so they are adjacent. This reduces the likelihood a 1540 // large data or debug section causes a branch to exceed 16M limit. 1541 const TargetLoweringObjectFileMachO &TLOFMacho = 1542 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1543 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1544 if (TM.getRelocationModel() == Reloc::PIC_) { 1545 OutStreamer->SwitchSection( 1546 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1547 MachO::S_SYMBOL_STUBS | 1548 MachO::S_ATTR_PURE_INSTRUCTIONS, 1549 32, SectionKind::getText())); 1550 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1551 OutStreamer->SwitchSection( 1552 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1553 MachO::S_SYMBOL_STUBS | 1554 MachO::S_ATTR_PURE_INSTRUCTIONS, 1555 16, SectionKind::getText())); 1556 } 1557 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1558 } 1559 1560 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1561 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1562 1563 // Darwin/PPC always uses mach-o. 1564 const TargetLoweringObjectFileMachO &TLOFMacho = 1565 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1566 if (MMI) { 1567 MachineModuleInfoMachO &MMIMacho = 1568 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1569 1570 if (MAI->doesSupportExceptionHandling()) { 1571 // Add the (possibly multiple) personalities to the set of global values. 1572 // Only referenced functions get into the Personalities list. 1573 for (const Function *Personality : MMI->getPersonalities()) { 1574 if (Personality) { 1575 MCSymbol *NLPSym = 1576 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1577 MachineModuleInfoImpl::StubValueTy &StubSym = 1578 MMIMacho.getGVStubEntry(NLPSym); 1579 StubSym = 1580 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1581 } 1582 } 1583 } 1584 1585 // Output stubs for dynamically-linked functions. 1586 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1587 1588 // Output macho stubs for external and common global variables. 1589 if (!Stubs.empty()) { 1590 // Switch with ".non_lazy_symbol_pointer" directive. 1591 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1592 EmitAlignment(isPPC64 ? 3 : 2); 1593 1594 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1595 // L_foo$stub: 1596 OutStreamer->EmitLabel(Stubs[i].first); 1597 // .indirect_symbol _foo 1598 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1599 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1600 MCSA_IndirectSymbol); 1601 1602 if (MCSym.getInt()) 1603 // External to current translation unit. 1604 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1605 else 1606 // Internal to current translation unit. 1607 // 1608 // When we place the LSDA into the TEXT section, the type info 1609 // pointers 1610 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1611 // However, sometimes the types are local to the file. So we need to 1612 // fill in the value for the NLP in those cases. 1613 OutStreamer->EmitValue( 1614 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1615 isPPC64 ? 8 : 4 /*size*/); 1616 } 1617 1618 Stubs.clear(); 1619 OutStreamer->AddBlankLine(); 1620 } 1621 } 1622 1623 // Funny Darwin hack: This flag tells the linker that no global symbols 1624 // contain code that falls through to other global symbols (e.g. the obvious 1625 // implementation of multiple entry points). If this doesn't occur, the 1626 // linker can safely perform dead code stripping. Since LLVM never generates 1627 // code that does this, it is always safe to set. 1628 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1629 1630 return AsmPrinter::doFinalization(M); 1631 } 1632 1633 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1634 /// for a MachineFunction to the given output stream, in a format that the 1635 /// Darwin assembler can deal with. 1636 /// 1637 static AsmPrinter * 1638 createPPCAsmPrinterPass(TargetMachine &tm, 1639 std::unique_ptr<MCStreamer> &&Streamer) { 1640 if (tm.getTargetTriple().isMacOSX()) 1641 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1642 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1643 } 1644 1645 // Force static initialization. 1646 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1647 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1648 createPPCAsmPrinterPass); 1649 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1650 createPPCAsmPrinterPass); 1651 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1652 createPPCAsmPrinterPass); 1653 } 1654