1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "InstPrinter/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "llvm/ADT/MapVector.h" 29 #include "llvm/ADT/StringRef.h" 30 #include "llvm/ADT/Triple.h" 31 #include "llvm/ADT/Twine.h" 32 #include "llvm/BinaryFormat/ELF.h" 33 #include "llvm/BinaryFormat/MachO.h" 34 #include "llvm/CodeGen/AsmPrinter.h" 35 #include "llvm/CodeGen/MachineBasicBlock.h" 36 #include "llvm/CodeGen/MachineFunction.h" 37 #include "llvm/CodeGen/MachineInstr.h" 38 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 39 #include "llvm/CodeGen/MachineOperand.h" 40 #include "llvm/CodeGen/MachineRegisterInfo.h" 41 #include "llvm/CodeGen/StackMaps.h" 42 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 43 #include "llvm/IR/DataLayout.h" 44 #include "llvm/IR/GlobalValue.h" 45 #include "llvm/IR/Module.h" 46 #include "llvm/MC/MCAsmInfo.h" 47 #include "llvm/MC/MCContext.h" 48 #include "llvm/MC/MCExpr.h" 49 #include "llvm/MC/MCInst.h" 50 #include "llvm/MC/MCInstBuilder.h" 51 #include "llvm/MC/MCSectionELF.h" 52 #include "llvm/MC/MCSectionMachO.h" 53 #include "llvm/MC/MCStreamer.h" 54 #include "llvm/MC/MCSymbol.h" 55 #include "llvm/MC/MCSymbolELF.h" 56 #include "llvm/MC/SectionKind.h" 57 #include "llvm/Support/Casting.h" 58 #include "llvm/Support/CodeGen.h" 59 #include "llvm/Support/Debug.h" 60 #include "llvm/Support/ErrorHandling.h" 61 #include "llvm/Support/TargetRegistry.h" 62 #include "llvm/Support/raw_ostream.h" 63 #include "llvm/Target/TargetMachine.h" 64 #include <algorithm> 65 #include <cassert> 66 #include <cstdint> 67 #include <memory> 68 #include <new> 69 70 using namespace llvm; 71 72 #define DEBUG_TYPE "asmprinter" 73 74 namespace { 75 76 class PPCAsmPrinter : public AsmPrinter { 77 protected: 78 MapVector<MCSymbol *, MCSymbol *> TOC; 79 const PPCSubtarget *Subtarget; 80 StackMaps SM; 81 82 public: 83 explicit PPCAsmPrinter(TargetMachine &TM, 84 std::unique_ptr<MCStreamer> Streamer) 85 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 86 87 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 88 89 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 90 91 bool doInitialization(Module &M) override { 92 if (!TOC.empty()) 93 TOC.clear(); 94 return AsmPrinter::doInitialization(M); 95 } 96 97 void EmitInstruction(const MachineInstr *MI) override; 98 99 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 100 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 101 /// The \p MI would be INLINEASM ONLY. 102 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 103 104 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 105 unsigned AsmVariant, const char *ExtraCode, 106 raw_ostream &O) override; 107 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 108 unsigned AsmVariant, const char *ExtraCode, 109 raw_ostream &O) override; 110 111 void EmitEndOfAsmFile(Module &M) override; 112 113 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 114 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 115 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 116 bool runOnMachineFunction(MachineFunction &MF) override { 117 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 118 bool Changed = AsmPrinter::runOnMachineFunction(MF); 119 emitXRayTable(); 120 return Changed; 121 } 122 }; 123 124 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 125 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 126 public: 127 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 128 std::unique_ptr<MCStreamer> Streamer) 129 : PPCAsmPrinter(TM, std::move(Streamer)) {} 130 131 StringRef getPassName() const override { 132 return "Linux PPC Assembly Printer"; 133 } 134 135 bool doFinalization(Module &M) override; 136 void EmitStartOfAsmFile(Module &M) override; 137 138 void EmitFunctionEntryLabel() override; 139 140 void EmitFunctionBodyStart() override; 141 void EmitFunctionBodyEnd() override; 142 void EmitInstruction(const MachineInstr *MI) override; 143 }; 144 145 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 146 /// OS X 147 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 148 public: 149 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 150 std::unique_ptr<MCStreamer> Streamer) 151 : PPCAsmPrinter(TM, std::move(Streamer)) {} 152 153 StringRef getPassName() const override { 154 return "Darwin PPC Assembly Printer"; 155 } 156 157 bool doFinalization(Module &M) override; 158 void EmitStartOfAsmFile(Module &M) override; 159 }; 160 161 } // end anonymous namespace 162 163 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 164 raw_ostream &O) { 165 const DataLayout &DL = getDataLayout(); 166 const MachineOperand &MO = MI->getOperand(OpNo); 167 168 switch (MO.getType()) { 169 case MachineOperand::MO_Register: { 170 // The MI is INLINEASM ONLY and UseVSXReg is always false. 171 unsigned Reg = 172 PPCInstrInfo::getRegNumForOperand(MI->getDesc(), MO.getReg(), OpNo); 173 174 const char *RegName = PPCInstPrinter::getRegisterName(Reg); 175 176 // Linux assembler (Others?) does not take register mnemonics. 177 // FIXME - What about special registers used in mfspr/mtspr? 178 if (!Subtarget->isDarwin()) 179 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 180 O << RegName; 181 return; 182 } 183 case MachineOperand::MO_Immediate: 184 O << MO.getImm(); 185 return; 186 187 case MachineOperand::MO_MachineBasicBlock: 188 MO.getMBB()->getSymbol()->print(O, MAI); 189 return; 190 case MachineOperand::MO_ConstantPoolIndex: 191 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 192 << MO.getIndex(); 193 return; 194 case MachineOperand::MO_BlockAddress: 195 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 196 return; 197 case MachineOperand::MO_GlobalAddress: { 198 // Computing the address of a global symbol, not calling it. 199 const GlobalValue *GV = MO.getGlobal(); 200 MCSymbol *SymToPrint; 201 202 // External or weakly linked global variables need non-lazily-resolved stubs 203 if (Subtarget->hasLazyResolverStub(GV)) { 204 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 205 MachineModuleInfoImpl::StubValueTy &StubSym = 206 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 207 SymToPrint); 208 if (!StubSym.getPointer()) 209 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 210 !GV->hasInternalLinkage()); 211 } else { 212 SymToPrint = getSymbol(GV); 213 } 214 215 SymToPrint->print(O, MAI); 216 217 printOffset(MO.getOffset(), O); 218 return; 219 } 220 221 default: 222 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 223 return; 224 } 225 } 226 227 /// PrintAsmOperand - Print out an operand for an inline asm expression. 228 /// 229 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 230 unsigned AsmVariant, 231 const char *ExtraCode, raw_ostream &O) { 232 // Does this asm operand have a single letter operand modifier? 233 if (ExtraCode && ExtraCode[0]) { 234 if (ExtraCode[1] != 0) return true; // Unknown modifier. 235 236 switch (ExtraCode[0]) { 237 default: 238 // See if this is a generic print operand 239 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 240 case 'c': // Don't print "$" before a global var name or constant. 241 break; // PPC never has a prefix. 242 case 'L': // Write second word of DImode reference. 243 // Verify that this operand has two consecutive registers. 244 if (!MI->getOperand(OpNo).isReg() || 245 OpNo+1 == MI->getNumOperands() || 246 !MI->getOperand(OpNo+1).isReg()) 247 return true; 248 ++OpNo; // Return the high-part. 249 break; 250 case 'I': 251 // Write 'i' if an integer constant, otherwise nothing. Used to print 252 // addi vs add, etc. 253 if (MI->getOperand(OpNo).isImm()) 254 O << "i"; 255 return false; 256 case 'x': 257 if(!MI->getOperand(OpNo).isReg()) 258 return true; 259 // This operand uses VSX numbering. 260 // If the operand is a VMX register, convert it to a VSX register. 261 unsigned Reg = MI->getOperand(OpNo).getReg(); 262 if (PPCInstrInfo::isVRRegister(Reg)) 263 Reg = PPC::VSX32 + (Reg - PPC::V0); 264 else if (PPCInstrInfo::isVFRegister(Reg)) 265 Reg = PPC::VSX32 + (Reg - PPC::VF0); 266 const char *RegName; 267 RegName = PPCInstPrinter::getRegisterName(Reg); 268 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 269 O << RegName; 270 return false; 271 } 272 } 273 274 printOperand(MI, OpNo, O); 275 return false; 276 } 277 278 // At the moment, all inline asm memory operands are a single register. 279 // In any case, the output of this routine should always be just one 280 // assembler operand. 281 282 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 283 unsigned AsmVariant, 284 const char *ExtraCode, 285 raw_ostream &O) { 286 if (ExtraCode && ExtraCode[0]) { 287 if (ExtraCode[1] != 0) return true; // Unknown modifier. 288 289 switch (ExtraCode[0]) { 290 default: return true; // Unknown modifier. 291 case 'y': // A memory reference for an X-form instruction 292 { 293 const char *RegName = "r0"; 294 if (!Subtarget->isDarwin()) 295 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 296 O << RegName << ", "; 297 printOperand(MI, OpNo, O); 298 return false; 299 } 300 case 'U': // Print 'u' for update form. 301 case 'X': // Print 'x' for indexed form. 302 { 303 // FIXME: Currently for PowerPC memory operands are always loaded 304 // into a register, so we never get an update or indexed form. 305 // This is bad even for offset forms, since even if we know we 306 // have a value in -16(r1), we will generate a load into r<n> 307 // and then load from 0(r<n>). Until that issue is fixed, 308 // tolerate 'U' and 'X' but don't output anything. 309 assert(MI->getOperand(OpNo).isReg()); 310 return false; 311 } 312 } 313 } 314 315 assert(MI->getOperand(OpNo).isReg()); 316 O << "0("; 317 printOperand(MI, OpNo, O); 318 O << ")"; 319 return false; 320 } 321 322 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 323 /// exists for it. If not, create one. Then return a symbol that references 324 /// the TOC entry. 325 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 326 MCSymbol *&TOCEntry = TOC[Sym]; 327 if (!TOCEntry) 328 TOCEntry = createTempSymbol("C"); 329 return TOCEntry; 330 } 331 332 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 333 emitStackMaps(SM); 334 } 335 336 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 337 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 338 339 SM.recordStackMap(MI); 340 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 341 342 // Scan ahead to trim the shadow. 343 const MachineBasicBlock &MBB = *MI.getParent(); 344 MachineBasicBlock::const_iterator MII(MI); 345 ++MII; 346 while (NumNOPBytes > 0) { 347 if (MII == MBB.end() || MII->isCall() || 348 MII->getOpcode() == PPC::DBG_VALUE || 349 MII->getOpcode() == TargetOpcode::PATCHPOINT || 350 MII->getOpcode() == TargetOpcode::STACKMAP) 351 break; 352 ++MII; 353 NumNOPBytes -= 4; 354 } 355 356 // Emit nops. 357 for (unsigned i = 0; i < NumNOPBytes; i += 4) 358 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 359 } 360 361 // Lower a patchpoint of the form: 362 // [<def>], <id>, <numBytes>, <target>, <numArgs> 363 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 364 SM.recordPatchPoint(MI); 365 PatchPointOpers Opers(&MI); 366 367 unsigned EncodedBytes = 0; 368 const MachineOperand &CalleeMO = Opers.getCallTarget(); 369 370 if (CalleeMO.isImm()) { 371 int64_t CallTarget = CalleeMO.getImm(); 372 if (CallTarget) { 373 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 374 "High 16 bits of call target should be zero."); 375 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 376 EncodedBytes = 0; 377 // Materialize the jump address: 378 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 379 .addReg(ScratchReg) 380 .addImm((CallTarget >> 32) & 0xFFFF)); 381 ++EncodedBytes; 382 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 383 .addReg(ScratchReg) 384 .addReg(ScratchReg) 385 .addImm(32).addImm(16)); 386 ++EncodedBytes; 387 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 388 .addReg(ScratchReg) 389 .addReg(ScratchReg) 390 .addImm((CallTarget >> 16) & 0xFFFF)); 391 ++EncodedBytes; 392 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 393 .addReg(ScratchReg) 394 .addReg(ScratchReg) 395 .addImm(CallTarget & 0xFFFF)); 396 397 // Save the current TOC pointer before the remote call. 398 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 399 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 400 .addReg(PPC::X2) 401 .addImm(TOCSaveOffset) 402 .addReg(PPC::X1)); 403 ++EncodedBytes; 404 405 // If we're on ELFv1, then we need to load the actual function pointer 406 // from the function descriptor. 407 if (!Subtarget->isELFv2ABI()) { 408 // Load the new TOC pointer and the function address, but not r11 409 // (needing this is rare, and loading it here would prevent passing it 410 // via a 'nest' parameter. 411 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 412 .addReg(PPC::X2) 413 .addImm(8) 414 .addReg(ScratchReg)); 415 ++EncodedBytes; 416 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 417 .addReg(ScratchReg) 418 .addImm(0) 419 .addReg(ScratchReg)); 420 ++EncodedBytes; 421 } 422 423 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 424 .addReg(ScratchReg)); 425 ++EncodedBytes; 426 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 427 ++EncodedBytes; 428 429 // Restore the TOC pointer after the call. 430 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 431 .addReg(PPC::X2) 432 .addImm(TOCSaveOffset) 433 .addReg(PPC::X1)); 434 ++EncodedBytes; 435 } 436 } else if (CalleeMO.isGlobal()) { 437 const GlobalValue *GValue = CalleeMO.getGlobal(); 438 MCSymbol *MOSymbol = getSymbol(GValue); 439 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 440 441 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 442 .addExpr(SymVar)); 443 EncodedBytes += 2; 444 } 445 446 // Each instruction is 4 bytes. 447 EncodedBytes *= 4; 448 449 // Emit padding. 450 unsigned NumBytes = Opers.getNumPatchBytes(); 451 assert(NumBytes >= EncodedBytes && 452 "Patchpoint can't request size less than the length of a call."); 453 assert((NumBytes - EncodedBytes) % 4 == 0 && 454 "Invalid number of NOP bytes requested!"); 455 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 456 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 457 } 458 459 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 460 /// call to __tls_get_addr to the current output stream. 461 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 462 MCSymbolRefExpr::VariantKind VK) { 463 StringRef Name = "__tls_get_addr"; 464 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 465 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 466 467 assert(MI->getOperand(0).isReg() && 468 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 469 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 470 "GETtls[ld]ADDR[32] must define GPR3"); 471 assert(MI->getOperand(1).isReg() && 472 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 473 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 474 "GETtls[ld]ADDR[32] must read GPR3"); 475 476 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 477 isPositionIndependent()) 478 Kind = MCSymbolRefExpr::VK_PLT; 479 const MCExpr *TlsRef = 480 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 481 482 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 483 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt()) 484 TlsRef = MCBinaryExpr::createAdd(TlsRef, 485 MCConstantExpr::create(32768, OutContext), 486 OutContext); 487 const MachineOperand &MO = MI->getOperand(2); 488 const GlobalValue *GValue = MO.getGlobal(); 489 MCSymbol *MOSymbol = getSymbol(GValue); 490 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 491 EmitToStreamer(*OutStreamer, 492 MCInstBuilder(Subtarget->isPPC64() ? 493 PPC::BL8_NOP_TLS : PPC::BL_TLS) 494 .addExpr(TlsRef) 495 .addExpr(SymVar)); 496 } 497 498 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 499 /// the current output stream. 500 /// 501 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 502 MCInst TmpInst; 503 bool isPPC64 = Subtarget->isPPC64(); 504 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 505 const Module *M = MF->getFunction().getParent(); 506 PICLevel::Level PL = M->getPICLevel(); 507 508 #ifndef NDEBUG 509 // Validate that SPE and FPU are mutually exclusive in codegen 510 if (!MI->isInlineAsm()) { 511 for (const MachineOperand &MO: MI->operands()) { 512 if (MO.isReg()) { 513 unsigned Reg = MO.getReg(); 514 if (Subtarget->hasSPE()) { 515 if (PPC::F4RCRegClass.contains(Reg) || 516 PPC::F8RCRegClass.contains(Reg) || 517 PPC::QBRCRegClass.contains(Reg) || 518 PPC::QFRCRegClass.contains(Reg) || 519 PPC::QSRCRegClass.contains(Reg) || 520 PPC::VFRCRegClass.contains(Reg) || 521 PPC::VRRCRegClass.contains(Reg) || 522 PPC::VSFRCRegClass.contains(Reg) || 523 PPC::VSSRCRegClass.contains(Reg) 524 ) 525 llvm_unreachable("SPE targets cannot have FPRegs!"); 526 } else { 527 if (PPC::SPERCRegClass.contains(Reg)) 528 llvm_unreachable("SPE register found in FPU-targeted code!"); 529 } 530 } 531 } 532 } 533 #endif 534 // Lower multi-instruction pseudo operations. 535 switch (MI->getOpcode()) { 536 default: break; 537 case TargetOpcode::DBG_VALUE: 538 llvm_unreachable("Should be handled target independently"); 539 case TargetOpcode::STACKMAP: 540 return LowerSTACKMAP(SM, *MI); 541 case TargetOpcode::PATCHPOINT: 542 return LowerPATCHPOINT(SM, *MI); 543 544 case PPC::MoveGOTtoLR: { 545 // Transform %lr = MoveGOTtoLR 546 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 547 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 548 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 549 // blrl 550 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 551 MCSymbol *GOTSymbol = 552 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 553 const MCExpr *OffsExpr = 554 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 555 MCSymbolRefExpr::VK_PPC_LOCAL, 556 OutContext), 557 MCConstantExpr::create(4, OutContext), 558 OutContext); 559 560 // Emit the 'bl'. 561 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 562 return; 563 } 564 case PPC::MovePCtoLR: 565 case PPC::MovePCtoLR8: { 566 // Transform %lr = MovePCtoLR 567 // Into this, where the label is the PIC base: 568 // bl L1$pb 569 // L1$pb: 570 MCSymbol *PICBase = MF->getPICBaseSymbol(); 571 572 // Emit the 'bl'. 573 EmitToStreamer(*OutStreamer, 574 MCInstBuilder(PPC::BL) 575 // FIXME: We would like an efficient form for this, so we 576 // don't have to do a lot of extra uniquing. 577 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 578 579 // Emit the label. 580 OutStreamer->EmitLabel(PICBase); 581 return; 582 } 583 case PPC::UpdateGBR: { 584 // Transform %rd = UpdateGBR(%rt, %ri) 585 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 586 // add %rd, %rt, %ri 587 // or into (if secure plt mode is on): 588 // addis r30, r30, .LTOC - .L0$pb@ha 589 // addi r30, r30, .LTOC - .L0$pb@l 590 // Get the offset from the GOT Base Register to the GOT 591 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 592 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 593 unsigned PICR = TmpInst.getOperand(0).getReg(); 594 MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC")); 595 const MCExpr *PB = 596 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 597 OutContext); 598 599 const MCExpr *LTOCDeltaExpr = 600 MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext), 601 PB, OutContext); 602 603 const MCExpr *LTOCDeltaHi = 604 PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext); 605 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 606 .addReg(PICR) 607 .addReg(PICR) 608 .addExpr(LTOCDeltaHi)); 609 610 const MCExpr *LTOCDeltaLo = 611 PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext); 612 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 613 .addReg(PICR) 614 .addReg(PICR) 615 .addExpr(LTOCDeltaLo)); 616 return; 617 } else { 618 MCSymbol *PICOffset = 619 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 620 TmpInst.setOpcode(PPC::LWZ); 621 const MCExpr *Exp = 622 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 623 const MCExpr *PB = 624 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 625 MCSymbolRefExpr::VK_None, 626 OutContext); 627 const MCOperand TR = TmpInst.getOperand(1); 628 const MCOperand PICR = TmpInst.getOperand(0); 629 630 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 631 TmpInst.getOperand(1) = 632 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 633 TmpInst.getOperand(0) = TR; 634 TmpInst.getOperand(2) = PICR; 635 EmitToStreamer(*OutStreamer, TmpInst); 636 637 TmpInst.setOpcode(PPC::ADD4); 638 TmpInst.getOperand(0) = PICR; 639 TmpInst.getOperand(1) = TR; 640 TmpInst.getOperand(2) = PICR; 641 EmitToStreamer(*OutStreamer, TmpInst); 642 return; 643 } 644 } 645 case PPC::LWZtoc: { 646 // Transform %r3 = LWZtoc @min1, %r2 647 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 648 649 // Change the opcode to LWZ, and the global address operand to be a 650 // reference to the GOT entry we will synthesize later. 651 TmpInst.setOpcode(PPC::LWZ); 652 const MachineOperand &MO = MI->getOperand(1); 653 654 // Map symbol -> label of TOC entry 655 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 656 MCSymbol *MOSymbol = nullptr; 657 if (MO.isGlobal()) 658 MOSymbol = getSymbol(MO.getGlobal()); 659 else if (MO.isCPI()) 660 MOSymbol = GetCPISymbol(MO.getIndex()); 661 else if (MO.isJTI()) 662 MOSymbol = GetJTISymbol(MO.getIndex()); 663 else if (MO.isBlockAddress()) 664 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 665 666 if (PL == PICLevel::SmallPIC) { 667 const MCExpr *Exp = 668 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 669 OutContext); 670 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 671 } else { 672 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 673 674 const MCExpr *Exp = 675 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 676 OutContext); 677 const MCExpr *PB = 678 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 679 OutContext); 680 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 681 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 682 } 683 EmitToStreamer(*OutStreamer, TmpInst); 684 return; 685 } 686 case PPC::LDtocJTI: 687 case PPC::LDtocCPT: 688 case PPC::LDtocBA: 689 case PPC::LDtoc: { 690 // Transform %x3 = LDtoc @min1, %x2 691 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 692 693 // Change the opcode to LD, and the global address operand to be a 694 // reference to the TOC entry we will synthesize later. 695 TmpInst.setOpcode(PPC::LD); 696 const MachineOperand &MO = MI->getOperand(1); 697 698 // Map symbol -> label of TOC entry 699 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 700 MCSymbol *MOSymbol = nullptr; 701 if (MO.isGlobal()) 702 MOSymbol = getSymbol(MO.getGlobal()); 703 else if (MO.isCPI()) 704 MOSymbol = GetCPISymbol(MO.getIndex()); 705 else if (MO.isJTI()) 706 MOSymbol = GetJTISymbol(MO.getIndex()); 707 else if (MO.isBlockAddress()) 708 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 709 710 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 711 712 const MCExpr *Exp = 713 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 714 OutContext); 715 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 716 EmitToStreamer(*OutStreamer, TmpInst); 717 return; 718 } 719 720 case PPC::ADDIStocHA: { 721 // Transform %xd = ADDIStocHA %x2, @sym 722 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 723 724 // Change the opcode to ADDIS8. If the global address is external, has 725 // common linkage, is a non-local function address, or is a jump table 726 // address, then generate a TOC entry and reference that. Otherwise 727 // reference the symbol directly. 728 TmpInst.setOpcode(PPC::ADDIS8); 729 const MachineOperand &MO = MI->getOperand(2); 730 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 731 MO.isBlockAddress()) && 732 "Invalid operand for ADDIStocHA!"); 733 MCSymbol *MOSymbol = nullptr; 734 bool GlobalToc = false; 735 736 if (MO.isGlobal()) { 737 const GlobalValue *GV = MO.getGlobal(); 738 MOSymbol = getSymbol(GV); 739 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 740 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 741 } else if (MO.isCPI()) { 742 MOSymbol = GetCPISymbol(MO.getIndex()); 743 } else if (MO.isJTI()) { 744 MOSymbol = GetJTISymbol(MO.getIndex()); 745 } else if (MO.isBlockAddress()) { 746 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 747 } 748 749 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 750 TM.getCodeModel() == CodeModel::Large) 751 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 752 753 const MCExpr *Exp = 754 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 755 OutContext); 756 757 if (!MO.isJTI() && MO.getOffset()) 758 Exp = MCBinaryExpr::createAdd(Exp, 759 MCConstantExpr::create(MO.getOffset(), 760 OutContext), 761 OutContext); 762 763 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 764 EmitToStreamer(*OutStreamer, TmpInst); 765 return; 766 } 767 case PPC::LDtocL: { 768 // Transform %xd = LDtocL @sym, %xs 769 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 770 771 // Change the opcode to LD. If the global address is external, has 772 // common linkage, or is a jump table address, then reference the 773 // associated TOC entry. Otherwise reference the symbol directly. 774 TmpInst.setOpcode(PPC::LD); 775 const MachineOperand &MO = MI->getOperand(1); 776 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 777 MO.isBlockAddress()) && 778 "Invalid operand for LDtocL!"); 779 MCSymbol *MOSymbol = nullptr; 780 781 if (MO.isJTI()) 782 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 783 else if (MO.isBlockAddress()) { 784 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 785 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 786 } 787 else if (MO.isCPI()) { 788 MOSymbol = GetCPISymbol(MO.getIndex()); 789 if (TM.getCodeModel() == CodeModel::Large) 790 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 791 } 792 else if (MO.isGlobal()) { 793 const GlobalValue *GV = MO.getGlobal(); 794 MOSymbol = getSymbol(GV); 795 LLVM_DEBUG( 796 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 797 assert((GVFlags & PPCII::MO_NLP_FLAG) && 798 "LDtocL used on symbol that could be accessed directly is " 799 "invalid. Must match ADDIStocHA.")); 800 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 801 } 802 803 const MCExpr *Exp = 804 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 805 OutContext); 806 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 807 EmitToStreamer(*OutStreamer, TmpInst); 808 return; 809 } 810 case PPC::ADDItocL: { 811 // Transform %xd = ADDItocL %xs, @sym 812 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 813 814 // Change the opcode to ADDI8. If the global address is external, then 815 // generate a TOC entry and reference that. Otherwise reference the 816 // symbol directly. 817 TmpInst.setOpcode(PPC::ADDI8); 818 const MachineOperand &MO = MI->getOperand(2); 819 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 820 MCSymbol *MOSymbol = nullptr; 821 822 if (MO.isGlobal()) { 823 const GlobalValue *GV = MO.getGlobal(); 824 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 825 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 826 "Interposable definitions must use indirect access.")); 827 MOSymbol = getSymbol(GV); 828 } else if (MO.isCPI()) { 829 MOSymbol = GetCPISymbol(MO.getIndex()); 830 } 831 832 const MCExpr *Exp = 833 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 834 OutContext); 835 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 836 EmitToStreamer(*OutStreamer, TmpInst); 837 return; 838 } 839 case PPC::ADDISgotTprelHA: { 840 // Transform: %xd = ADDISgotTprelHA %x2, @sym 841 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 842 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 843 const MachineOperand &MO = MI->getOperand(2); 844 const GlobalValue *GValue = MO.getGlobal(); 845 MCSymbol *MOSymbol = getSymbol(GValue); 846 const MCExpr *SymGotTprel = 847 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 848 OutContext); 849 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 850 .addReg(MI->getOperand(0).getReg()) 851 .addReg(MI->getOperand(1).getReg()) 852 .addExpr(SymGotTprel)); 853 return; 854 } 855 case PPC::LDgotTprelL: 856 case PPC::LDgotTprelL32: { 857 // Transform %xd = LDgotTprelL @sym, %xs 858 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 859 860 // Change the opcode to LD. 861 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 862 const MachineOperand &MO = MI->getOperand(1); 863 const GlobalValue *GValue = MO.getGlobal(); 864 MCSymbol *MOSymbol = getSymbol(GValue); 865 const MCExpr *Exp = 866 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO, 867 OutContext); 868 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 869 EmitToStreamer(*OutStreamer, TmpInst); 870 return; 871 } 872 873 case PPC::PPC32PICGOT: { 874 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 875 MCSymbol *GOTRef = OutContext.createTempSymbol(); 876 MCSymbol *NextInstr = OutContext.createTempSymbol(); 877 878 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 879 // FIXME: We would like an efficient form for this, so we don't have to do 880 // a lot of extra uniquing. 881 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 882 const MCExpr *OffsExpr = 883 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 884 MCSymbolRefExpr::create(GOTRef, OutContext), 885 OutContext); 886 OutStreamer->EmitLabel(GOTRef); 887 OutStreamer->EmitValue(OffsExpr, 4); 888 OutStreamer->EmitLabel(NextInstr); 889 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 890 .addReg(MI->getOperand(0).getReg())); 891 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 892 .addReg(MI->getOperand(1).getReg()) 893 .addImm(0) 894 .addReg(MI->getOperand(0).getReg())); 895 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 896 .addReg(MI->getOperand(0).getReg()) 897 .addReg(MI->getOperand(1).getReg()) 898 .addReg(MI->getOperand(0).getReg())); 899 return; 900 } 901 case PPC::PPC32GOT: { 902 MCSymbol *GOTSymbol = 903 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 904 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 905 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 906 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 907 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 908 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 909 .addReg(MI->getOperand(0).getReg()) 910 .addExpr(SymGotTlsL)); 911 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 912 .addReg(MI->getOperand(0).getReg()) 913 .addReg(MI->getOperand(0).getReg()) 914 .addExpr(SymGotTlsHA)); 915 return; 916 } 917 case PPC::ADDIStlsgdHA: { 918 // Transform: %xd = ADDIStlsgdHA %x2, @sym 919 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 920 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 921 const MachineOperand &MO = MI->getOperand(2); 922 const GlobalValue *GValue = MO.getGlobal(); 923 MCSymbol *MOSymbol = getSymbol(GValue); 924 const MCExpr *SymGotTlsGD = 925 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 926 OutContext); 927 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 928 .addReg(MI->getOperand(0).getReg()) 929 .addReg(MI->getOperand(1).getReg()) 930 .addExpr(SymGotTlsGD)); 931 return; 932 } 933 case PPC::ADDItlsgdL: 934 // Transform: %xd = ADDItlsgdL %xs, @sym 935 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 936 case PPC::ADDItlsgdL32: { 937 // Transform: %rd = ADDItlsgdL32 %rs, @sym 938 // Into: %rd = ADDI %rs, sym@got@tlsgd 939 const MachineOperand &MO = MI->getOperand(2); 940 const GlobalValue *GValue = MO.getGlobal(); 941 MCSymbol *MOSymbol = getSymbol(GValue); 942 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 943 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 944 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 945 OutContext); 946 EmitToStreamer(*OutStreamer, 947 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 948 .addReg(MI->getOperand(0).getReg()) 949 .addReg(MI->getOperand(1).getReg()) 950 .addExpr(SymGotTlsGD)); 951 return; 952 } 953 case PPC::GETtlsADDR: 954 // Transform: %x3 = GETtlsADDR %x3, @sym 955 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 956 case PPC::GETtlsADDR32: { 957 // Transform: %r3 = GETtlsADDR32 %r3, @sym 958 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 959 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 960 return; 961 } 962 case PPC::ADDIStlsldHA: { 963 // Transform: %xd = ADDIStlsldHA %x2, @sym 964 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 965 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 966 const MachineOperand &MO = MI->getOperand(2); 967 const GlobalValue *GValue = MO.getGlobal(); 968 MCSymbol *MOSymbol = getSymbol(GValue); 969 const MCExpr *SymGotTlsLD = 970 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 971 OutContext); 972 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 973 .addReg(MI->getOperand(0).getReg()) 974 .addReg(MI->getOperand(1).getReg()) 975 .addExpr(SymGotTlsLD)); 976 return; 977 } 978 case PPC::ADDItlsldL: 979 // Transform: %xd = ADDItlsldL %xs, @sym 980 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 981 case PPC::ADDItlsldL32: { 982 // Transform: %rd = ADDItlsldL32 %rs, @sym 983 // Into: %rd = ADDI %rs, sym@got@tlsld 984 const MachineOperand &MO = MI->getOperand(2); 985 const GlobalValue *GValue = MO.getGlobal(); 986 MCSymbol *MOSymbol = getSymbol(GValue); 987 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 988 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 989 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 990 OutContext); 991 EmitToStreamer(*OutStreamer, 992 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 993 .addReg(MI->getOperand(0).getReg()) 994 .addReg(MI->getOperand(1).getReg()) 995 .addExpr(SymGotTlsLD)); 996 return; 997 } 998 case PPC::GETtlsldADDR: 999 // Transform: %x3 = GETtlsldADDR %x3, @sym 1000 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1001 case PPC::GETtlsldADDR32: { 1002 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1003 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1004 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1005 return; 1006 } 1007 case PPC::ADDISdtprelHA: 1008 // Transform: %xd = ADDISdtprelHA %xs, @sym 1009 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1010 case PPC::ADDISdtprelHA32: { 1011 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1012 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1013 const MachineOperand &MO = MI->getOperand(2); 1014 const GlobalValue *GValue = MO.getGlobal(); 1015 MCSymbol *MOSymbol = getSymbol(GValue); 1016 const MCExpr *SymDtprel = 1017 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1018 OutContext); 1019 EmitToStreamer( 1020 *OutStreamer, 1021 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1022 .addReg(MI->getOperand(0).getReg()) 1023 .addReg(MI->getOperand(1).getReg()) 1024 .addExpr(SymDtprel)); 1025 return; 1026 } 1027 case PPC::ADDIdtprelL: 1028 // Transform: %xd = ADDIdtprelL %xs, @sym 1029 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1030 case PPC::ADDIdtprelL32: { 1031 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1032 // Into: %rd = ADDI %rs, sym@dtprel@l 1033 const MachineOperand &MO = MI->getOperand(2); 1034 const GlobalValue *GValue = MO.getGlobal(); 1035 MCSymbol *MOSymbol = getSymbol(GValue); 1036 const MCExpr *SymDtprel = 1037 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1038 OutContext); 1039 EmitToStreamer(*OutStreamer, 1040 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1041 .addReg(MI->getOperand(0).getReg()) 1042 .addReg(MI->getOperand(1).getReg()) 1043 .addExpr(SymDtprel)); 1044 return; 1045 } 1046 case PPC::MFOCRF: 1047 case PPC::MFOCRF8: 1048 if (!Subtarget->hasMFOCRF()) { 1049 // Transform: %r3 = MFOCRF %cr7 1050 // Into: %r3 = MFCR ;; cr7 1051 unsigned NewOpcode = 1052 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1053 OutStreamer->AddComment(PPCInstPrinter:: 1054 getRegisterName(MI->getOperand(1).getReg())); 1055 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1056 .addReg(MI->getOperand(0).getReg())); 1057 return; 1058 } 1059 break; 1060 case PPC::MTOCRF: 1061 case PPC::MTOCRF8: 1062 if (!Subtarget->hasMFOCRF()) { 1063 // Transform: %cr7 = MTOCRF %r3 1064 // Into: MTCRF mask, %r3 ;; cr7 1065 unsigned NewOpcode = 1066 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1067 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1068 ->getEncodingValue(MI->getOperand(0).getReg()); 1069 OutStreamer->AddComment(PPCInstPrinter:: 1070 getRegisterName(MI->getOperand(0).getReg())); 1071 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1072 .addImm(Mask) 1073 .addReg(MI->getOperand(1).getReg())); 1074 return; 1075 } 1076 break; 1077 case PPC::LD: 1078 case PPC::STD: 1079 case PPC::LWA_32: 1080 case PPC::LWA: { 1081 // Verify alignment is legal, so we don't create relocations 1082 // that can't be supported. 1083 // FIXME: This test is currently disabled for Darwin. The test 1084 // suite shows a handful of test cases that fail this check for 1085 // Darwin. Those need to be investigated before this sanity test 1086 // can be enabled for those subtargets. 1087 if (!Subtarget->isDarwin()) { 1088 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1089 const MachineOperand &MO = MI->getOperand(OpNum); 1090 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1091 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1092 } 1093 // Now process the instruction normally. 1094 break; 1095 } 1096 } 1097 1098 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1099 EmitToStreamer(*OutStreamer, TmpInst); 1100 } 1101 1102 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1103 if (!Subtarget->isPPC64()) 1104 return PPCAsmPrinter::EmitInstruction(MI); 1105 1106 switch (MI->getOpcode()) { 1107 default: 1108 return PPCAsmPrinter::EmitInstruction(MI); 1109 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1110 // .begin: 1111 // b .end # lis 0, FuncId[16..32] 1112 // nop # li 0, FuncId[0..15] 1113 // std 0, -8(1) 1114 // mflr 0 1115 // bl __xray_FunctionEntry 1116 // mtlr 0 1117 // .end: 1118 // 1119 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1120 // of instructions change. 1121 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1122 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1123 OutStreamer->EmitLabel(BeginOfSled); 1124 EmitToStreamer(*OutStreamer, 1125 MCInstBuilder(PPC::B).addExpr( 1126 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1127 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1128 EmitToStreamer( 1129 *OutStreamer, 1130 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1131 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1132 EmitToStreamer(*OutStreamer, 1133 MCInstBuilder(PPC::BL8_NOP) 1134 .addExpr(MCSymbolRefExpr::create( 1135 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1136 OutContext))); 1137 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1138 OutStreamer->EmitLabel(EndOfSled); 1139 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1140 break; 1141 } 1142 case TargetOpcode::PATCHABLE_RET: { 1143 unsigned RetOpcode = MI->getOperand(0).getImm(); 1144 MCInst RetInst; 1145 RetInst.setOpcode(RetOpcode); 1146 for (const auto &MO : 1147 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1148 MCOperand MCOp; 1149 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1150 RetInst.addOperand(MCOp); 1151 } 1152 1153 bool IsConditional; 1154 if (RetOpcode == PPC::BCCLR) { 1155 IsConditional = true; 1156 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1157 RetOpcode == PPC::TCRETURNai8) { 1158 break; 1159 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1160 IsConditional = false; 1161 } else { 1162 EmitToStreamer(*OutStreamer, RetInst); 1163 break; 1164 } 1165 1166 MCSymbol *FallthroughLabel; 1167 if (IsConditional) { 1168 // Before: 1169 // bgtlr cr0 1170 // 1171 // After: 1172 // ble cr0, .end 1173 // .p2align 3 1174 // .begin: 1175 // blr # lis 0, FuncId[16..32] 1176 // nop # li 0, FuncId[0..15] 1177 // std 0, -8(1) 1178 // mflr 0 1179 // bl __xray_FunctionExit 1180 // mtlr 0 1181 // blr 1182 // .end: 1183 // 1184 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1185 // of instructions change. 1186 FallthroughLabel = OutContext.createTempSymbol(); 1187 EmitToStreamer( 1188 *OutStreamer, 1189 MCInstBuilder(PPC::BCC) 1190 .addImm(PPC::InvertPredicate( 1191 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1192 .addReg(MI->getOperand(2).getReg()) 1193 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1194 RetInst = MCInst(); 1195 RetInst.setOpcode(PPC::BLR8); 1196 } 1197 // .p2align 3 1198 // .begin: 1199 // b(lr)? # lis 0, FuncId[16..32] 1200 // nop # li 0, FuncId[0..15] 1201 // std 0, -8(1) 1202 // mflr 0 1203 // bl __xray_FunctionExit 1204 // mtlr 0 1205 // b(lr)? 1206 // 1207 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1208 // of instructions change. 1209 OutStreamer->EmitCodeAlignment(8); 1210 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1211 OutStreamer->EmitLabel(BeginOfSled); 1212 EmitToStreamer(*OutStreamer, RetInst); 1213 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1214 EmitToStreamer( 1215 *OutStreamer, 1216 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1217 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1218 EmitToStreamer(*OutStreamer, 1219 MCInstBuilder(PPC::BL8_NOP) 1220 .addExpr(MCSymbolRefExpr::create( 1221 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1222 OutContext))); 1223 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1224 EmitToStreamer(*OutStreamer, RetInst); 1225 if (IsConditional) 1226 OutStreamer->EmitLabel(FallthroughLabel); 1227 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1228 break; 1229 } 1230 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1231 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1232 case TargetOpcode::PATCHABLE_TAIL_CALL: 1233 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1234 // normal function exit from a tail exit. 1235 llvm_unreachable("Tail call is handled in the normal case. See comments " 1236 "around this assert."); 1237 } 1238 } 1239 1240 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1241 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1242 PPCTargetStreamer *TS = 1243 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1244 1245 if (TS) 1246 TS->emitAbiVersion(2); 1247 } 1248 1249 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1250 !isPositionIndependent()) 1251 return AsmPrinter::EmitStartOfAsmFile(M); 1252 1253 if (M.getPICLevel() == PICLevel::SmallPIC) 1254 return AsmPrinter::EmitStartOfAsmFile(M); 1255 1256 OutStreamer->SwitchSection(OutContext.getELFSection( 1257 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1258 1259 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1260 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1261 1262 OutStreamer->EmitLabel(CurrentPos); 1263 1264 // The GOT pointer points to the middle of the GOT, in order to reference the 1265 // entire 64kB range. 0x8000 is the midpoint. 1266 const MCExpr *tocExpr = 1267 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1268 MCConstantExpr::create(0x8000, OutContext), 1269 OutContext); 1270 1271 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1272 1273 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1274 } 1275 1276 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1277 // linux/ppc32 - Normal entry label. 1278 if (!Subtarget->isPPC64() && 1279 (!isPositionIndependent() || 1280 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1281 return AsmPrinter::EmitFunctionEntryLabel(); 1282 1283 if (!Subtarget->isPPC64()) { 1284 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1285 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1286 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1287 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1288 OutStreamer->EmitLabel(RelocSymbol); 1289 1290 const MCExpr *OffsExpr = 1291 MCBinaryExpr::createSub( 1292 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1293 OutContext), 1294 MCSymbolRefExpr::create(PICBase, OutContext), 1295 OutContext); 1296 OutStreamer->EmitValue(OffsExpr, 4); 1297 OutStreamer->EmitLabel(CurrentFnSym); 1298 return; 1299 } else 1300 return AsmPrinter::EmitFunctionEntryLabel(); 1301 } 1302 1303 // ELFv2 ABI - Normal entry label. 1304 if (Subtarget->isELFv2ABI()) { 1305 // In the Large code model, we allow arbitrary displacements between 1306 // the text section and its associated TOC section. We place the 1307 // full 8-byte offset to the TOC in memory immediately preceding 1308 // the function global entry point. 1309 if (TM.getCodeModel() == CodeModel::Large 1310 && !MF->getRegInfo().use_empty(PPC::X2)) { 1311 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1312 1313 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1314 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1315 const MCExpr *TOCDeltaExpr = 1316 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1317 MCSymbolRefExpr::create(GlobalEPSymbol, 1318 OutContext), 1319 OutContext); 1320 1321 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1322 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1323 } 1324 return AsmPrinter::EmitFunctionEntryLabel(); 1325 } 1326 1327 // Emit an official procedure descriptor. 1328 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1329 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1330 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1331 OutStreamer->SwitchSection(Section); 1332 OutStreamer->EmitLabel(CurrentFnSym); 1333 OutStreamer->EmitValueToAlignment(8); 1334 MCSymbol *Symbol1 = CurrentFnSymForSize; 1335 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1336 // entry point. 1337 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1338 8 /*size*/); 1339 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1340 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1341 OutStreamer->EmitValue( 1342 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1343 8/*size*/); 1344 // Emit a null environment pointer. 1345 OutStreamer->EmitIntValue(0, 8 /* size */); 1346 OutStreamer->SwitchSection(Current.first, Current.second); 1347 } 1348 1349 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1350 const DataLayout &DL = getDataLayout(); 1351 1352 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1353 1354 PPCTargetStreamer &TS = 1355 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1356 1357 if (!TOC.empty()) { 1358 MCSectionELF *Section; 1359 1360 if (isPPC64) 1361 Section = OutStreamer->getContext().getELFSection( 1362 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1363 else 1364 Section = OutStreamer->getContext().getELFSection( 1365 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1366 OutStreamer->SwitchSection(Section); 1367 1368 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1369 E = TOC.end(); I != E; ++I) { 1370 OutStreamer->EmitLabel(I->second); 1371 MCSymbol *S = I->first; 1372 if (isPPC64) { 1373 TS.emitTCEntry(*S); 1374 } else { 1375 OutStreamer->EmitValueToAlignment(4); 1376 OutStreamer->EmitSymbolValue(S, 4); 1377 } 1378 } 1379 } 1380 1381 return AsmPrinter::doFinalization(M); 1382 } 1383 1384 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1385 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1386 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1387 // provide two entry points. The ABI guarantees that when calling the 1388 // local entry point, r2 is set up by the caller to contain the TOC base 1389 // for this function, and when calling the global entry point, r12 is set 1390 // up by the caller to hold the address of the global entry point. We 1391 // thus emit a prefix sequence along the following lines: 1392 // 1393 // func: 1394 // .Lfunc_gepNN: 1395 // # global entry point 1396 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1397 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1398 // .Lfunc_lepNN: 1399 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1400 // # local entry point, followed by function body 1401 // 1402 // For the Large code model, we create 1403 // 1404 // .Lfunc_tocNN: 1405 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1406 // func: 1407 // .Lfunc_gepNN: 1408 // # global entry point 1409 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1410 // add r2,r2,r12 1411 // .Lfunc_lepNN: 1412 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1413 // # local entry point, followed by function body 1414 // 1415 // This ensures we have r2 set up correctly while executing the function 1416 // body, no matter which entry point is called. 1417 if (Subtarget->isELFv2ABI() 1418 // Only do all that if the function uses r2 in the first place. 1419 && !MF->getRegInfo().use_empty(PPC::X2)) { 1420 // Note: The logic here must be synchronized with the code in the 1421 // branch-selection pass which sets the offset of the first block in the 1422 // function. This matters because it affects the alignment. 1423 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1424 1425 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1426 OutStreamer->EmitLabel(GlobalEntryLabel); 1427 const MCSymbolRefExpr *GlobalEntryLabelExp = 1428 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1429 1430 if (TM.getCodeModel() != CodeModel::Large) { 1431 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1432 const MCExpr *TOCDeltaExpr = 1433 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1434 GlobalEntryLabelExp, OutContext); 1435 1436 const MCExpr *TOCDeltaHi = 1437 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1438 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1439 .addReg(PPC::X2) 1440 .addReg(PPC::X12) 1441 .addExpr(TOCDeltaHi)); 1442 1443 const MCExpr *TOCDeltaLo = 1444 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1445 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1446 .addReg(PPC::X2) 1447 .addReg(PPC::X2) 1448 .addExpr(TOCDeltaLo)); 1449 } else { 1450 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1451 const MCExpr *TOCOffsetDeltaExpr = 1452 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1453 GlobalEntryLabelExp, OutContext); 1454 1455 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1456 .addReg(PPC::X2) 1457 .addExpr(TOCOffsetDeltaExpr) 1458 .addReg(PPC::X12)); 1459 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1460 .addReg(PPC::X2) 1461 .addReg(PPC::X2) 1462 .addReg(PPC::X12)); 1463 } 1464 1465 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1466 OutStreamer->EmitLabel(LocalEntryLabel); 1467 const MCSymbolRefExpr *LocalEntryLabelExp = 1468 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1469 const MCExpr *LocalOffsetExp = 1470 MCBinaryExpr::createSub(LocalEntryLabelExp, 1471 GlobalEntryLabelExp, OutContext); 1472 1473 PPCTargetStreamer *TS = 1474 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1475 1476 if (TS) 1477 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1478 } 1479 } 1480 1481 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1482 /// directive. 1483 /// 1484 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1485 // Only the 64-bit target requires a traceback table. For now, 1486 // we only emit the word of zeroes that GDB requires to find 1487 // the end of the function, and zeroes for the eight-byte 1488 // mandatory fields. 1489 // FIXME: We should fill in the eight-byte mandatory fields as described in 1490 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1491 // currently make use of these fields). 1492 if (Subtarget->isPPC64()) { 1493 OutStreamer->EmitIntValue(0, 4/*size*/); 1494 OutStreamer->EmitIntValue(0, 8/*size*/); 1495 } 1496 } 1497 1498 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1499 static const char *const CPUDirectives[] = { 1500 "", 1501 "ppc", 1502 "ppc440", 1503 "ppc601", 1504 "ppc602", 1505 "ppc603", 1506 "ppc7400", 1507 "ppc750", 1508 "ppc970", 1509 "ppcA2", 1510 "ppce500", 1511 "ppce500mc", 1512 "ppce5500", 1513 "power3", 1514 "power4", 1515 "power5", 1516 "power5x", 1517 "power6", 1518 "power6x", 1519 "power7", 1520 // FIXME: why is power8 missing here? 1521 "ppc64", 1522 "ppc64le", 1523 "power9" 1524 }; 1525 1526 // Get the numerically largest directive. 1527 // FIXME: How should we merge darwin directives? 1528 unsigned Directive = PPC::DIR_NONE; 1529 for (const Function &F : M) { 1530 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1531 unsigned FDir = STI.getDarwinDirective(); 1532 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1533 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1534 Directive = PPC::DIR_970; 1535 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1536 Directive = PPC::DIR_7400; 1537 if (STI.isPPC64() && Directive < PPC::DIR_64) 1538 Directive = PPC::DIR_64; 1539 } 1540 1541 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1542 1543 assert(Directive < array_lengthof(CPUDirectives) && 1544 "CPUDirectives[] might not be up-to-date!"); 1545 PPCTargetStreamer &TStreamer = 1546 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1547 TStreamer.emitMachine(CPUDirectives[Directive]); 1548 1549 // Prime text sections so they are adjacent. This reduces the likelihood a 1550 // large data or debug section causes a branch to exceed 16M limit. 1551 const TargetLoweringObjectFileMachO &TLOFMacho = 1552 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1553 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1554 if (TM.getRelocationModel() == Reloc::PIC_) { 1555 OutStreamer->SwitchSection( 1556 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1557 MachO::S_SYMBOL_STUBS | 1558 MachO::S_ATTR_PURE_INSTRUCTIONS, 1559 32, SectionKind::getText())); 1560 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1561 OutStreamer->SwitchSection( 1562 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1563 MachO::S_SYMBOL_STUBS | 1564 MachO::S_ATTR_PURE_INSTRUCTIONS, 1565 16, SectionKind::getText())); 1566 } 1567 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1568 } 1569 1570 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1571 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1572 1573 // Darwin/PPC always uses mach-o. 1574 const TargetLoweringObjectFileMachO &TLOFMacho = 1575 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1576 if (MMI) { 1577 MachineModuleInfoMachO &MMIMacho = 1578 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1579 1580 if (MAI->doesSupportExceptionHandling()) { 1581 // Add the (possibly multiple) personalities to the set of global values. 1582 // Only referenced functions get into the Personalities list. 1583 for (const Function *Personality : MMI->getPersonalities()) { 1584 if (Personality) { 1585 MCSymbol *NLPSym = 1586 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1587 MachineModuleInfoImpl::StubValueTy &StubSym = 1588 MMIMacho.getGVStubEntry(NLPSym); 1589 StubSym = 1590 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1591 } 1592 } 1593 } 1594 1595 // Output stubs for dynamically-linked functions. 1596 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1597 1598 // Output macho stubs for external and common global variables. 1599 if (!Stubs.empty()) { 1600 // Switch with ".non_lazy_symbol_pointer" directive. 1601 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1602 EmitAlignment(isPPC64 ? 3 : 2); 1603 1604 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1605 // L_foo$stub: 1606 OutStreamer->EmitLabel(Stubs[i].first); 1607 // .indirect_symbol _foo 1608 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1609 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1610 MCSA_IndirectSymbol); 1611 1612 if (MCSym.getInt()) 1613 // External to current translation unit. 1614 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1615 else 1616 // Internal to current translation unit. 1617 // 1618 // When we place the LSDA into the TEXT section, the type info 1619 // pointers 1620 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1621 // However, sometimes the types are local to the file. So we need to 1622 // fill in the value for the NLP in those cases. 1623 OutStreamer->EmitValue( 1624 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1625 isPPC64 ? 8 : 4 /*size*/); 1626 } 1627 1628 Stubs.clear(); 1629 OutStreamer->AddBlankLine(); 1630 } 1631 } 1632 1633 // Funny Darwin hack: This flag tells the linker that no global symbols 1634 // contain code that falls through to other global symbols (e.g. the obvious 1635 // implementation of multiple entry points). If this doesn't occur, the 1636 // linker can safely perform dead code stripping. Since LLVM never generates 1637 // code that does this, it is always safe to set. 1638 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1639 1640 return AsmPrinter::doFinalization(M); 1641 } 1642 1643 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1644 /// for a MachineFunction to the given output stream, in a format that the 1645 /// Darwin assembler can deal with. 1646 /// 1647 static AsmPrinter * 1648 createPPCAsmPrinterPass(TargetMachine &tm, 1649 std::unique_ptr<MCStreamer> &&Streamer) { 1650 if (tm.getTargetTriple().isMacOSX()) 1651 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1652 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1653 } 1654 1655 // Force static initialization. 1656 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1657 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1658 createPPCAsmPrinterPass); 1659 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1660 createPPCAsmPrinterPass); 1661 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1662 createPPCAsmPrinterPass); 1663 } 1664