1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
28 
29 using namespace llvm;
30 
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32     : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
33   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
34 }
35 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
37 void MipsTargetStreamer::emitDirectiveSetMips16() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
40 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
41 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
46 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
47   forbidModuleDirective();
48 }
49 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
50 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
51 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
52 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
53 void MipsTargetStreamer::emitDirectiveNaN2008() {}
54 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
55 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
56 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
57 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
58                                    unsigned ReturnReg) {}
59 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
60 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
61 }
62 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
63   forbidModuleDirective();
64 }
65 void MipsTargetStreamer::emitDirectiveSetMips0() {}
66 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
75 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
79 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
80 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
81 void MipsTargetStreamer::emitDirectiveSetPop() {}
82 void MipsTargetStreamer::emitDirectiveSetPush() {}
83 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
84 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
85 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
86 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
87                                               const MCSymbol &Sym, bool IsReg) {
88 }
89 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
90                                                      bool IsO32ABI) {
91   if (!Enabled && !IsO32ABI)
92     report_fatal_error("+nooddspreg is only valid for O32");
93 }
94 
95 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
96                                              formatted_raw_ostream &OS)
97     : MipsTargetStreamer(S), OS(OS) {}
98 
99 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
100   OS << "\t.set\tmicromips\n";
101   forbidModuleDirective();
102 }
103 
104 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
105   OS << "\t.set\tnomicromips\n";
106   forbidModuleDirective();
107 }
108 
109 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
110   OS << "\t.set\tmips16\n";
111   forbidModuleDirective();
112 }
113 
114 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
115   OS << "\t.set\tnomips16\n";
116   MipsTargetStreamer::emitDirectiveSetNoMips16();
117 }
118 
119 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
120   OS << "\t.set\treorder\n";
121   MipsTargetStreamer::emitDirectiveSetReorder();
122 }
123 
124 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
125   OS << "\t.set\tnoreorder\n";
126   forbidModuleDirective();
127 }
128 
129 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
130   OS << "\t.set\tmacro\n";
131   MipsTargetStreamer::emitDirectiveSetMacro();
132 }
133 
134 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
135   OS << "\t.set\tnomacro\n";
136   MipsTargetStreamer::emitDirectiveSetNoMacro();
137 }
138 
139 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
140   OS << "\t.set\tmsa\n";
141   MipsTargetStreamer::emitDirectiveSetMsa();
142 }
143 
144 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
145   OS << "\t.set\tnomsa\n";
146   MipsTargetStreamer::emitDirectiveSetNoMsa();
147 }
148 
149 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
150   OS << "\t.set\tat\n";
151   MipsTargetStreamer::emitDirectiveSetAt();
152 }
153 
154 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
155   OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
156   MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
157 }
158 
159 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
160   OS << "\t.set\tnoat\n";
161   MipsTargetStreamer::emitDirectiveSetNoAt();
162 }
163 
164 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
165   OS << "\t.end\t" << Name << '\n';
166 }
167 
168 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
169   OS << "\t.ent\t" << Symbol.getName() << '\n';
170 }
171 
172 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
173 
174 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
175 
176 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
177   OS << "\t.nan\tlegacy\n";
178 }
179 
180 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
181   OS << "\t.option\tpic0\n";
182 }
183 
184 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
185   OS << "\t.option\tpic2\n";
186 }
187 
188 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
189                                       unsigned ReturnReg) {
190   OS << "\t.frame\t$"
191      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
192      << StackSize << ",$"
193      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
194 }
195 
196 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
197   OS << "\t.set arch=" << Arch << "\n";
198   MipsTargetStreamer::emitDirectiveSetArch(Arch);
199 }
200 
201 void MipsTargetAsmStreamer::emitDirectiveSetMips0() { OS << "\t.set\tmips0\n"; }
202 
203 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
204   OS << "\t.set\tmips1\n";
205   MipsTargetStreamer::emitDirectiveSetMips1();
206 }
207 
208 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
209   OS << "\t.set\tmips2\n";
210   MipsTargetStreamer::emitDirectiveSetMips2();
211 }
212 
213 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
214   OS << "\t.set\tmips3\n";
215   MipsTargetStreamer::emitDirectiveSetMips3();
216 }
217 
218 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
219   OS << "\t.set\tmips4\n";
220   MipsTargetStreamer::emitDirectiveSetMips4();
221 }
222 
223 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
224   OS << "\t.set\tmips5\n";
225   MipsTargetStreamer::emitDirectiveSetMips5();
226 }
227 
228 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
229   OS << "\t.set\tmips32\n";
230   MipsTargetStreamer::emitDirectiveSetMips32();
231 }
232 
233 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
234   OS << "\t.set\tmips32r2\n";
235   MipsTargetStreamer::emitDirectiveSetMips32R2();
236 }
237 
238 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
239   OS << "\t.set\tmips32r3\n";
240   MipsTargetStreamer::emitDirectiveSetMips32R3();
241 }
242 
243 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
244   OS << "\t.set\tmips32r5\n";
245   MipsTargetStreamer::emitDirectiveSetMips32R5();
246 }
247 
248 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
249   OS << "\t.set\tmips32r6\n";
250   MipsTargetStreamer::emitDirectiveSetMips32R6();
251 }
252 
253 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
254   OS << "\t.set\tmips64\n";
255   MipsTargetStreamer::emitDirectiveSetMips64();
256 }
257 
258 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
259   OS << "\t.set\tmips64r2\n";
260   MipsTargetStreamer::emitDirectiveSetMips64R2();
261 }
262 
263 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
264   OS << "\t.set\tmips64r3\n";
265   MipsTargetStreamer::emitDirectiveSetMips64R3();
266 }
267 
268 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
269   OS << "\t.set\tmips64r5\n";
270   MipsTargetStreamer::emitDirectiveSetMips64R5();
271 }
272 
273 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
274   OS << "\t.set\tmips64r6\n";
275   MipsTargetStreamer::emitDirectiveSetMips64R6();
276 }
277 
278 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
279   OS << "\t.set\tdsp\n";
280   MipsTargetStreamer::emitDirectiveSetDsp();
281 }
282 
283 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
284   OS << "\t.set\tnodsp\n";
285   MipsTargetStreamer::emitDirectiveSetNoDsp();
286 }
287 
288 void MipsTargetAsmStreamer::emitDirectiveSetPop() { OS << "\t.set\tpop\n"; }
289 
290 void MipsTargetAsmStreamer::emitDirectiveSetPush() { OS << "\t.set\tpush\n"; }
291 
292 // Print a 32 bit hex number with all numbers.
293 static void printHex32(unsigned Value, raw_ostream &OS) {
294   OS << "0x";
295   for (int i = 7; i >= 0; i--)
296     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
297 }
298 
299 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
300                                      int CPUTopSavedRegOff) {
301   OS << "\t.mask \t";
302   printHex32(CPUBitmask, OS);
303   OS << ',' << CPUTopSavedRegOff << '\n';
304 }
305 
306 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
307                                       int FPUTopSavedRegOff) {
308   OS << "\t.fmask\t";
309   printHex32(FPUBitmask, OS);
310   OS << "," << FPUTopSavedRegOff << '\n';
311 }
312 
313 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
314   OS << "\t.cpload\t$"
315      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
316   forbidModuleDirective();
317 }
318 
319 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
320                                                  int RegOrOffset,
321                                                  const MCSymbol &Sym,
322                                                  bool IsReg) {
323   OS << "\t.cpsetup\t$"
324      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
325 
326   if (IsReg)
327     OS << "$"
328        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
329   else
330     OS << RegOrOffset;
331 
332   OS << ", ";
333 
334   OS << Sym.getName() << "\n";
335   forbidModuleDirective();
336 }
337 
338 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
339     MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
340   MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
341 
342   StringRef ModuleValue;
343   OS << "\t.module\tfp=";
344   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
345 }
346 
347 void MipsTargetAsmStreamer::emitDirectiveSetFp(
348     MipsABIFlagsSection::FpABIKind Value) {
349   StringRef ModuleValue;
350   OS << "\t.set\tfp=";
351   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
352 }
353 
354 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
355   // No action required for text output.
356 }
357 
358 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
359                                                         bool IsO32ABI) {
360   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
361 
362   OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
363 }
364 
365 // This part is for ELF object output.
366 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
367                                              const MCSubtargetInfo &STI)
368     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
369   MCAssembler &MCA = getStreamer().getAssembler();
370   Triple T(STI.getTargetTriple());
371   Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
372             ? true
373             : false;
374 
375   uint64_t Features = STI.getFeatureBits();
376 
377   // Set the header flags that we can in the constructor.
378   // FIXME: This is a fairly terrible hack. We set the rest
379   // of these in the destructor. The problem here is two-fold:
380   //
381   // a: Some of the eflags can be set/reset by directives.
382   // b: There aren't any usage paths that initialize the ABI
383   //    pointer until after we initialize either an assembler
384   //    or the target machine.
385   // We can fix this by making the target streamer construct
386   // the ABI, but this is fraught with wide ranging dependency
387   // issues as well.
388   unsigned EFlags = MCA.getELFHeaderEFlags();
389 
390   // Architecture
391   if (Features & Mips::FeatureMips64r6)
392     EFlags |= ELF::EF_MIPS_ARCH_64R6;
393   else if (Features & Mips::FeatureMips64r2 ||
394            Features & Mips::FeatureMips64r3 ||
395            Features & Mips::FeatureMips64r5)
396     EFlags |= ELF::EF_MIPS_ARCH_64R2;
397   else if (Features & Mips::FeatureMips64)
398     EFlags |= ELF::EF_MIPS_ARCH_64;
399   else if (Features & Mips::FeatureMips5)
400     EFlags |= ELF::EF_MIPS_ARCH_5;
401   else if (Features & Mips::FeatureMips4)
402     EFlags |= ELF::EF_MIPS_ARCH_4;
403   else if (Features & Mips::FeatureMips3)
404     EFlags |= ELF::EF_MIPS_ARCH_3;
405   else if (Features & Mips::FeatureMips32r6)
406     EFlags |= ELF::EF_MIPS_ARCH_32R6;
407   else if (Features & Mips::FeatureMips32r2 ||
408            Features & Mips::FeatureMips32r3 ||
409            Features & Mips::FeatureMips32r5)
410     EFlags |= ELF::EF_MIPS_ARCH_32R2;
411   else if (Features & Mips::FeatureMips32)
412     EFlags |= ELF::EF_MIPS_ARCH_32;
413   else if (Features & Mips::FeatureMips2)
414     EFlags |= ELF::EF_MIPS_ARCH_2;
415   else
416     EFlags |= ELF::EF_MIPS_ARCH_1;
417 
418   // Other options.
419   if (Features & Mips::FeatureNaN2008)
420     EFlags |= ELF::EF_MIPS_NAN2008;
421 
422   // -mabicalls and -mplt are not implemented but we should act as if they were
423   // given.
424   EFlags |= ELF::EF_MIPS_CPIC;
425 
426   MCA.setELFHeaderEFlags(EFlags);
427 }
428 
429 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
430   if (!isMicroMipsEnabled())
431     return;
432   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
433   uint8_t Type = MCELF::GetType(Data);
434   if (Type != ELF::STT_FUNC)
435     return;
436 
437   // The "other" values are stored in the last 6 bits of the second byte
438   // The traditional defines for STO values assume the full byte and thus
439   // the shift to pack it.
440   MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
441 }
442 
443 void MipsTargetELFStreamer::finish() {
444   MCAssembler &MCA = getStreamer().getAssembler();
445   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
446 
447   // .bss, .text and .data are always at least 16-byte aligned.
448   MCSectionData &TextSectionData =
449       MCA.getOrCreateSectionData(*OFI.getTextSection());
450   MCSectionData &DataSectionData =
451       MCA.getOrCreateSectionData(*OFI.getDataSection());
452   MCSectionData &BSSSectionData =
453       MCA.getOrCreateSectionData(*OFI.getBSSSection());
454 
455   TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
456   DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
457   BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
458 
459   uint64_t Features = STI.getFeatureBits();
460 
461   // Update e_header flags. See the FIXME and comment above in
462   // the constructor for a full rundown on this.
463   unsigned EFlags = MCA.getELFHeaderEFlags();
464 
465   // ABI
466   // N64 does not require any ABI bits.
467   if (getABI().IsO32())
468     EFlags |= ELF::EF_MIPS_ABI_O32;
469   else if (getABI().IsN32())
470     EFlags |= ELF::EF_MIPS_ABI2;
471 
472   if (Features & Mips::FeatureGP64Bit) {
473     if (getABI().IsO32())
474       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
475   } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
476     EFlags |= ELF::EF_MIPS_32BITMODE;
477 
478   // If we've set the cpic eflag and we're n64, go ahead and set the pic
479   // one as well.
480   if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
481     EFlags |= ELF::EF_MIPS_PIC;
482 
483   MCA.setELFHeaderEFlags(EFlags);
484 
485   // Emit all the option records.
486   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
487   // .reginfo.
488   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
489   MEF.EmitMipsOptionRecords();
490 
491   emitMipsAbiFlags();
492 }
493 
494 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
495                                            const MCExpr *Value) {
496   // If on rhs is micromips symbol then mark Symbol as microMips.
497   if (Value->getKind() != MCExpr::SymbolRef)
498     return;
499   const MCSymbol &RhsSym =
500       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
501   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
502   uint8_t Type = MCELF::GetType(Data);
503   if ((Type != ELF::STT_FUNC) ||
504       !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
505     return;
506 
507   MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
508   // The "other" values are stored in the last 6 bits of the second byte.
509   // The traditional defines for STO values assume the full byte and thus
510   // the shift to pack it.
511   MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
512 }
513 
514 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
515   return static_cast<MCELFStreamer &>(Streamer);
516 }
517 
518 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
519   MicroMipsEnabled = true;
520 
521   MCAssembler &MCA = getStreamer().getAssembler();
522   unsigned Flags = MCA.getELFHeaderEFlags();
523   Flags |= ELF::EF_MIPS_MICROMIPS;
524   MCA.setELFHeaderEFlags(Flags);
525   forbidModuleDirective();
526 }
527 
528 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
529   MicroMipsEnabled = false;
530   forbidModuleDirective();
531 }
532 
533 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
534   MCAssembler &MCA = getStreamer().getAssembler();
535   unsigned Flags = MCA.getELFHeaderEFlags();
536   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
537   MCA.setELFHeaderEFlags(Flags);
538   forbidModuleDirective();
539 }
540 
541 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
542   MCAssembler &MCA = getStreamer().getAssembler();
543   unsigned Flags = MCA.getELFHeaderEFlags();
544   Flags |= ELF::EF_MIPS_NOREORDER;
545   MCA.setELFHeaderEFlags(Flags);
546   forbidModuleDirective();
547 }
548 
549 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
550   MCAssembler &MCA = getStreamer().getAssembler();
551   MCContext &Context = MCA.getContext();
552   MCStreamer &OS = getStreamer();
553 
554   const MCSectionELF *Sec = Context.getELFSection(
555       ".pdr", ELF::SHT_PROGBITS, ELF::SHF_ALLOC | ELF::SHT_REL);
556 
557   const MCSymbolRefExpr *ExprRef =
558       MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
559 
560   MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
561   SecData.setAlignment(4);
562 
563   OS.PushSection();
564 
565   OS.SwitchSection(Sec);
566 
567   OS.EmitValueImpl(ExprRef, 4);
568 
569   OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
570   OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4);  // reg_offset
571 
572   OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
573   OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4);  // fpreg_offset
574 
575   OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
576   OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4);    // frame_reg
577   OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4);   // return_reg
578 
579   // The .end directive marks the end of a procedure. Invalidate
580   // the information gathered up until this point.
581   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
582 
583   OS.PopSection();
584 }
585 
586 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
587   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
588 }
589 
590 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
591   MCAssembler &MCA = getStreamer().getAssembler();
592   unsigned Flags = MCA.getELFHeaderEFlags();
593   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
594   MCA.setELFHeaderEFlags(Flags);
595 }
596 
597 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
598   MCAssembler &MCA = getStreamer().getAssembler();
599   unsigned Flags = MCA.getELFHeaderEFlags();
600   Flags |= ELF::EF_MIPS_NAN2008;
601   MCA.setELFHeaderEFlags(Flags);
602 }
603 
604 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
605   MCAssembler &MCA = getStreamer().getAssembler();
606   unsigned Flags = MCA.getELFHeaderEFlags();
607   Flags &= ~ELF::EF_MIPS_NAN2008;
608   MCA.setELFHeaderEFlags(Flags);
609 }
610 
611 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
612   MCAssembler &MCA = getStreamer().getAssembler();
613   unsigned Flags = MCA.getELFHeaderEFlags();
614   // This option overrides other PIC options like -KPIC.
615   Pic = false;
616   Flags &= ~ELF::EF_MIPS_PIC;
617   MCA.setELFHeaderEFlags(Flags);
618 }
619 
620 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
621   MCAssembler &MCA = getStreamer().getAssembler();
622   unsigned Flags = MCA.getELFHeaderEFlags();
623   Pic = true;
624   // NOTE: We are following the GAS behaviour here which means the directive
625   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
626   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
627   // EF_MIPS_CPIC to be mutually exclusive.
628   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
629   MCA.setELFHeaderEFlags(Flags);
630 }
631 
632 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
633                                       unsigned ReturnReg_) {
634   MCContext &Context = getStreamer().getAssembler().getContext();
635   const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
636 
637   FrameInfoSet = true;
638   FrameReg = RegInfo->getEncodingValue(StackReg);
639   FrameOffset = StackSize;
640   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
641 }
642 
643 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
644                                      int CPUTopSavedRegOff) {
645   GPRInfoSet = true;
646   GPRBitMask = CPUBitmask;
647   GPROffset = CPUTopSavedRegOff;
648 }
649 
650 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
651                                       int FPUTopSavedRegOff) {
652   FPRInfoSet = true;
653   FPRBitMask = FPUBitmask;
654   FPROffset = FPUTopSavedRegOff;
655 }
656 
657 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
658   // .cpload $reg
659   // This directive expands to:
660   // lui   $gp, %hi(_gp_disp)
661   // addui $gp, $gp, %lo(_gp_disp)
662   // addu  $gp, $gp, $reg
663   // when support for position independent code is enabled.
664   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
665     return;
666 
667   // There's a GNU extension controlled by -mno-shared that allows
668   // locally-binding symbols to be accessed using absolute addresses.
669   // This is currently not supported. When supported -mno-shared makes
670   // .cpload expand to:
671   //   lui     $gp, %hi(__gnu_local_gp)
672   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
673 
674   StringRef SymName("_gp_disp");
675   MCAssembler &MCA = getStreamer().getAssembler();
676   MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
677   MCA.getOrCreateSymbolData(*GP_Disp);
678 
679   MCInst TmpInst;
680   TmpInst.setOpcode(Mips::LUi);
681   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
682   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
683       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
684   TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
685   getStreamer().EmitInstruction(TmpInst, STI);
686 
687   TmpInst.clear();
688 
689   TmpInst.setOpcode(Mips::ADDiu);
690   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
691   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
692   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
693       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
694   TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
695   getStreamer().EmitInstruction(TmpInst, STI);
696 
697   TmpInst.clear();
698 
699   TmpInst.setOpcode(Mips::ADDu);
700   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
701   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
702   TmpInst.addOperand(MCOperand::CreateReg(RegNo));
703   getStreamer().EmitInstruction(TmpInst, STI);
704 
705   forbidModuleDirective();
706 }
707 
708 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
709                                                  int RegOrOffset,
710                                                  const MCSymbol &Sym,
711                                                  bool IsReg) {
712   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
713   if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
714     return;
715 
716   MCAssembler &MCA = getStreamer().getAssembler();
717   MCInst Inst;
718 
719   // Either store the old $gp in a register or on the stack
720   if (IsReg) {
721     // move $save, $gpreg
722     Inst.setOpcode(Mips::DADDu);
723     Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
724     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
725     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
726   } else {
727     // sd $gpreg, offset($sp)
728     Inst.setOpcode(Mips::SD);
729     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
730     Inst.addOperand(MCOperand::CreateReg(Mips::SP));
731     Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
732   }
733   getStreamer().EmitInstruction(Inst, STI);
734   Inst.clear();
735 
736   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
737       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
738   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
739       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
740 
741   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
742   Inst.setOpcode(Mips::LUi);
743   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
744   Inst.addOperand(MCOperand::CreateExpr(HiExpr));
745   getStreamer().EmitInstruction(Inst, STI);
746   Inst.clear();
747 
748   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
749   Inst.setOpcode(Mips::ADDiu);
750   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
751   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
752   Inst.addOperand(MCOperand::CreateExpr(LoExpr));
753   getStreamer().EmitInstruction(Inst, STI);
754   Inst.clear();
755 
756   // daddu  $gp, $gp, $funcreg
757   Inst.setOpcode(Mips::DADDu);
758   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
759   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
760   Inst.addOperand(MCOperand::CreateReg(RegNo));
761   getStreamer().EmitInstruction(Inst, STI);
762 
763   forbidModuleDirective();
764 }
765 
766 void MipsTargetELFStreamer::emitMipsAbiFlags() {
767   MCAssembler &MCA = getStreamer().getAssembler();
768   MCContext &Context = MCA.getContext();
769   MCStreamer &OS = getStreamer();
770   const MCSectionELF *Sec = Context.getELFSection(
771       ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
772   MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
773   ABIShndxSD.setAlignment(8);
774   OS.SwitchSection(Sec);
775 
776   OS << ABIFlagsSection;
777 }
778 
779 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
780                                                         bool IsO32ABI) {
781   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
782 
783   ABIFlagsSection.OddSPReg = Enabled;
784 }
785