1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
28 
29 using namespace llvm;
30 
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32     : MCTargetStreamer(S), canHaveModuleDirective(true) {
33   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
34 }
35 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
37 void MipsTargetStreamer::emitDirectiveSetMips16() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMips16() {
39   setCanHaveModuleDir(false);
40 }
41 void MipsTargetStreamer::emitDirectiveSetReorder() {
42   setCanHaveModuleDir(false);
43 }
44 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
45 void MipsTargetStreamer::emitDirectiveSetMacro() { setCanHaveModuleDir(false); }
46 void MipsTargetStreamer::emitDirectiveSetNoMacro() {
47   setCanHaveModuleDir(false);
48 }
49 void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
50 void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
51 void MipsTargetStreamer::emitDirectiveSetAt() { setCanHaveModuleDir(false); }
52 void MipsTargetStreamer::emitDirectiveSetNoAt() { setCanHaveModuleDir(false); }
53 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
54 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
55 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
56 void MipsTargetStreamer::emitDirectiveNaN2008() {}
57 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
58 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
59 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
60 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
61                                    unsigned ReturnReg) {}
62 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
63 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
64 }
65 void MipsTargetStreamer::emitDirectiveSetMips1() { setCanHaveModuleDir(false); }
66 void MipsTargetStreamer::emitDirectiveSetMips2() { setCanHaveModuleDir(false); }
67 void MipsTargetStreamer::emitDirectiveSetMips3() { setCanHaveModuleDir(false); }
68 void MipsTargetStreamer::emitDirectiveSetMips4() { setCanHaveModuleDir(false); }
69 void MipsTargetStreamer::emitDirectiveSetMips5() { setCanHaveModuleDir(false); }
70 void MipsTargetStreamer::emitDirectiveSetMips32() {
71   setCanHaveModuleDir(false);
72 }
73 void MipsTargetStreamer::emitDirectiveSetMips32R2() {
74   setCanHaveModuleDir(false);
75 }
76 void MipsTargetStreamer::emitDirectiveSetMips32R6() {
77   setCanHaveModuleDir(false);
78 }
79 void MipsTargetStreamer::emitDirectiveSetMips64() {
80   setCanHaveModuleDir(false);
81 }
82 void MipsTargetStreamer::emitDirectiveSetMips64R2() {
83   setCanHaveModuleDir(false);
84 }
85 void MipsTargetStreamer::emitDirectiveSetMips64R6() {
86   setCanHaveModuleDir(false);
87 }
88 void MipsTargetStreamer::emitDirectiveSetDsp() { setCanHaveModuleDir(false); }
89 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
90 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
91                                               const MCSymbol &Sym, bool IsReg) {
92 }
93 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
94                                                      bool IsO32ABI) {
95   if (!Enabled && !IsO32ABI)
96     report_fatal_error("+nooddspreg is only valid for O32");
97 }
98 
99 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
100                                              formatted_raw_ostream &OS)
101     : MipsTargetStreamer(S), OS(OS) {}
102 
103 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
104   OS << "\t.set\tmicromips\n";
105   setCanHaveModuleDir(false);
106 }
107 
108 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
109   OS << "\t.set\tnomicromips\n";
110   setCanHaveModuleDir(false);
111 }
112 
113 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
114   OS << "\t.set\tmips16\n";
115   setCanHaveModuleDir(false);
116 }
117 
118 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
119   OS << "\t.set\tnomips16\n";
120   MipsTargetStreamer::emitDirectiveSetNoMips16();
121 }
122 
123 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
124   OS << "\t.set\treorder\n";
125   MipsTargetStreamer::emitDirectiveSetReorder();
126 }
127 
128 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
129   OS << "\t.set\tnoreorder\n";
130   setCanHaveModuleDir(false);
131 }
132 
133 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
134   OS << "\t.set\tmacro\n";
135   MipsTargetStreamer::emitDirectiveSetMacro();
136 }
137 
138 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
139   OS << "\t.set\tnomacro\n";
140   MipsTargetStreamer::emitDirectiveSetNoMacro();
141 }
142 
143 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
144   OS << "\t.set\tmsa\n";
145   MipsTargetStreamer::emitDirectiveSetMsa();
146 }
147 
148 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
149   OS << "\t.set\tnomsa\n";
150   MipsTargetStreamer::emitDirectiveSetNoMsa();
151 }
152 
153 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
154   OS << "\t.set\tat\n";
155   MipsTargetStreamer::emitDirectiveSetAt();
156 }
157 
158 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
159   OS << "\t.set\tnoat\n";
160   MipsTargetStreamer::emitDirectiveSetNoAt();
161 }
162 
163 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
164   OS << "\t.end\t" << Name << '\n';
165 }
166 
167 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
168   OS << "\t.ent\t" << Symbol.getName() << '\n';
169 }
170 
171 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
172 
173 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
174 
175 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
176   OS << "\t.nan\tlegacy\n";
177 }
178 
179 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
180   OS << "\t.option\tpic0\n";
181 }
182 
183 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
184   OS << "\t.option\tpic2\n";
185 }
186 
187 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
188                                       unsigned ReturnReg) {
189   OS << "\t.frame\t$"
190      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
191      << StackSize << ",$"
192      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
193 }
194 
195 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
196   OS << "\t.set\tmips1\n";
197   MipsTargetStreamer::emitDirectiveSetMips1();
198 }
199 
200 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
201   OS << "\t.set\tmips2\n";
202   MipsTargetStreamer::emitDirectiveSetMips2();
203 }
204 
205 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
206   OS << "\t.set\tmips3\n";
207   MipsTargetStreamer::emitDirectiveSetMips3();
208 }
209 
210 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
211   OS << "\t.set\tmips4\n";
212   MipsTargetStreamer::emitDirectiveSetMips4();
213 }
214 
215 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
216   OS << "\t.set\tmips5\n";
217   MipsTargetStreamer::emitDirectiveSetMips5();
218 }
219 
220 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
221   OS << "\t.set\tmips32\n";
222   MipsTargetStreamer::emitDirectiveSetMips32();
223 }
224 
225 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
226   OS << "\t.set\tmips32r2\n";
227   MipsTargetStreamer::emitDirectiveSetMips32R2();
228 }
229 
230 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
231   OS << "\t.set\tmips32r6\n";
232   MipsTargetStreamer::emitDirectiveSetMips32R6();
233 }
234 
235 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
236   OS << "\t.set\tmips64\n";
237   MipsTargetStreamer::emitDirectiveSetMips64();
238 }
239 
240 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
241   OS << "\t.set\tmips64r2\n";
242   MipsTargetStreamer::emitDirectiveSetMips64R2();
243 }
244 
245 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
246   OS << "\t.set\tmips64r6\n";
247   MipsTargetStreamer::emitDirectiveSetMips64R6();
248 }
249 
250 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
251   OS << "\t.set\tdsp\n";
252   MipsTargetStreamer::emitDirectiveSetDsp();
253 }
254 // Print a 32 bit hex number with all numbers.
255 static void printHex32(unsigned Value, raw_ostream &OS) {
256   OS << "0x";
257   for (int i = 7; i >= 0; i--)
258     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
259 }
260 
261 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
262                                      int CPUTopSavedRegOff) {
263   OS << "\t.mask \t";
264   printHex32(CPUBitmask, OS);
265   OS << ',' << CPUTopSavedRegOff << '\n';
266 }
267 
268 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
269                                       int FPUTopSavedRegOff) {
270   OS << "\t.fmask\t";
271   printHex32(FPUBitmask, OS);
272   OS << "," << FPUTopSavedRegOff << '\n';
273 }
274 
275 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
276   OS << "\t.cpload\t$"
277      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
278   setCanHaveModuleDir(false);
279 }
280 
281 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
282                                                  int RegOrOffset,
283                                                  const MCSymbol &Sym,
284                                                  bool IsReg) {
285   OS << "\t.cpsetup\t$"
286      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
287 
288   if (IsReg)
289     OS << "$"
290        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
291   else
292     OS << RegOrOffset;
293 
294   OS << ", ";
295 
296   OS << Sym.getName() << "\n";
297   setCanHaveModuleDir(false);
298 }
299 
300 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
301     MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
302   MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
303 
304   StringRef ModuleValue;
305   OS << "\t.module\tfp=";
306   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
307 }
308 
309 void MipsTargetAsmStreamer::emitDirectiveSetFp(
310     MipsABIFlagsSection::FpABIKind Value) {
311   StringRef ModuleValue;
312   OS << "\t.set\tfp=";
313   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
314 }
315 
316 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
317   // No action required for text output.
318 }
319 
320 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
321                                                         bool IsO32ABI) {
322   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
323 
324   OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
325 }
326 
327 // This part is for ELF object output.
328 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
329                                              const MCSubtargetInfo &STI)
330     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
331   MCAssembler &MCA = getStreamer().getAssembler();
332   uint64_t Features = STI.getFeatureBits();
333   Triple T(STI.getTargetTriple());
334   Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
335             ? true
336             : false;
337 
338   // Update e_header flags
339   unsigned EFlags = 0;
340 
341   // Architecture
342   if (Features & Mips::FeatureMips64r6)
343     EFlags |= ELF::EF_MIPS_ARCH_64R6;
344   else if (Features & Mips::FeatureMips64r2)
345     EFlags |= ELF::EF_MIPS_ARCH_64R2;
346   else if (Features & Mips::FeatureMips64)
347     EFlags |= ELF::EF_MIPS_ARCH_64;
348   else if (Features & Mips::FeatureMips5)
349     EFlags |= ELF::EF_MIPS_ARCH_5;
350   else if (Features & Mips::FeatureMips4)
351     EFlags |= ELF::EF_MIPS_ARCH_4;
352   else if (Features & Mips::FeatureMips3)
353     EFlags |= ELF::EF_MIPS_ARCH_3;
354   else if (Features & Mips::FeatureMips32r6)
355     EFlags |= ELF::EF_MIPS_ARCH_32R6;
356   else if (Features & Mips::FeatureMips32r2)
357     EFlags |= ELF::EF_MIPS_ARCH_32R2;
358   else if (Features & Mips::FeatureMips32)
359     EFlags |= ELF::EF_MIPS_ARCH_32;
360   else if (Features & Mips::FeatureMips2)
361     EFlags |= ELF::EF_MIPS_ARCH_2;
362   else
363     EFlags |= ELF::EF_MIPS_ARCH_1;
364 
365   // ABI
366   // N64 does not require any ABI bits.
367   if (Features & Mips::FeatureO32)
368     EFlags |= ELF::EF_MIPS_ABI_O32;
369   else if (Features & Mips::FeatureN32)
370     EFlags |= ELF::EF_MIPS_ABI2;
371 
372   if (Features & Mips::FeatureGP64Bit) {
373     if (Features & Mips::FeatureO32)
374       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
375   } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
376     EFlags |= ELF::EF_MIPS_32BITMODE;
377 
378   // Other options.
379   if (Features & Mips::FeatureNaN2008)
380     EFlags |= ELF::EF_MIPS_NAN2008;
381 
382   // -mabicalls and -mplt are not implemented but we should act as if they were
383   // given.
384   EFlags |= ELF::EF_MIPS_CPIC;
385   if (Features & Mips::FeatureN64)
386     EFlags |= ELF::EF_MIPS_PIC;
387 
388   MCA.setELFHeaderEFlags(EFlags);
389 }
390 
391 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
392   if (!isMicroMipsEnabled())
393     return;
394   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
395   uint8_t Type = MCELF::GetType(Data);
396   if (Type != ELF::STT_FUNC)
397     return;
398 
399   // The "other" values are stored in the last 6 bits of the second byte
400   // The traditional defines for STO values assume the full byte and thus
401   // the shift to pack it.
402   MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
403 }
404 
405 void MipsTargetELFStreamer::finish() {
406   MCAssembler &MCA = getStreamer().getAssembler();
407   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
408 
409   // .bss, .text and .data are always at least 16-byte aligned.
410   MCSectionData &TextSectionData =
411       MCA.getOrCreateSectionData(*OFI.getTextSection());
412   MCSectionData &DataSectionData =
413       MCA.getOrCreateSectionData(*OFI.getDataSection());
414   MCSectionData &BSSSectionData =
415       MCA.getOrCreateSectionData(*OFI.getBSSSection());
416 
417   TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
418   DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
419   BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
420 
421   // Emit all the option records.
422   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
423   // .reginfo.
424   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
425   MEF.EmitMipsOptionRecords();
426 
427   emitMipsAbiFlags();
428 }
429 
430 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
431                                            const MCExpr *Value) {
432   // If on rhs is micromips symbol then mark Symbol as microMips.
433   if (Value->getKind() != MCExpr::SymbolRef)
434     return;
435   const MCSymbol &RhsSym =
436       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
437   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
438   uint8_t Type = MCELF::GetType(Data);
439   if ((Type != ELF::STT_FUNC) ||
440       !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
441     return;
442 
443   MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
444   // The "other" values are stored in the last 6 bits of the second byte.
445   // The traditional defines for STO values assume the full byte and thus
446   // the shift to pack it.
447   MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
448 }
449 
450 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
451   return static_cast<MCELFStreamer &>(Streamer);
452 }
453 
454 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
455   MicroMipsEnabled = true;
456 
457   MCAssembler &MCA = getStreamer().getAssembler();
458   unsigned Flags = MCA.getELFHeaderEFlags();
459   Flags |= ELF::EF_MIPS_MICROMIPS;
460   MCA.setELFHeaderEFlags(Flags);
461   setCanHaveModuleDir(false);
462 }
463 
464 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
465   MicroMipsEnabled = false;
466   setCanHaveModuleDir(false);
467 }
468 
469 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
470   MCAssembler &MCA = getStreamer().getAssembler();
471   unsigned Flags = MCA.getELFHeaderEFlags();
472   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
473   MCA.setELFHeaderEFlags(Flags);
474   setCanHaveModuleDir(false);
475 }
476 
477 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
478   MCAssembler &MCA = getStreamer().getAssembler();
479   unsigned Flags = MCA.getELFHeaderEFlags();
480   Flags |= ELF::EF_MIPS_NOREORDER;
481   MCA.setELFHeaderEFlags(Flags);
482   setCanHaveModuleDir(false);
483 }
484 
485 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
486   MCAssembler &MCA = getStreamer().getAssembler();
487   MCContext &Context = MCA.getContext();
488   MCStreamer &OS = getStreamer();
489 
490   const MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
491                                                   ELF::SHF_ALLOC | ELF::SHT_REL,
492                                                   SectionKind::getMetadata());
493 
494   const MCSymbolRefExpr *ExprRef =
495       MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
496 
497   MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
498   SecData.setAlignment(4);
499 
500   OS.PushSection();
501 
502   OS.SwitchSection(Sec);
503 
504   OS.EmitValueImpl(ExprRef, 4);
505 
506   OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
507   OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4);  // reg_offset
508 
509   OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
510   OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4);  // fpreg_offset
511 
512   OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
513   OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4);    // frame_reg
514   OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4);   // return_reg
515 
516   // The .end directive marks the end of a procedure. Invalidate
517   // the information gathered up until this point.
518   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
519 
520   OS.PopSection();
521 }
522 
523 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
524   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
525 }
526 
527 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
528   MCAssembler &MCA = getStreamer().getAssembler();
529   unsigned Flags = MCA.getELFHeaderEFlags();
530   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
531   MCA.setELFHeaderEFlags(Flags);
532 }
533 
534 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
535   MCAssembler &MCA = getStreamer().getAssembler();
536   unsigned Flags = MCA.getELFHeaderEFlags();
537   Flags |= ELF::EF_MIPS_NAN2008;
538   MCA.setELFHeaderEFlags(Flags);
539 }
540 
541 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
542   MCAssembler &MCA = getStreamer().getAssembler();
543   unsigned Flags = MCA.getELFHeaderEFlags();
544   Flags &= ~ELF::EF_MIPS_NAN2008;
545   MCA.setELFHeaderEFlags(Flags);
546 }
547 
548 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
549   MCAssembler &MCA = getStreamer().getAssembler();
550   unsigned Flags = MCA.getELFHeaderEFlags();
551   // This option overrides other PIC options like -KPIC.
552   Pic = false;
553   Flags &= ~ELF::EF_MIPS_PIC;
554   MCA.setELFHeaderEFlags(Flags);
555 }
556 
557 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
558   MCAssembler &MCA = getStreamer().getAssembler();
559   unsigned Flags = MCA.getELFHeaderEFlags();
560   Pic = true;
561   // NOTE: We are following the GAS behaviour here which means the directive
562   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
563   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
564   // EF_MIPS_CPIC to be mutually exclusive.
565   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
566   MCA.setELFHeaderEFlags(Flags);
567 }
568 
569 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
570                                       unsigned ReturnReg_) {
571   MCContext &Context = getStreamer().getAssembler().getContext();
572   const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
573 
574   FrameInfoSet = true;
575   FrameReg = RegInfo->getEncodingValue(StackReg);
576   FrameOffset = StackSize;
577   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
578 }
579 
580 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
581                                      int CPUTopSavedRegOff) {
582   GPRInfoSet = true;
583   GPRBitMask = CPUBitmask;
584   GPROffset = CPUTopSavedRegOff;
585 }
586 
587 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
588                                       int FPUTopSavedRegOff) {
589   FPRInfoSet = true;
590   FPRBitMask = FPUBitmask;
591   FPROffset = FPUTopSavedRegOff;
592 }
593 
594 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
595   // .cpload $reg
596   // This directive expands to:
597   // lui   $gp, %hi(_gp_disp)
598   // addui $gp, $gp, %lo(_gp_disp)
599   // addu  $gp, $gp, $reg
600   // when support for position independent code is enabled.
601   if (!Pic || (isN32() || isN64()))
602     return;
603 
604   // There's a GNU extension controlled by -mno-shared that allows
605   // locally-binding symbols to be accessed using absolute addresses.
606   // This is currently not supported. When supported -mno-shared makes
607   // .cpload expand to:
608   //   lui     $gp, %hi(__gnu_local_gp)
609   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
610 
611   StringRef SymName("_gp_disp");
612   MCAssembler &MCA = getStreamer().getAssembler();
613   MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
614   MCA.getOrCreateSymbolData(*GP_Disp);
615 
616   MCInst TmpInst;
617   TmpInst.setOpcode(Mips::LUi);
618   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
619   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
620       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
621   TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
622   getStreamer().EmitInstruction(TmpInst, STI);
623 
624   TmpInst.clear();
625 
626   TmpInst.setOpcode(Mips::ADDiu);
627   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
628   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
629   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
630       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
631   TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
632   getStreamer().EmitInstruction(TmpInst, STI);
633 
634   TmpInst.clear();
635 
636   TmpInst.setOpcode(Mips::ADDu);
637   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
638   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
639   TmpInst.addOperand(MCOperand::CreateReg(RegNo));
640   getStreamer().EmitInstruction(TmpInst, STI);
641 
642   setCanHaveModuleDir(false);
643 }
644 
645 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
646                                                  int RegOrOffset,
647                                                  const MCSymbol &Sym,
648                                                  bool IsReg) {
649   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
650   if (!Pic || !(isN32() || isN64()))
651     return;
652 
653   MCAssembler &MCA = getStreamer().getAssembler();
654   MCInst Inst;
655 
656   // Either store the old $gp in a register or on the stack
657   if (IsReg) {
658     // move $save, $gpreg
659     Inst.setOpcode(Mips::DADDu);
660     Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
661     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
662     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
663   } else {
664     // sd $gpreg, offset($sp)
665     Inst.setOpcode(Mips::SD);
666     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
667     Inst.addOperand(MCOperand::CreateReg(Mips::SP));
668     Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
669   }
670   getStreamer().EmitInstruction(Inst, STI);
671   Inst.clear();
672 
673   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
674       Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
675   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
676       Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
677   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
678   Inst.setOpcode(Mips::LUi);
679   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
680   Inst.addOperand(MCOperand::CreateExpr(HiExpr));
681   getStreamer().EmitInstruction(Inst, STI);
682   Inst.clear();
683 
684   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
685   Inst.setOpcode(Mips::ADDiu);
686   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
687   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
688   Inst.addOperand(MCOperand::CreateExpr(LoExpr));
689   getStreamer().EmitInstruction(Inst, STI);
690   Inst.clear();
691 
692   // daddu  $gp, $gp, $funcreg
693   Inst.setOpcode(Mips::DADDu);
694   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
695   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
696   Inst.addOperand(MCOperand::CreateReg(RegNo));
697   getStreamer().EmitInstruction(Inst, STI);
698 
699   setCanHaveModuleDir(false);
700 }
701 
702 void MipsTargetELFStreamer::emitMipsAbiFlags() {
703   MCAssembler &MCA = getStreamer().getAssembler();
704   MCContext &Context = MCA.getContext();
705   MCStreamer &OS = getStreamer();
706   const MCSectionELF *Sec =
707       Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
708                             ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
709   MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
710   ABIShndxSD.setAlignment(8);
711   OS.SwitchSection(Sec);
712 
713   OS << ABIFlagsSection;
714 }
715 
716 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
717                                                         bool IsO32ABI) {
718   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
719 
720   ABIFlagsSection.OddSPReg = Enabled;
721 }
722