1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsTargetStreamer.h"
15 #include "InstPrinter/MipsInstPrinter.h"
16 #include "MipsELFStreamer.h"
17 #include "MipsMCTargetDesc.h"
18 #include "MipsTargetObjectFile.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbolELF.h"
23 #include "llvm/Support/ELF.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/FormattedStream.h"
26 
27 using namespace llvm;
28 
29 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
30     : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
31   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
32 }
33 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
34 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetMips16() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
37 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
38 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
39 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
40 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
41 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
45   forbidModuleDirective();
46 }
47 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
48 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
49 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
50 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
51 void MipsTargetStreamer::emitDirectiveNaN2008() {}
52 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
53 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
54 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
55 void MipsTargetStreamer::emitDirectiveInsn() { forbidModuleDirective(); }
56 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
57                                    unsigned ReturnReg) {}
58 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
59 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
60 }
61 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
62   forbidModuleDirective();
63 }
64 void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); }
65 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
75 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
79 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
80 void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); }
81 void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); }
82 void MipsTargetStreamer::emitDirectiveSetSoftFloat() {
83   forbidModuleDirective();
84 }
85 void MipsTargetStreamer::emitDirectiveSetHardFloat() {
86   forbidModuleDirective();
87 }
88 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
89 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
90 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
91 void MipsTargetStreamer::emitDirectiveCpRestore(int Offset) {
92   forbidModuleDirective();
93 }
94 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
95                                               const MCSymbol &Sym, bool IsReg) {
96 }
97 void MipsTargetStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
98                                                bool SaveLocationIsRegister) {}
99 
100 void MipsTargetStreamer::emitDirectiveModuleFP() {}
101 
102 void MipsTargetStreamer::emitDirectiveModuleOddSPReg() {
103   if (!ABIFlagsSection.OddSPReg && !ABIFlagsSection.Is32BitABI)
104     report_fatal_error("+nooddspreg is only valid for O32");
105 }
106 void MipsTargetStreamer::emitDirectiveModuleSoftFloat() {}
107 void MipsTargetStreamer::emitDirectiveModuleHardFloat() {}
108 void MipsTargetStreamer::emitDirectiveSetFp(
109     MipsABIFlagsSection::FpABIKind Value) {
110   forbidModuleDirective();
111 }
112 void MipsTargetStreamer::emitDirectiveSetOddSPReg() { forbidModuleDirective(); }
113 void MipsTargetStreamer::emitDirectiveSetNoOddSPReg() {
114   forbidModuleDirective();
115 }
116 
117 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
118                                              formatted_raw_ostream &OS)
119     : MipsTargetStreamer(S), OS(OS) {}
120 
121 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
122   OS << "\t.set\tmicromips\n";
123   forbidModuleDirective();
124 }
125 
126 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
127   OS << "\t.set\tnomicromips\n";
128   forbidModuleDirective();
129 }
130 
131 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
132   OS << "\t.set\tmips16\n";
133   forbidModuleDirective();
134 }
135 
136 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
137   OS << "\t.set\tnomips16\n";
138   MipsTargetStreamer::emitDirectiveSetNoMips16();
139 }
140 
141 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
142   OS << "\t.set\treorder\n";
143   MipsTargetStreamer::emitDirectiveSetReorder();
144 }
145 
146 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
147   OS << "\t.set\tnoreorder\n";
148   forbidModuleDirective();
149 }
150 
151 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
152   OS << "\t.set\tmacro\n";
153   MipsTargetStreamer::emitDirectiveSetMacro();
154 }
155 
156 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
157   OS << "\t.set\tnomacro\n";
158   MipsTargetStreamer::emitDirectiveSetNoMacro();
159 }
160 
161 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
162   OS << "\t.set\tmsa\n";
163   MipsTargetStreamer::emitDirectiveSetMsa();
164 }
165 
166 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
167   OS << "\t.set\tnomsa\n";
168   MipsTargetStreamer::emitDirectiveSetNoMsa();
169 }
170 
171 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
172   OS << "\t.set\tat\n";
173   MipsTargetStreamer::emitDirectiveSetAt();
174 }
175 
176 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
177   OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
178   MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
179 }
180 
181 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
182   OS << "\t.set\tnoat\n";
183   MipsTargetStreamer::emitDirectiveSetNoAt();
184 }
185 
186 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
187   OS << "\t.end\t" << Name << '\n';
188 }
189 
190 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
191   OS << "\t.ent\t" << Symbol.getName() << '\n';
192 }
193 
194 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
195 
196 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
197 
198 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
199   OS << "\t.nan\tlegacy\n";
200 }
201 
202 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
203   OS << "\t.option\tpic0\n";
204 }
205 
206 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
207   OS << "\t.option\tpic2\n";
208 }
209 
210 void MipsTargetAsmStreamer::emitDirectiveInsn() {
211   MipsTargetStreamer::emitDirectiveInsn();
212   OS << "\t.insn\n";
213 }
214 
215 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
216                                       unsigned ReturnReg) {
217   OS << "\t.frame\t$"
218      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
219      << StackSize << ",$"
220      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
221 }
222 
223 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
224   OS << "\t.set arch=" << Arch << "\n";
225   MipsTargetStreamer::emitDirectiveSetArch(Arch);
226 }
227 
228 void MipsTargetAsmStreamer::emitDirectiveSetMips0() {
229   OS << "\t.set\tmips0\n";
230   MipsTargetStreamer::emitDirectiveSetMips0();
231 }
232 
233 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
234   OS << "\t.set\tmips1\n";
235   MipsTargetStreamer::emitDirectiveSetMips1();
236 }
237 
238 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
239   OS << "\t.set\tmips2\n";
240   MipsTargetStreamer::emitDirectiveSetMips2();
241 }
242 
243 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
244   OS << "\t.set\tmips3\n";
245   MipsTargetStreamer::emitDirectiveSetMips3();
246 }
247 
248 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
249   OS << "\t.set\tmips4\n";
250   MipsTargetStreamer::emitDirectiveSetMips4();
251 }
252 
253 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
254   OS << "\t.set\tmips5\n";
255   MipsTargetStreamer::emitDirectiveSetMips5();
256 }
257 
258 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
259   OS << "\t.set\tmips32\n";
260   MipsTargetStreamer::emitDirectiveSetMips32();
261 }
262 
263 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
264   OS << "\t.set\tmips32r2\n";
265   MipsTargetStreamer::emitDirectiveSetMips32R2();
266 }
267 
268 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
269   OS << "\t.set\tmips32r3\n";
270   MipsTargetStreamer::emitDirectiveSetMips32R3();
271 }
272 
273 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
274   OS << "\t.set\tmips32r5\n";
275   MipsTargetStreamer::emitDirectiveSetMips32R5();
276 }
277 
278 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
279   OS << "\t.set\tmips32r6\n";
280   MipsTargetStreamer::emitDirectiveSetMips32R6();
281 }
282 
283 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
284   OS << "\t.set\tmips64\n";
285   MipsTargetStreamer::emitDirectiveSetMips64();
286 }
287 
288 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
289   OS << "\t.set\tmips64r2\n";
290   MipsTargetStreamer::emitDirectiveSetMips64R2();
291 }
292 
293 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
294   OS << "\t.set\tmips64r3\n";
295   MipsTargetStreamer::emitDirectiveSetMips64R3();
296 }
297 
298 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
299   OS << "\t.set\tmips64r5\n";
300   MipsTargetStreamer::emitDirectiveSetMips64R5();
301 }
302 
303 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
304   OS << "\t.set\tmips64r6\n";
305   MipsTargetStreamer::emitDirectiveSetMips64R6();
306 }
307 
308 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
309   OS << "\t.set\tdsp\n";
310   MipsTargetStreamer::emitDirectiveSetDsp();
311 }
312 
313 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
314   OS << "\t.set\tnodsp\n";
315   MipsTargetStreamer::emitDirectiveSetNoDsp();
316 }
317 
318 void MipsTargetAsmStreamer::emitDirectiveSetPop() {
319   OS << "\t.set\tpop\n";
320   MipsTargetStreamer::emitDirectiveSetPop();
321 }
322 
323 void MipsTargetAsmStreamer::emitDirectiveSetPush() {
324  OS << "\t.set\tpush\n";
325  MipsTargetStreamer::emitDirectiveSetPush();
326 }
327 
328 void MipsTargetAsmStreamer::emitDirectiveSetSoftFloat() {
329   OS << "\t.set\tsoftfloat\n";
330   MipsTargetStreamer::emitDirectiveSetSoftFloat();
331 }
332 
333 void MipsTargetAsmStreamer::emitDirectiveSetHardFloat() {
334   OS << "\t.set\thardfloat\n";
335   MipsTargetStreamer::emitDirectiveSetHardFloat();
336 }
337 
338 // Print a 32 bit hex number with all numbers.
339 static void printHex32(unsigned Value, raw_ostream &OS) {
340   OS << "0x";
341   for (int i = 7; i >= 0; i--)
342     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
343 }
344 
345 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
346                                      int CPUTopSavedRegOff) {
347   OS << "\t.mask \t";
348   printHex32(CPUBitmask, OS);
349   OS << ',' << CPUTopSavedRegOff << '\n';
350 }
351 
352 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
353                                       int FPUTopSavedRegOff) {
354   OS << "\t.fmask\t";
355   printHex32(FPUBitmask, OS);
356   OS << "," << FPUTopSavedRegOff << '\n';
357 }
358 
359 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
360   OS << "\t.cpload\t$"
361      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
362   forbidModuleDirective();
363 }
364 
365 void MipsTargetAsmStreamer::emitDirectiveCpRestore(int Offset) {
366   MipsTargetStreamer::emitDirectiveCpRestore(Offset);
367   OS << "\t.cprestore\t" << Offset << "\n";
368 }
369 
370 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
371                                                  int RegOrOffset,
372                                                  const MCSymbol &Sym,
373                                                  bool IsReg) {
374   OS << "\t.cpsetup\t$"
375      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
376 
377   if (IsReg)
378     OS << "$"
379        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
380   else
381     OS << RegOrOffset;
382 
383   OS << ", ";
384 
385   OS << Sym.getName();
386   forbidModuleDirective();
387 }
388 
389 void MipsTargetAsmStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
390                                                   bool SaveLocationIsRegister) {
391   OS << "\t.cpreturn";
392   forbidModuleDirective();
393 }
394 
395 void MipsTargetAsmStreamer::emitDirectiveModuleFP() {
396   OS << "\t.module\tfp=";
397   OS << ABIFlagsSection.getFpABIString(ABIFlagsSection.getFpABI()) << "\n";
398 }
399 
400 void MipsTargetAsmStreamer::emitDirectiveSetFp(
401     MipsABIFlagsSection::FpABIKind Value) {
402   MipsTargetStreamer::emitDirectiveSetFp(Value);
403 
404   OS << "\t.set\tfp=";
405   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
406 }
407 
408 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg() {
409   MipsTargetStreamer::emitDirectiveModuleOddSPReg();
410 
411   OS << "\t.module\t" << (ABIFlagsSection.OddSPReg ? "" : "no") << "oddspreg\n";
412 }
413 
414 void MipsTargetAsmStreamer::emitDirectiveSetOddSPReg() {
415   MipsTargetStreamer::emitDirectiveSetOddSPReg();
416   OS << "\t.set\toddspreg\n";
417 }
418 
419 void MipsTargetAsmStreamer::emitDirectiveSetNoOddSPReg() {
420   MipsTargetStreamer::emitDirectiveSetNoOddSPReg();
421   OS << "\t.set\tnooddspreg\n";
422 }
423 
424 void MipsTargetAsmStreamer::emitDirectiveModuleSoftFloat() {
425   OS << "\t.module\tsoftfloat\n";
426 }
427 
428 void MipsTargetAsmStreamer::emitDirectiveModuleHardFloat() {
429   OS << "\t.module\thardfloat\n";
430 }
431 
432 // This part is for ELF object output.
433 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
434                                              const MCSubtargetInfo &STI)
435     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
436   MCAssembler &MCA = getStreamer().getAssembler();
437   Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
438 
439   const FeatureBitset &Features = STI.getFeatureBits();
440 
441   // Set the header flags that we can in the constructor.
442   // FIXME: This is a fairly terrible hack. We set the rest
443   // of these in the destructor. The problem here is two-fold:
444   //
445   // a: Some of the eflags can be set/reset by directives.
446   // b: There aren't any usage paths that initialize the ABI
447   //    pointer until after we initialize either an assembler
448   //    or the target machine.
449   // We can fix this by making the target streamer construct
450   // the ABI, but this is fraught with wide ranging dependency
451   // issues as well.
452   unsigned EFlags = MCA.getELFHeaderEFlags();
453 
454   // Architecture
455   if (Features[Mips::FeatureMips64r6])
456     EFlags |= ELF::EF_MIPS_ARCH_64R6;
457   else if (Features[Mips::FeatureMips64r2] ||
458            Features[Mips::FeatureMips64r3] ||
459            Features[Mips::FeatureMips64r5])
460     EFlags |= ELF::EF_MIPS_ARCH_64R2;
461   else if (Features[Mips::FeatureMips64])
462     EFlags |= ELF::EF_MIPS_ARCH_64;
463   else if (Features[Mips::FeatureMips5])
464     EFlags |= ELF::EF_MIPS_ARCH_5;
465   else if (Features[Mips::FeatureMips4])
466     EFlags |= ELF::EF_MIPS_ARCH_4;
467   else if (Features[Mips::FeatureMips3])
468     EFlags |= ELF::EF_MIPS_ARCH_3;
469   else if (Features[Mips::FeatureMips32r6])
470     EFlags |= ELF::EF_MIPS_ARCH_32R6;
471   else if (Features[Mips::FeatureMips32r2] ||
472            Features[Mips::FeatureMips32r3] ||
473            Features[Mips::FeatureMips32r5])
474     EFlags |= ELF::EF_MIPS_ARCH_32R2;
475   else if (Features[Mips::FeatureMips32])
476     EFlags |= ELF::EF_MIPS_ARCH_32;
477   else if (Features[Mips::FeatureMips2])
478     EFlags |= ELF::EF_MIPS_ARCH_2;
479   else
480     EFlags |= ELF::EF_MIPS_ARCH_1;
481 
482   // Other options.
483   if (Features[Mips::FeatureNaN2008])
484     EFlags |= ELF::EF_MIPS_NAN2008;
485 
486   // -mabicalls and -mplt are not implemented but we should act as if they were
487   // given.
488   EFlags |= ELF::EF_MIPS_CPIC;
489 
490   MCA.setELFHeaderEFlags(EFlags);
491 }
492 
493 void MipsTargetELFStreamer::emitLabel(MCSymbol *S) {
494   auto *Symbol = cast<MCSymbolELF>(S);
495   if (!isMicroMipsEnabled())
496     return;
497   getStreamer().getAssembler().registerSymbol(*Symbol);
498   uint8_t Type = Symbol->getType();
499   if (Type != ELF::STT_FUNC)
500     return;
501 
502   Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
503 }
504 
505 void MipsTargetELFStreamer::finish() {
506   MCAssembler &MCA = getStreamer().getAssembler();
507   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
508 
509   // .bss, .text and .data are always at least 16-byte aligned.
510   MCSection &TextSection = *OFI.getTextSection();
511   MCA.registerSection(TextSection);
512   MCSection &DataSection = *OFI.getDataSection();
513   MCA.registerSection(DataSection);
514   MCSection &BSSSection = *OFI.getBSSSection();
515   MCA.registerSection(BSSSection);
516 
517   TextSection.setAlignment(std::max(16u, TextSection.getAlignment()));
518   DataSection.setAlignment(std::max(16u, DataSection.getAlignment()));
519   BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment()));
520 
521   const FeatureBitset &Features = STI.getFeatureBits();
522 
523   // Update e_header flags. See the FIXME and comment above in
524   // the constructor for a full rundown on this.
525   unsigned EFlags = MCA.getELFHeaderEFlags();
526 
527   // ABI
528   // N64 does not require any ABI bits.
529   if (getABI().IsO32())
530     EFlags |= ELF::EF_MIPS_ABI_O32;
531   else if (getABI().IsN32())
532     EFlags |= ELF::EF_MIPS_ABI2;
533 
534   if (Features[Mips::FeatureGP64Bit]) {
535     if (getABI().IsO32())
536       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
537   } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
538     EFlags |= ELF::EF_MIPS_32BITMODE;
539 
540   // If we've set the cpic eflag and we're n64, go ahead and set the pic
541   // one as well.
542   if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
543     EFlags |= ELF::EF_MIPS_PIC;
544 
545   MCA.setELFHeaderEFlags(EFlags);
546 
547   // Emit all the option records.
548   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
549   // .reginfo.
550   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
551   MEF.EmitMipsOptionRecords();
552 
553   emitMipsAbiFlags();
554 }
555 
556 void MipsTargetELFStreamer::emitAssignment(MCSymbol *S, const MCExpr *Value) {
557   auto *Symbol = cast<MCSymbolELF>(S);
558   // If on rhs is micromips symbol then mark Symbol as microMips.
559   if (Value->getKind() != MCExpr::SymbolRef)
560     return;
561   const auto &RhsSym = cast<MCSymbolELF>(
562       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol());
563 
564   if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS))
565     return;
566 
567   Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
568 }
569 
570 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
571   return static_cast<MCELFStreamer &>(Streamer);
572 }
573 
574 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
575   MicroMipsEnabled = true;
576 
577   MCAssembler &MCA = getStreamer().getAssembler();
578   unsigned Flags = MCA.getELFHeaderEFlags();
579   Flags |= ELF::EF_MIPS_MICROMIPS;
580   MCA.setELFHeaderEFlags(Flags);
581   forbidModuleDirective();
582 }
583 
584 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
585   MicroMipsEnabled = false;
586   forbidModuleDirective();
587 }
588 
589 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
590   MCAssembler &MCA = getStreamer().getAssembler();
591   unsigned Flags = MCA.getELFHeaderEFlags();
592   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
593   MCA.setELFHeaderEFlags(Flags);
594   forbidModuleDirective();
595 }
596 
597 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
598   MCAssembler &MCA = getStreamer().getAssembler();
599   unsigned Flags = MCA.getELFHeaderEFlags();
600   Flags |= ELF::EF_MIPS_NOREORDER;
601   MCA.setELFHeaderEFlags(Flags);
602   forbidModuleDirective();
603 }
604 
605 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
606   MCAssembler &MCA = getStreamer().getAssembler();
607   MCContext &Context = MCA.getContext();
608   MCStreamer &OS = getStreamer();
609 
610   MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS, 0);
611 
612   MCSymbol *Sym = Context.getOrCreateSymbol(Name);
613   const MCSymbolRefExpr *ExprRef =
614       MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, Context);
615 
616   MCA.registerSection(*Sec);
617   Sec->setAlignment(4);
618 
619   OS.PushSection();
620 
621   OS.SwitchSection(Sec);
622 
623   OS.EmitValueImpl(ExprRef, 4);
624 
625   OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
626   OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4);  // reg_offset
627 
628   OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
629   OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4);  // fpreg_offset
630 
631   OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
632   OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4);    // frame_reg
633   OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4);   // return_reg
634 
635   // The .end directive marks the end of a procedure. Invalidate
636   // the information gathered up until this point.
637   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
638 
639   OS.PopSection();
640 
641   // .end also implicitly sets the size.
642   MCSymbol *CurPCSym = Context.createTempSymbol();
643   OS.EmitLabel(CurPCSym);
644   const MCExpr *Size = MCBinaryExpr::createSub(
645       MCSymbolRefExpr::create(CurPCSym, MCSymbolRefExpr::VK_None, Context),
646       ExprRef, Context);
647   int64_t AbsSize;
648   if (!Size->evaluateAsAbsolute(AbsSize, MCA))
649     llvm_unreachable("Function size must be evaluatable as absolute");
650   Size = MCConstantExpr::create(AbsSize, Context);
651   static_cast<MCSymbolELF *>(Sym)->setSize(Size);
652 }
653 
654 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
655   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
656 
657   // .ent also acts like an implicit '.type symbol, STT_FUNC'
658   static_cast<const MCSymbolELF &>(Symbol).setType(ELF::STT_FUNC);
659 }
660 
661 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
662   MCAssembler &MCA = getStreamer().getAssembler();
663   unsigned Flags = MCA.getELFHeaderEFlags();
664   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
665   MCA.setELFHeaderEFlags(Flags);
666 }
667 
668 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
669   MCAssembler &MCA = getStreamer().getAssembler();
670   unsigned Flags = MCA.getELFHeaderEFlags();
671   Flags |= ELF::EF_MIPS_NAN2008;
672   MCA.setELFHeaderEFlags(Flags);
673 }
674 
675 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
676   MCAssembler &MCA = getStreamer().getAssembler();
677   unsigned Flags = MCA.getELFHeaderEFlags();
678   Flags &= ~ELF::EF_MIPS_NAN2008;
679   MCA.setELFHeaderEFlags(Flags);
680 }
681 
682 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
683   MCAssembler &MCA = getStreamer().getAssembler();
684   unsigned Flags = MCA.getELFHeaderEFlags();
685   // This option overrides other PIC options like -KPIC.
686   Pic = false;
687   Flags &= ~ELF::EF_MIPS_PIC;
688   MCA.setELFHeaderEFlags(Flags);
689 }
690 
691 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
692   MCAssembler &MCA = getStreamer().getAssembler();
693   unsigned Flags = MCA.getELFHeaderEFlags();
694   Pic = true;
695   // NOTE: We are following the GAS behaviour here which means the directive
696   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
697   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
698   // EF_MIPS_CPIC to be mutually exclusive.
699   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
700   MCA.setELFHeaderEFlags(Flags);
701 }
702 
703 void MipsTargetELFStreamer::emitDirectiveInsn() {
704   MipsTargetStreamer::emitDirectiveInsn();
705   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
706   MEF.createPendingLabelRelocs();
707 }
708 
709 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
710                                       unsigned ReturnReg_) {
711   MCContext &Context = getStreamer().getAssembler().getContext();
712   const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
713 
714   FrameInfoSet = true;
715   FrameReg = RegInfo->getEncodingValue(StackReg);
716   FrameOffset = StackSize;
717   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
718 }
719 
720 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
721                                      int CPUTopSavedRegOff) {
722   GPRInfoSet = true;
723   GPRBitMask = CPUBitmask;
724   GPROffset = CPUTopSavedRegOff;
725 }
726 
727 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
728                                       int FPUTopSavedRegOff) {
729   FPRInfoSet = true;
730   FPRBitMask = FPUBitmask;
731   FPROffset = FPUTopSavedRegOff;
732 }
733 
734 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
735   // .cpload $reg
736   // This directive expands to:
737   // lui   $gp, %hi(_gp_disp)
738   // addui $gp, $gp, %lo(_gp_disp)
739   // addu  $gp, $gp, $reg
740   // when support for position independent code is enabled.
741   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
742     return;
743 
744   // There's a GNU extension controlled by -mno-shared that allows
745   // locally-binding symbols to be accessed using absolute addresses.
746   // This is currently not supported. When supported -mno-shared makes
747   // .cpload expand to:
748   //   lui     $gp, %hi(__gnu_local_gp)
749   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
750 
751   StringRef SymName("_gp_disp");
752   MCAssembler &MCA = getStreamer().getAssembler();
753   MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName);
754   MCA.registerSymbol(*GP_Disp);
755 
756   MCInst TmpInst;
757   TmpInst.setOpcode(Mips::LUi);
758   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
759   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::create(
760       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
761   TmpInst.addOperand(MCOperand::createExpr(HiSym));
762   getStreamer().EmitInstruction(TmpInst, STI);
763 
764   TmpInst.clear();
765 
766   TmpInst.setOpcode(Mips::ADDiu);
767   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
768   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
769   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::create(
770       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
771   TmpInst.addOperand(MCOperand::createExpr(LoSym));
772   getStreamer().EmitInstruction(TmpInst, STI);
773 
774   TmpInst.clear();
775 
776   TmpInst.setOpcode(Mips::ADDu);
777   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
778   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
779   TmpInst.addOperand(MCOperand::createReg(RegNo));
780   getStreamer().EmitInstruction(TmpInst, STI);
781 
782   forbidModuleDirective();
783 }
784 
785 void MipsTargetELFStreamer::emitDirectiveCpRestore(int Offset) {
786   MipsTargetStreamer::emitDirectiveCpRestore(Offset);
787   // .cprestore offset
788   // When PIC mode is enabled and the O32 ABI is used, this directive expands
789   // to:
790   //    sw $gp, offset($sp)
791   // and adds a corresponding LW after every JAL.
792 
793   // Note that .cprestore is ignored if used with the N32 and N64 ABIs or if it
794   // is used in non-PIC mode.
795   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
796     return;
797 
798   // FIXME: MipsAsmParser currently emits the instructions that should be
799   // emitted here.
800 }
801 
802 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
803                                                  int RegOrOffset,
804                                                  const MCSymbol &Sym,
805                                                  bool IsReg) {
806   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
807   if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
808     return;
809 
810   MCAssembler &MCA = getStreamer().getAssembler();
811   MCInst Inst;
812 
813   // Either store the old $gp in a register or on the stack
814   if (IsReg) {
815     // move $save, $gpreg
816     Inst.setOpcode(Mips::OR64);
817     Inst.addOperand(MCOperand::createReg(RegOrOffset));
818     Inst.addOperand(MCOperand::createReg(Mips::GP));
819     Inst.addOperand(MCOperand::createReg(Mips::ZERO));
820   } else {
821     // sd $gpreg, offset($sp)
822     Inst.setOpcode(Mips::SD);
823     Inst.addOperand(MCOperand::createReg(Mips::GP));
824     Inst.addOperand(MCOperand::createReg(Mips::SP));
825     Inst.addOperand(MCOperand::createImm(RegOrOffset));
826   }
827   getStreamer().EmitInstruction(Inst, STI);
828   Inst.clear();
829 
830   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::create(
831       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
832   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::create(
833       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
834 
835   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
836   Inst.setOpcode(Mips::LUi);
837   Inst.addOperand(MCOperand::createReg(Mips::GP));
838   Inst.addOperand(MCOperand::createExpr(HiExpr));
839   getStreamer().EmitInstruction(Inst, STI);
840   Inst.clear();
841 
842   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
843   Inst.setOpcode(Mips::ADDiu);
844   Inst.addOperand(MCOperand::createReg(Mips::GP));
845   Inst.addOperand(MCOperand::createReg(Mips::GP));
846   Inst.addOperand(MCOperand::createExpr(LoExpr));
847   getStreamer().EmitInstruction(Inst, STI);
848   Inst.clear();
849 
850   // daddu  $gp, $gp, $funcreg
851   Inst.setOpcode(Mips::DADDu);
852   Inst.addOperand(MCOperand::createReg(Mips::GP));
853   Inst.addOperand(MCOperand::createReg(Mips::GP));
854   Inst.addOperand(MCOperand::createReg(RegNo));
855   getStreamer().EmitInstruction(Inst, STI);
856 
857   forbidModuleDirective();
858 }
859 
860 void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
861                                                   bool SaveLocationIsRegister) {
862   // Only N32 and N64 emit anything for .cpreturn iff PIC is set.
863   if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
864     return;
865 
866   MCInst Inst;
867   // Either restore the old $gp from a register or on the stack
868   if (SaveLocationIsRegister) {
869     Inst.setOpcode(Mips::OR);
870     Inst.addOperand(MCOperand::createReg(Mips::GP));
871     Inst.addOperand(MCOperand::createReg(SaveLocation));
872     Inst.addOperand(MCOperand::createReg(Mips::ZERO));
873   } else {
874     Inst.setOpcode(Mips::LD);
875     Inst.addOperand(MCOperand::createReg(Mips::GP));
876     Inst.addOperand(MCOperand::createReg(Mips::SP));
877     Inst.addOperand(MCOperand::createImm(SaveLocation));
878   }
879   getStreamer().EmitInstruction(Inst, STI);
880 
881   forbidModuleDirective();
882 }
883 
884 void MipsTargetELFStreamer::emitMipsAbiFlags() {
885   MCAssembler &MCA = getStreamer().getAssembler();
886   MCContext &Context = MCA.getContext();
887   MCStreamer &OS = getStreamer();
888   MCSectionELF *Sec = Context.getELFSection(
889       ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
890   MCA.registerSection(*Sec);
891   Sec->setAlignment(8);
892   OS.SwitchSection(Sec);
893 
894   OS << ABIFlagsSection;
895 }
896