1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
28 
29 using namespace llvm;
30 
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32     : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
33   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
34 }
35 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
37 void MipsTargetStreamer::emitDirectiveSetMips16() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
40 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
41 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
46 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
47   forbidModuleDirective();
48 }
49 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
50 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
51 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
52 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
53 void MipsTargetStreamer::emitDirectiveNaN2008() {}
54 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
55 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
56 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
57 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
58                                    unsigned ReturnReg) {}
59 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
60 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
61 }
62 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
63   forbidModuleDirective();
64 }
65 void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
75 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
79 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
80 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
81 void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); }
82 void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); }
83 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
84 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
85 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
86 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
87                                               const MCSymbol &Sym, bool IsReg) {
88 }
89 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
90                                                      bool IsO32ABI) {
91   if (!Enabled && !IsO32ABI)
92     report_fatal_error("+nooddspreg is only valid for O32");
93 }
94 void MipsTargetStreamer::emitDirectiveSetFp(
95     MipsABIFlagsSection::FpABIKind Value) {
96   forbidModuleDirective();
97 }
98 
99 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
100                                              formatted_raw_ostream &OS)
101     : MipsTargetStreamer(S), OS(OS) {}
102 
103 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
104   OS << "\t.set\tmicromips\n";
105   forbidModuleDirective();
106 }
107 
108 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
109   OS << "\t.set\tnomicromips\n";
110   forbidModuleDirective();
111 }
112 
113 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
114   OS << "\t.set\tmips16\n";
115   forbidModuleDirective();
116 }
117 
118 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
119   OS << "\t.set\tnomips16\n";
120   MipsTargetStreamer::emitDirectiveSetNoMips16();
121 }
122 
123 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
124   OS << "\t.set\treorder\n";
125   MipsTargetStreamer::emitDirectiveSetReorder();
126 }
127 
128 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
129   OS << "\t.set\tnoreorder\n";
130   forbidModuleDirective();
131 }
132 
133 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
134   OS << "\t.set\tmacro\n";
135   MipsTargetStreamer::emitDirectiveSetMacro();
136 }
137 
138 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
139   OS << "\t.set\tnomacro\n";
140   MipsTargetStreamer::emitDirectiveSetNoMacro();
141 }
142 
143 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
144   OS << "\t.set\tmsa\n";
145   MipsTargetStreamer::emitDirectiveSetMsa();
146 }
147 
148 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
149   OS << "\t.set\tnomsa\n";
150   MipsTargetStreamer::emitDirectiveSetNoMsa();
151 }
152 
153 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
154   OS << "\t.set\tat\n";
155   MipsTargetStreamer::emitDirectiveSetAt();
156 }
157 
158 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
159   OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
160   MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
161 }
162 
163 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
164   OS << "\t.set\tnoat\n";
165   MipsTargetStreamer::emitDirectiveSetNoAt();
166 }
167 
168 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
169   OS << "\t.end\t" << Name << '\n';
170 }
171 
172 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
173   OS << "\t.ent\t" << Symbol.getName() << '\n';
174 }
175 
176 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
177 
178 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
179 
180 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
181   OS << "\t.nan\tlegacy\n";
182 }
183 
184 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
185   OS << "\t.option\tpic0\n";
186 }
187 
188 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
189   OS << "\t.option\tpic2\n";
190 }
191 
192 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
193                                       unsigned ReturnReg) {
194   OS << "\t.frame\t$"
195      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
196      << StackSize << ",$"
197      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
198 }
199 
200 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
201   OS << "\t.set arch=" << Arch << "\n";
202   MipsTargetStreamer::emitDirectiveSetArch(Arch);
203 }
204 
205 void MipsTargetAsmStreamer::emitDirectiveSetMips0() {
206   OS << "\t.set\tmips0\n";
207   MipsTargetStreamer::emitDirectiveSetMips0();
208 }
209 
210 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
211   OS << "\t.set\tmips1\n";
212   MipsTargetStreamer::emitDirectiveSetMips1();
213 }
214 
215 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
216   OS << "\t.set\tmips2\n";
217   MipsTargetStreamer::emitDirectiveSetMips2();
218 }
219 
220 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
221   OS << "\t.set\tmips3\n";
222   MipsTargetStreamer::emitDirectiveSetMips3();
223 }
224 
225 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
226   OS << "\t.set\tmips4\n";
227   MipsTargetStreamer::emitDirectiveSetMips4();
228 }
229 
230 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
231   OS << "\t.set\tmips5\n";
232   MipsTargetStreamer::emitDirectiveSetMips5();
233 }
234 
235 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
236   OS << "\t.set\tmips32\n";
237   MipsTargetStreamer::emitDirectiveSetMips32();
238 }
239 
240 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
241   OS << "\t.set\tmips32r2\n";
242   MipsTargetStreamer::emitDirectiveSetMips32R2();
243 }
244 
245 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
246   OS << "\t.set\tmips32r3\n";
247   MipsTargetStreamer::emitDirectiveSetMips32R3();
248 }
249 
250 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
251   OS << "\t.set\tmips32r5\n";
252   MipsTargetStreamer::emitDirectiveSetMips32R5();
253 }
254 
255 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
256   OS << "\t.set\tmips32r6\n";
257   MipsTargetStreamer::emitDirectiveSetMips32R6();
258 }
259 
260 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
261   OS << "\t.set\tmips64\n";
262   MipsTargetStreamer::emitDirectiveSetMips64();
263 }
264 
265 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
266   OS << "\t.set\tmips64r2\n";
267   MipsTargetStreamer::emitDirectiveSetMips64R2();
268 }
269 
270 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
271   OS << "\t.set\tmips64r3\n";
272   MipsTargetStreamer::emitDirectiveSetMips64R3();
273 }
274 
275 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
276   OS << "\t.set\tmips64r5\n";
277   MipsTargetStreamer::emitDirectiveSetMips64R5();
278 }
279 
280 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
281   OS << "\t.set\tmips64r6\n";
282   MipsTargetStreamer::emitDirectiveSetMips64R6();
283 }
284 
285 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
286   OS << "\t.set\tdsp\n";
287   MipsTargetStreamer::emitDirectiveSetDsp();
288 }
289 
290 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
291   OS << "\t.set\tnodsp\n";
292   MipsTargetStreamer::emitDirectiveSetNoDsp();
293 }
294 
295 void MipsTargetAsmStreamer::emitDirectiveSetPop() {
296   OS << "\t.set\tpop\n";
297   MipsTargetStreamer::emitDirectiveSetPop();
298 }
299 
300 void MipsTargetAsmStreamer::emitDirectiveSetPush() {
301  OS << "\t.set\tpush\n";
302  MipsTargetStreamer::emitDirectiveSetPush();
303 }
304 
305 // Print a 32 bit hex number with all numbers.
306 static void printHex32(unsigned Value, raw_ostream &OS) {
307   OS << "0x";
308   for (int i = 7; i >= 0; i--)
309     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
310 }
311 
312 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
313                                      int CPUTopSavedRegOff) {
314   OS << "\t.mask \t";
315   printHex32(CPUBitmask, OS);
316   OS << ',' << CPUTopSavedRegOff << '\n';
317 }
318 
319 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
320                                       int FPUTopSavedRegOff) {
321   OS << "\t.fmask\t";
322   printHex32(FPUBitmask, OS);
323   OS << "," << FPUTopSavedRegOff << '\n';
324 }
325 
326 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
327   OS << "\t.cpload\t$"
328      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
329   forbidModuleDirective();
330 }
331 
332 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
333                                                  int RegOrOffset,
334                                                  const MCSymbol &Sym,
335                                                  bool IsReg) {
336   OS << "\t.cpsetup\t$"
337      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
338 
339   if (IsReg)
340     OS << "$"
341        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
342   else
343     OS << RegOrOffset;
344 
345   OS << ", ";
346 
347   OS << Sym.getName() << "\n";
348   forbidModuleDirective();
349 }
350 
351 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
352     MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
353   MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
354 
355   StringRef ModuleValue;
356   OS << "\t.module\tfp=";
357   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
358 }
359 
360 void MipsTargetAsmStreamer::emitDirectiveSetFp(
361     MipsABIFlagsSection::FpABIKind Value) {
362   MipsTargetStreamer::emitDirectiveSetFp(Value);
363 
364   StringRef ModuleValue;
365   OS << "\t.set\tfp=";
366   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
367 }
368 
369 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
370                                                         bool IsO32ABI) {
371   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
372 
373   OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
374 }
375 
376 // This part is for ELF object output.
377 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
378                                              const MCSubtargetInfo &STI)
379     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
380   MCAssembler &MCA = getStreamer().getAssembler();
381   Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
382 
383   uint64_t Features = STI.getFeatureBits();
384 
385   // Set the header flags that we can in the constructor.
386   // FIXME: This is a fairly terrible hack. We set the rest
387   // of these in the destructor. The problem here is two-fold:
388   //
389   // a: Some of the eflags can be set/reset by directives.
390   // b: There aren't any usage paths that initialize the ABI
391   //    pointer until after we initialize either an assembler
392   //    or the target machine.
393   // We can fix this by making the target streamer construct
394   // the ABI, but this is fraught with wide ranging dependency
395   // issues as well.
396   unsigned EFlags = MCA.getELFHeaderEFlags();
397 
398   // Architecture
399   if (Features & Mips::FeatureMips64r6)
400     EFlags |= ELF::EF_MIPS_ARCH_64R6;
401   else if (Features & Mips::FeatureMips64r2 ||
402            Features & Mips::FeatureMips64r3 ||
403            Features & Mips::FeatureMips64r5)
404     EFlags |= ELF::EF_MIPS_ARCH_64R2;
405   else if (Features & Mips::FeatureMips64)
406     EFlags |= ELF::EF_MIPS_ARCH_64;
407   else if (Features & Mips::FeatureMips5)
408     EFlags |= ELF::EF_MIPS_ARCH_5;
409   else if (Features & Mips::FeatureMips4)
410     EFlags |= ELF::EF_MIPS_ARCH_4;
411   else if (Features & Mips::FeatureMips3)
412     EFlags |= ELF::EF_MIPS_ARCH_3;
413   else if (Features & Mips::FeatureMips32r6)
414     EFlags |= ELF::EF_MIPS_ARCH_32R6;
415   else if (Features & Mips::FeatureMips32r2 ||
416            Features & Mips::FeatureMips32r3 ||
417            Features & Mips::FeatureMips32r5)
418     EFlags |= ELF::EF_MIPS_ARCH_32R2;
419   else if (Features & Mips::FeatureMips32)
420     EFlags |= ELF::EF_MIPS_ARCH_32;
421   else if (Features & Mips::FeatureMips2)
422     EFlags |= ELF::EF_MIPS_ARCH_2;
423   else
424     EFlags |= ELF::EF_MIPS_ARCH_1;
425 
426   // Other options.
427   if (Features & Mips::FeatureNaN2008)
428     EFlags |= ELF::EF_MIPS_NAN2008;
429 
430   // -mabicalls and -mplt are not implemented but we should act as if they were
431   // given.
432   EFlags |= ELF::EF_MIPS_CPIC;
433 
434   MCA.setELFHeaderEFlags(EFlags);
435 }
436 
437 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
438   if (!isMicroMipsEnabled())
439     return;
440   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
441   uint8_t Type = MCELF::GetType(Data);
442   if (Type != ELF::STT_FUNC)
443     return;
444 
445   // The "other" values are stored in the last 6 bits of the second byte
446   // The traditional defines for STO values assume the full byte and thus
447   // the shift to pack it.
448   MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
449 }
450 
451 void MipsTargetELFStreamer::finish() {
452   MCAssembler &MCA = getStreamer().getAssembler();
453   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
454 
455   // .bss, .text and .data are always at least 16-byte aligned.
456   MCSectionData &TextSectionData =
457       MCA.getOrCreateSectionData(*OFI.getTextSection());
458   MCSectionData &DataSectionData =
459       MCA.getOrCreateSectionData(*OFI.getDataSection());
460   MCSectionData &BSSSectionData =
461       MCA.getOrCreateSectionData(*OFI.getBSSSection());
462 
463   TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
464   DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
465   BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
466 
467   uint64_t Features = STI.getFeatureBits();
468 
469   // Update e_header flags. See the FIXME and comment above in
470   // the constructor for a full rundown on this.
471   unsigned EFlags = MCA.getELFHeaderEFlags();
472 
473   // ABI
474   // N64 does not require any ABI bits.
475   if (getABI().IsO32())
476     EFlags |= ELF::EF_MIPS_ABI_O32;
477   else if (getABI().IsN32())
478     EFlags |= ELF::EF_MIPS_ABI2;
479 
480   if (Features & Mips::FeatureGP64Bit) {
481     if (getABI().IsO32())
482       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
483   } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
484     EFlags |= ELF::EF_MIPS_32BITMODE;
485 
486   // If we've set the cpic eflag and we're n64, go ahead and set the pic
487   // one as well.
488   if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
489     EFlags |= ELF::EF_MIPS_PIC;
490 
491   MCA.setELFHeaderEFlags(EFlags);
492 
493   // Emit all the option records.
494   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
495   // .reginfo.
496   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
497   MEF.EmitMipsOptionRecords();
498 
499   emitMipsAbiFlags();
500 }
501 
502 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
503                                            const MCExpr *Value) {
504   // If on rhs is micromips symbol then mark Symbol as microMips.
505   if (Value->getKind() != MCExpr::SymbolRef)
506     return;
507   const MCSymbol &RhsSym =
508       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
509   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
510   uint8_t Type = MCELF::GetType(Data);
511   if ((Type != ELF::STT_FUNC) ||
512       !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
513     return;
514 
515   MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
516   // The "other" values are stored in the last 6 bits of the second byte.
517   // The traditional defines for STO values assume the full byte and thus
518   // the shift to pack it.
519   MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
520 }
521 
522 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
523   return static_cast<MCELFStreamer &>(Streamer);
524 }
525 
526 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
527   MicroMipsEnabled = true;
528 
529   MCAssembler &MCA = getStreamer().getAssembler();
530   unsigned Flags = MCA.getELFHeaderEFlags();
531   Flags |= ELF::EF_MIPS_MICROMIPS;
532   MCA.setELFHeaderEFlags(Flags);
533   forbidModuleDirective();
534 }
535 
536 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
537   MicroMipsEnabled = false;
538   forbidModuleDirective();
539 }
540 
541 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
542   MCAssembler &MCA = getStreamer().getAssembler();
543   unsigned Flags = MCA.getELFHeaderEFlags();
544   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
545   MCA.setELFHeaderEFlags(Flags);
546   forbidModuleDirective();
547 }
548 
549 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
550   MCAssembler &MCA = getStreamer().getAssembler();
551   unsigned Flags = MCA.getELFHeaderEFlags();
552   Flags |= ELF::EF_MIPS_NOREORDER;
553   MCA.setELFHeaderEFlags(Flags);
554   forbidModuleDirective();
555 }
556 
557 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
558   MCAssembler &MCA = getStreamer().getAssembler();
559   MCContext &Context = MCA.getContext();
560   MCStreamer &OS = getStreamer();
561 
562   const MCSectionELF *Sec = Context.getELFSection(
563       ".pdr", ELF::SHT_PROGBITS, ELF::SHF_ALLOC | ELF::SHT_REL);
564 
565   const MCSymbolRefExpr *ExprRef =
566       MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
567 
568   MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
569   SecData.setAlignment(4);
570 
571   OS.PushSection();
572 
573   OS.SwitchSection(Sec);
574 
575   OS.EmitValueImpl(ExprRef, 4);
576 
577   OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
578   OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4);  // reg_offset
579 
580   OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
581   OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4);  // fpreg_offset
582 
583   OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
584   OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4);    // frame_reg
585   OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4);   // return_reg
586 
587   // The .end directive marks the end of a procedure. Invalidate
588   // the information gathered up until this point.
589   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
590 
591   OS.PopSection();
592 }
593 
594 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
595   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
596 }
597 
598 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
599   MCAssembler &MCA = getStreamer().getAssembler();
600   unsigned Flags = MCA.getELFHeaderEFlags();
601   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
602   MCA.setELFHeaderEFlags(Flags);
603 }
604 
605 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
606   MCAssembler &MCA = getStreamer().getAssembler();
607   unsigned Flags = MCA.getELFHeaderEFlags();
608   Flags |= ELF::EF_MIPS_NAN2008;
609   MCA.setELFHeaderEFlags(Flags);
610 }
611 
612 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
613   MCAssembler &MCA = getStreamer().getAssembler();
614   unsigned Flags = MCA.getELFHeaderEFlags();
615   Flags &= ~ELF::EF_MIPS_NAN2008;
616   MCA.setELFHeaderEFlags(Flags);
617 }
618 
619 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
620   MCAssembler &MCA = getStreamer().getAssembler();
621   unsigned Flags = MCA.getELFHeaderEFlags();
622   // This option overrides other PIC options like -KPIC.
623   Pic = false;
624   Flags &= ~ELF::EF_MIPS_PIC;
625   MCA.setELFHeaderEFlags(Flags);
626 }
627 
628 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
629   MCAssembler &MCA = getStreamer().getAssembler();
630   unsigned Flags = MCA.getELFHeaderEFlags();
631   Pic = true;
632   // NOTE: We are following the GAS behaviour here which means the directive
633   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
634   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
635   // EF_MIPS_CPIC to be mutually exclusive.
636   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
637   MCA.setELFHeaderEFlags(Flags);
638 }
639 
640 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
641                                       unsigned ReturnReg_) {
642   MCContext &Context = getStreamer().getAssembler().getContext();
643   const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
644 
645   FrameInfoSet = true;
646   FrameReg = RegInfo->getEncodingValue(StackReg);
647   FrameOffset = StackSize;
648   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
649 }
650 
651 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
652                                      int CPUTopSavedRegOff) {
653   GPRInfoSet = true;
654   GPRBitMask = CPUBitmask;
655   GPROffset = CPUTopSavedRegOff;
656 }
657 
658 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
659                                       int FPUTopSavedRegOff) {
660   FPRInfoSet = true;
661   FPRBitMask = FPUBitmask;
662   FPROffset = FPUTopSavedRegOff;
663 }
664 
665 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
666   // .cpload $reg
667   // This directive expands to:
668   // lui   $gp, %hi(_gp_disp)
669   // addui $gp, $gp, %lo(_gp_disp)
670   // addu  $gp, $gp, $reg
671   // when support for position independent code is enabled.
672   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
673     return;
674 
675   // There's a GNU extension controlled by -mno-shared that allows
676   // locally-binding symbols to be accessed using absolute addresses.
677   // This is currently not supported. When supported -mno-shared makes
678   // .cpload expand to:
679   //   lui     $gp, %hi(__gnu_local_gp)
680   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
681 
682   StringRef SymName("_gp_disp");
683   MCAssembler &MCA = getStreamer().getAssembler();
684   MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
685   MCA.getOrCreateSymbolData(*GP_Disp);
686 
687   MCInst TmpInst;
688   TmpInst.setOpcode(Mips::LUi);
689   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
690   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
691       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
692   TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
693   getStreamer().EmitInstruction(TmpInst, STI);
694 
695   TmpInst.clear();
696 
697   TmpInst.setOpcode(Mips::ADDiu);
698   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
699   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
700   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
701       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
702   TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
703   getStreamer().EmitInstruction(TmpInst, STI);
704 
705   TmpInst.clear();
706 
707   TmpInst.setOpcode(Mips::ADDu);
708   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
709   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
710   TmpInst.addOperand(MCOperand::CreateReg(RegNo));
711   getStreamer().EmitInstruction(TmpInst, STI);
712 
713   forbidModuleDirective();
714 }
715 
716 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
717                                                  int RegOrOffset,
718                                                  const MCSymbol &Sym,
719                                                  bool IsReg) {
720   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
721   if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
722     return;
723 
724   MCAssembler &MCA = getStreamer().getAssembler();
725   MCInst Inst;
726 
727   // Either store the old $gp in a register or on the stack
728   if (IsReg) {
729     // move $save, $gpreg
730     Inst.setOpcode(Mips::DADDu);
731     Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
732     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
733     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
734   } else {
735     // sd $gpreg, offset($sp)
736     Inst.setOpcode(Mips::SD);
737     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
738     Inst.addOperand(MCOperand::CreateReg(Mips::SP));
739     Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
740   }
741   getStreamer().EmitInstruction(Inst, STI);
742   Inst.clear();
743 
744   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
745       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
746   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
747       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
748 
749   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
750   Inst.setOpcode(Mips::LUi);
751   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
752   Inst.addOperand(MCOperand::CreateExpr(HiExpr));
753   getStreamer().EmitInstruction(Inst, STI);
754   Inst.clear();
755 
756   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
757   Inst.setOpcode(Mips::ADDiu);
758   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
759   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
760   Inst.addOperand(MCOperand::CreateExpr(LoExpr));
761   getStreamer().EmitInstruction(Inst, STI);
762   Inst.clear();
763 
764   // daddu  $gp, $gp, $funcreg
765   Inst.setOpcode(Mips::DADDu);
766   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
767   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
768   Inst.addOperand(MCOperand::CreateReg(RegNo));
769   getStreamer().EmitInstruction(Inst, STI);
770 
771   forbidModuleDirective();
772 }
773 
774 void MipsTargetELFStreamer::emitMipsAbiFlags() {
775   MCAssembler &MCA = getStreamer().getAssembler();
776   MCContext &Context = MCA.getContext();
777   MCStreamer &OS = getStreamer();
778   const MCSectionELF *Sec = Context.getELFSection(
779       ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
780   MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
781   ABIShndxSD.setAlignment(8);
782   OS.SwitchSection(Sec);
783 
784   OS << ABIFlagsSection;
785 }
786 
787 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
788                                                         bool IsO32ABI) {
789   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
790 
791   ABIFlagsSection.OddSPReg = Enabled;
792 }
793