1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbolELF.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
27 
28 using namespace llvm;
29 
30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
31     : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
32   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
33 }
34 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetMips16() {}
37 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
38 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
40 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
41 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
46   forbidModuleDirective();
47 }
48 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
49 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
50 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
51 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
52 void MipsTargetStreamer::emitDirectiveNaN2008() {}
53 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
54 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
55 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
56 void MipsTargetStreamer::emitDirectiveInsn() { forbidModuleDirective(); }
57 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
58                                    unsigned ReturnReg) {}
59 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
60 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
61 }
62 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
63   forbidModuleDirective();
64 }
65 void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
75 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
79 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
80 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
81 void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); }
82 void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); }
83 void MipsTargetStreamer::emitDirectiveSetSoftFloat() {
84   forbidModuleDirective();
85 }
86 void MipsTargetStreamer::emitDirectiveSetHardFloat() {
87   forbidModuleDirective();
88 }
89 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
90 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
91 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
92 void MipsTargetStreamer::emitDirectiveCpRestore(
93     SmallVector<MCInst, 3> &StoreInsts, int Offset) {
94   forbidModuleDirective();
95 }
96 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
97                                               const MCSymbol &Sym, bool IsReg) {
98 }
99 
100 void MipsTargetStreamer::emitDirectiveModuleFP() {}
101 
102 void MipsTargetStreamer::emitDirectiveModuleOddSPReg() {
103   if (!ABIFlagsSection.OddSPReg && !ABIFlagsSection.Is32BitABI)
104     report_fatal_error("+nooddspreg is only valid for O32");
105 }
106 void MipsTargetStreamer::emitDirectiveModuleSoftFloat() {}
107 void MipsTargetStreamer::emitDirectiveModuleHardFloat() {}
108 void MipsTargetStreamer::emitDirectiveSetFp(
109     MipsABIFlagsSection::FpABIKind Value) {
110   forbidModuleDirective();
111 }
112 void MipsTargetStreamer::emitDirectiveSetOddSPReg() { forbidModuleDirective(); }
113 void MipsTargetStreamer::emitDirectiveSetNoOddSPReg() {
114   forbidModuleDirective();
115 }
116 
117 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
118                                              formatted_raw_ostream &OS)
119     : MipsTargetStreamer(S), OS(OS) {}
120 
121 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
122   OS << "\t.set\tmicromips\n";
123   forbidModuleDirective();
124 }
125 
126 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
127   OS << "\t.set\tnomicromips\n";
128   forbidModuleDirective();
129 }
130 
131 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
132   OS << "\t.set\tmips16\n";
133   forbidModuleDirective();
134 }
135 
136 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
137   OS << "\t.set\tnomips16\n";
138   MipsTargetStreamer::emitDirectiveSetNoMips16();
139 }
140 
141 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
142   OS << "\t.set\treorder\n";
143   MipsTargetStreamer::emitDirectiveSetReorder();
144 }
145 
146 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
147   OS << "\t.set\tnoreorder\n";
148   forbidModuleDirective();
149 }
150 
151 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
152   OS << "\t.set\tmacro\n";
153   MipsTargetStreamer::emitDirectiveSetMacro();
154 }
155 
156 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
157   OS << "\t.set\tnomacro\n";
158   MipsTargetStreamer::emitDirectiveSetNoMacro();
159 }
160 
161 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
162   OS << "\t.set\tmsa\n";
163   MipsTargetStreamer::emitDirectiveSetMsa();
164 }
165 
166 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
167   OS << "\t.set\tnomsa\n";
168   MipsTargetStreamer::emitDirectiveSetNoMsa();
169 }
170 
171 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
172   OS << "\t.set\tat\n";
173   MipsTargetStreamer::emitDirectiveSetAt();
174 }
175 
176 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
177   OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
178   MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
179 }
180 
181 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
182   OS << "\t.set\tnoat\n";
183   MipsTargetStreamer::emitDirectiveSetNoAt();
184 }
185 
186 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
187   OS << "\t.end\t" << Name << '\n';
188 }
189 
190 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
191   OS << "\t.ent\t" << Symbol.getName() << '\n';
192 }
193 
194 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
195 
196 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
197 
198 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
199   OS << "\t.nan\tlegacy\n";
200 }
201 
202 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
203   OS << "\t.option\tpic0\n";
204 }
205 
206 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
207   OS << "\t.option\tpic2\n";
208 }
209 
210 void MipsTargetAsmStreamer::emitDirectiveInsn() {
211   MipsTargetStreamer::emitDirectiveInsn();
212   OS << "\t.insn\n";
213 }
214 
215 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
216                                       unsigned ReturnReg) {
217   OS << "\t.frame\t$"
218      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
219      << StackSize << ",$"
220      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
221 }
222 
223 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
224   OS << "\t.set arch=" << Arch << "\n";
225   MipsTargetStreamer::emitDirectiveSetArch(Arch);
226 }
227 
228 void MipsTargetAsmStreamer::emitDirectiveSetMips0() {
229   OS << "\t.set\tmips0\n";
230   MipsTargetStreamer::emitDirectiveSetMips0();
231 }
232 
233 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
234   OS << "\t.set\tmips1\n";
235   MipsTargetStreamer::emitDirectiveSetMips1();
236 }
237 
238 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
239   OS << "\t.set\tmips2\n";
240   MipsTargetStreamer::emitDirectiveSetMips2();
241 }
242 
243 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
244   OS << "\t.set\tmips3\n";
245   MipsTargetStreamer::emitDirectiveSetMips3();
246 }
247 
248 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
249   OS << "\t.set\tmips4\n";
250   MipsTargetStreamer::emitDirectiveSetMips4();
251 }
252 
253 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
254   OS << "\t.set\tmips5\n";
255   MipsTargetStreamer::emitDirectiveSetMips5();
256 }
257 
258 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
259   OS << "\t.set\tmips32\n";
260   MipsTargetStreamer::emitDirectiveSetMips32();
261 }
262 
263 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
264   OS << "\t.set\tmips32r2\n";
265   MipsTargetStreamer::emitDirectiveSetMips32R2();
266 }
267 
268 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
269   OS << "\t.set\tmips32r3\n";
270   MipsTargetStreamer::emitDirectiveSetMips32R3();
271 }
272 
273 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
274   OS << "\t.set\tmips32r5\n";
275   MipsTargetStreamer::emitDirectiveSetMips32R5();
276 }
277 
278 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
279   OS << "\t.set\tmips32r6\n";
280   MipsTargetStreamer::emitDirectiveSetMips32R6();
281 }
282 
283 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
284   OS << "\t.set\tmips64\n";
285   MipsTargetStreamer::emitDirectiveSetMips64();
286 }
287 
288 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
289   OS << "\t.set\tmips64r2\n";
290   MipsTargetStreamer::emitDirectiveSetMips64R2();
291 }
292 
293 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
294   OS << "\t.set\tmips64r3\n";
295   MipsTargetStreamer::emitDirectiveSetMips64R3();
296 }
297 
298 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
299   OS << "\t.set\tmips64r5\n";
300   MipsTargetStreamer::emitDirectiveSetMips64R5();
301 }
302 
303 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
304   OS << "\t.set\tmips64r6\n";
305   MipsTargetStreamer::emitDirectiveSetMips64R6();
306 }
307 
308 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
309   OS << "\t.set\tdsp\n";
310   MipsTargetStreamer::emitDirectiveSetDsp();
311 }
312 
313 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
314   OS << "\t.set\tnodsp\n";
315   MipsTargetStreamer::emitDirectiveSetNoDsp();
316 }
317 
318 void MipsTargetAsmStreamer::emitDirectiveSetPop() {
319   OS << "\t.set\tpop\n";
320   MipsTargetStreamer::emitDirectiveSetPop();
321 }
322 
323 void MipsTargetAsmStreamer::emitDirectiveSetPush() {
324  OS << "\t.set\tpush\n";
325  MipsTargetStreamer::emitDirectiveSetPush();
326 }
327 
328 void MipsTargetAsmStreamer::emitDirectiveSetSoftFloat() {
329   OS << "\t.set\tsoftfloat\n";
330   MipsTargetStreamer::emitDirectiveSetSoftFloat();
331 }
332 
333 void MipsTargetAsmStreamer::emitDirectiveSetHardFloat() {
334   OS << "\t.set\thardfloat\n";
335   MipsTargetStreamer::emitDirectiveSetHardFloat();
336 }
337 
338 // Print a 32 bit hex number with all numbers.
339 static void printHex32(unsigned Value, raw_ostream &OS) {
340   OS << "0x";
341   for (int i = 7; i >= 0; i--)
342     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
343 }
344 
345 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
346                                      int CPUTopSavedRegOff) {
347   OS << "\t.mask \t";
348   printHex32(CPUBitmask, OS);
349   OS << ',' << CPUTopSavedRegOff << '\n';
350 }
351 
352 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
353                                       int FPUTopSavedRegOff) {
354   OS << "\t.fmask\t";
355   printHex32(FPUBitmask, OS);
356   OS << "," << FPUTopSavedRegOff << '\n';
357 }
358 
359 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
360   OS << "\t.cpload\t$"
361      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
362   forbidModuleDirective();
363 }
364 
365 void MipsTargetAsmStreamer::emitDirectiveCpRestore(
366     SmallVector<MCInst, 3> &StoreInsts, int Offset) {
367   MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset);
368   OS << "\t.cprestore\t" << Offset << "\n";
369 }
370 
371 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
372                                                  int RegOrOffset,
373                                                  const MCSymbol &Sym,
374                                                  bool IsReg) {
375   OS << "\t.cpsetup\t$"
376      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
377 
378   if (IsReg)
379     OS << "$"
380        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
381   else
382     OS << RegOrOffset;
383 
384   OS << ", ";
385 
386   OS << Sym.getName();
387   forbidModuleDirective();
388 }
389 
390 void MipsTargetAsmStreamer::emitDirectiveModuleFP() {
391   OS << "\t.module\tfp=";
392   OS << ABIFlagsSection.getFpABIString(ABIFlagsSection.getFpABI()) << "\n";
393 }
394 
395 void MipsTargetAsmStreamer::emitDirectiveSetFp(
396     MipsABIFlagsSection::FpABIKind Value) {
397   MipsTargetStreamer::emitDirectiveSetFp(Value);
398 
399   OS << "\t.set\tfp=";
400   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
401 }
402 
403 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg() {
404   MipsTargetStreamer::emitDirectiveModuleOddSPReg();
405 
406   OS << "\t.module\t" << (ABIFlagsSection.OddSPReg ? "" : "no") << "oddspreg\n";
407 }
408 
409 void MipsTargetAsmStreamer::emitDirectiveSetOddSPReg() {
410   MipsTargetStreamer::emitDirectiveSetOddSPReg();
411   OS << "\t.set\toddspreg\n";
412 }
413 
414 void MipsTargetAsmStreamer::emitDirectiveSetNoOddSPReg() {
415   MipsTargetStreamer::emitDirectiveSetNoOddSPReg();
416   OS << "\t.set\tnooddspreg\n";
417 }
418 
419 void MipsTargetAsmStreamer::emitDirectiveModuleSoftFloat() {
420   OS << "\t.module\tsoftfloat\n";
421 }
422 
423 void MipsTargetAsmStreamer::emitDirectiveModuleHardFloat() {
424   OS << "\t.module\thardfloat\n";
425 }
426 
427 // This part is for ELF object output.
428 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
429                                              const MCSubtargetInfo &STI)
430     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
431   MCAssembler &MCA = getStreamer().getAssembler();
432   Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
433 
434   const FeatureBitset &Features = STI.getFeatureBits();
435 
436   // Set the header flags that we can in the constructor.
437   // FIXME: This is a fairly terrible hack. We set the rest
438   // of these in the destructor. The problem here is two-fold:
439   //
440   // a: Some of the eflags can be set/reset by directives.
441   // b: There aren't any usage paths that initialize the ABI
442   //    pointer until after we initialize either an assembler
443   //    or the target machine.
444   // We can fix this by making the target streamer construct
445   // the ABI, but this is fraught with wide ranging dependency
446   // issues as well.
447   unsigned EFlags = MCA.getELFHeaderEFlags();
448 
449   // Architecture
450   if (Features[Mips::FeatureMips64r6])
451     EFlags |= ELF::EF_MIPS_ARCH_64R6;
452   else if (Features[Mips::FeatureMips64r2] ||
453            Features[Mips::FeatureMips64r3] ||
454            Features[Mips::FeatureMips64r5])
455     EFlags |= ELF::EF_MIPS_ARCH_64R2;
456   else if (Features[Mips::FeatureMips64])
457     EFlags |= ELF::EF_MIPS_ARCH_64;
458   else if (Features[Mips::FeatureMips5])
459     EFlags |= ELF::EF_MIPS_ARCH_5;
460   else if (Features[Mips::FeatureMips4])
461     EFlags |= ELF::EF_MIPS_ARCH_4;
462   else if (Features[Mips::FeatureMips3])
463     EFlags |= ELF::EF_MIPS_ARCH_3;
464   else if (Features[Mips::FeatureMips32r6])
465     EFlags |= ELF::EF_MIPS_ARCH_32R6;
466   else if (Features[Mips::FeatureMips32r2] ||
467            Features[Mips::FeatureMips32r3] ||
468            Features[Mips::FeatureMips32r5])
469     EFlags |= ELF::EF_MIPS_ARCH_32R2;
470   else if (Features[Mips::FeatureMips32])
471     EFlags |= ELF::EF_MIPS_ARCH_32;
472   else if (Features[Mips::FeatureMips2])
473     EFlags |= ELF::EF_MIPS_ARCH_2;
474   else
475     EFlags |= ELF::EF_MIPS_ARCH_1;
476 
477   // Other options.
478   if (Features[Mips::FeatureNaN2008])
479     EFlags |= ELF::EF_MIPS_NAN2008;
480 
481   // -mabicalls and -mplt are not implemented but we should act as if they were
482   // given.
483   EFlags |= ELF::EF_MIPS_CPIC;
484 
485   MCA.setELFHeaderEFlags(EFlags);
486 }
487 
488 void MipsTargetELFStreamer::emitLabel(MCSymbol *S) {
489   auto *Symbol = cast<MCSymbolELF>(S);
490   if (!isMicroMipsEnabled())
491     return;
492   getStreamer().getAssembler().registerSymbol(*Symbol);
493   uint8_t Type = Symbol->getType();
494   if (Type != ELF::STT_FUNC)
495     return;
496 
497   Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
498 }
499 
500 void MipsTargetELFStreamer::finish() {
501   MCAssembler &MCA = getStreamer().getAssembler();
502   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
503 
504   // .bss, .text and .data are always at least 16-byte aligned.
505   MCSection &TextSection = *OFI.getTextSection();
506   MCA.registerSection(TextSection);
507   MCSection &DataSection = *OFI.getDataSection();
508   MCA.registerSection(DataSection);
509   MCSection &BSSSection = *OFI.getBSSSection();
510   MCA.registerSection(BSSSection);
511 
512   TextSection.setAlignment(std::max(16u, TextSection.getAlignment()));
513   DataSection.setAlignment(std::max(16u, DataSection.getAlignment()));
514   BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment()));
515 
516   const FeatureBitset &Features = STI.getFeatureBits();
517 
518   // Update e_header flags. See the FIXME and comment above in
519   // the constructor for a full rundown on this.
520   unsigned EFlags = MCA.getELFHeaderEFlags();
521 
522   // ABI
523   // N64 does not require any ABI bits.
524   if (getABI().IsO32())
525     EFlags |= ELF::EF_MIPS_ABI_O32;
526   else if (getABI().IsN32())
527     EFlags |= ELF::EF_MIPS_ABI2;
528 
529   if (Features[Mips::FeatureGP64Bit]) {
530     if (getABI().IsO32())
531       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
532   } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
533     EFlags |= ELF::EF_MIPS_32BITMODE;
534 
535   // If we've set the cpic eflag and we're n64, go ahead and set the pic
536   // one as well.
537   if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
538     EFlags |= ELF::EF_MIPS_PIC;
539 
540   MCA.setELFHeaderEFlags(EFlags);
541 
542   // Emit all the option records.
543   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
544   // .reginfo.
545   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
546   MEF.EmitMipsOptionRecords();
547 
548   emitMipsAbiFlags();
549 }
550 
551 void MipsTargetELFStreamer::emitAssignment(MCSymbol *S, const MCExpr *Value) {
552   auto *Symbol = cast<MCSymbolELF>(S);
553   // If on rhs is micromips symbol then mark Symbol as microMips.
554   if (Value->getKind() != MCExpr::SymbolRef)
555     return;
556   const auto &RhsSym = cast<MCSymbolELF>(
557       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol());
558 
559   if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS))
560     return;
561 
562   Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
563 }
564 
565 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
566   return static_cast<MCELFStreamer &>(Streamer);
567 }
568 
569 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
570   MicroMipsEnabled = true;
571 
572   MCAssembler &MCA = getStreamer().getAssembler();
573   unsigned Flags = MCA.getELFHeaderEFlags();
574   Flags |= ELF::EF_MIPS_MICROMIPS;
575   MCA.setELFHeaderEFlags(Flags);
576   forbidModuleDirective();
577 }
578 
579 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
580   MicroMipsEnabled = false;
581   forbidModuleDirective();
582 }
583 
584 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
585   MCAssembler &MCA = getStreamer().getAssembler();
586   unsigned Flags = MCA.getELFHeaderEFlags();
587   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
588   MCA.setELFHeaderEFlags(Flags);
589   forbidModuleDirective();
590 }
591 
592 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
593   MCAssembler &MCA = getStreamer().getAssembler();
594   unsigned Flags = MCA.getELFHeaderEFlags();
595   Flags |= ELF::EF_MIPS_NOREORDER;
596   MCA.setELFHeaderEFlags(Flags);
597   forbidModuleDirective();
598 }
599 
600 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
601   MCAssembler &MCA = getStreamer().getAssembler();
602   MCContext &Context = MCA.getContext();
603   MCStreamer &OS = getStreamer();
604 
605   MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
606                                             ELF::SHF_ALLOC | ELF::SHT_REL);
607 
608   const MCSymbolRefExpr *ExprRef =
609       MCSymbolRefExpr::create(Name, MCSymbolRefExpr::VK_None, Context);
610 
611   MCA.registerSection(*Sec);
612   Sec->setAlignment(4);
613 
614   OS.PushSection();
615 
616   OS.SwitchSection(Sec);
617 
618   OS.EmitValueImpl(ExprRef, 4);
619 
620   OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
621   OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4);  // reg_offset
622 
623   OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
624   OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4);  // fpreg_offset
625 
626   OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
627   OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4);    // frame_reg
628   OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4);   // return_reg
629 
630   // The .end directive marks the end of a procedure. Invalidate
631   // the information gathered up until this point.
632   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
633 
634   OS.PopSection();
635 }
636 
637 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
638   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
639 }
640 
641 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
642   MCAssembler &MCA = getStreamer().getAssembler();
643   unsigned Flags = MCA.getELFHeaderEFlags();
644   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
645   MCA.setELFHeaderEFlags(Flags);
646 }
647 
648 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
649   MCAssembler &MCA = getStreamer().getAssembler();
650   unsigned Flags = MCA.getELFHeaderEFlags();
651   Flags |= ELF::EF_MIPS_NAN2008;
652   MCA.setELFHeaderEFlags(Flags);
653 }
654 
655 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
656   MCAssembler &MCA = getStreamer().getAssembler();
657   unsigned Flags = MCA.getELFHeaderEFlags();
658   Flags &= ~ELF::EF_MIPS_NAN2008;
659   MCA.setELFHeaderEFlags(Flags);
660 }
661 
662 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
663   MCAssembler &MCA = getStreamer().getAssembler();
664   unsigned Flags = MCA.getELFHeaderEFlags();
665   // This option overrides other PIC options like -KPIC.
666   Pic = false;
667   Flags &= ~ELF::EF_MIPS_PIC;
668   MCA.setELFHeaderEFlags(Flags);
669 }
670 
671 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
672   MCAssembler &MCA = getStreamer().getAssembler();
673   unsigned Flags = MCA.getELFHeaderEFlags();
674   Pic = true;
675   // NOTE: We are following the GAS behaviour here which means the directive
676   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
677   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
678   // EF_MIPS_CPIC to be mutually exclusive.
679   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
680   MCA.setELFHeaderEFlags(Flags);
681 }
682 
683 void MipsTargetELFStreamer::emitDirectiveInsn() {
684   MipsTargetStreamer::emitDirectiveInsn();
685   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
686   MEF.createPendingLabelRelocs();
687 }
688 
689 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
690                                       unsigned ReturnReg_) {
691   MCContext &Context = getStreamer().getAssembler().getContext();
692   const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
693 
694   FrameInfoSet = true;
695   FrameReg = RegInfo->getEncodingValue(StackReg);
696   FrameOffset = StackSize;
697   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
698 }
699 
700 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
701                                      int CPUTopSavedRegOff) {
702   GPRInfoSet = true;
703   GPRBitMask = CPUBitmask;
704   GPROffset = CPUTopSavedRegOff;
705 }
706 
707 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
708                                       int FPUTopSavedRegOff) {
709   FPRInfoSet = true;
710   FPRBitMask = FPUBitmask;
711   FPROffset = FPUTopSavedRegOff;
712 }
713 
714 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
715   // .cpload $reg
716   // This directive expands to:
717   // lui   $gp, %hi(_gp_disp)
718   // addui $gp, $gp, %lo(_gp_disp)
719   // addu  $gp, $gp, $reg
720   // when support for position independent code is enabled.
721   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
722     return;
723 
724   // There's a GNU extension controlled by -mno-shared that allows
725   // locally-binding symbols to be accessed using absolute addresses.
726   // This is currently not supported. When supported -mno-shared makes
727   // .cpload expand to:
728   //   lui     $gp, %hi(__gnu_local_gp)
729   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
730 
731   StringRef SymName("_gp_disp");
732   MCAssembler &MCA = getStreamer().getAssembler();
733   MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName);
734   MCA.registerSymbol(*GP_Disp);
735 
736   MCInst TmpInst;
737   TmpInst.setOpcode(Mips::LUi);
738   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
739   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::create(
740       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
741   TmpInst.addOperand(MCOperand::createExpr(HiSym));
742   getStreamer().EmitInstruction(TmpInst, STI);
743 
744   TmpInst.clear();
745 
746   TmpInst.setOpcode(Mips::ADDiu);
747   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
748   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
749   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::create(
750       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
751   TmpInst.addOperand(MCOperand::createExpr(LoSym));
752   getStreamer().EmitInstruction(TmpInst, STI);
753 
754   TmpInst.clear();
755 
756   TmpInst.setOpcode(Mips::ADDu);
757   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
758   TmpInst.addOperand(MCOperand::createReg(Mips::GP));
759   TmpInst.addOperand(MCOperand::createReg(RegNo));
760   getStreamer().EmitInstruction(TmpInst, STI);
761 
762   forbidModuleDirective();
763 }
764 
765 void MipsTargetELFStreamer::emitDirectiveCpRestore(
766     SmallVector<MCInst, 3> &StoreInsts, int Offset) {
767   MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset);
768   // .cprestore offset
769   // When PIC mode is enabled and the O32 ABI is used, this directive expands
770   // to:
771   //    sw $gp, offset($sp)
772   // and adds a corresponding LW after every JAL.
773 
774   // Note that .cprestore is ignored if used with the N32 and N64 ABIs or if it
775   // is used in non-PIC mode.
776   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
777     return;
778 
779   for (const MCInst &Inst : StoreInsts)
780     getStreamer().EmitInstruction(Inst, STI);
781 }
782 
783 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
784                                                  int RegOrOffset,
785                                                  const MCSymbol &Sym,
786                                                  bool IsReg) {
787   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
788   if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
789     return;
790 
791   MCAssembler &MCA = getStreamer().getAssembler();
792   MCInst Inst;
793 
794   // Either store the old $gp in a register or on the stack
795   if (IsReg) {
796     // move $save, $gpreg
797     Inst.setOpcode(Mips::OR64);
798     Inst.addOperand(MCOperand::createReg(RegOrOffset));
799     Inst.addOperand(MCOperand::createReg(Mips::GP));
800     Inst.addOperand(MCOperand::createReg(Mips::ZERO));
801   } else {
802     // sd $gpreg, offset($sp)
803     Inst.setOpcode(Mips::SD);
804     Inst.addOperand(MCOperand::createReg(Mips::GP));
805     Inst.addOperand(MCOperand::createReg(Mips::SP));
806     Inst.addOperand(MCOperand::createImm(RegOrOffset));
807   }
808   getStreamer().EmitInstruction(Inst, STI);
809   Inst.clear();
810 
811   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::create(
812       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
813   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::create(
814       &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
815 
816   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
817   Inst.setOpcode(Mips::LUi);
818   Inst.addOperand(MCOperand::createReg(Mips::GP));
819   Inst.addOperand(MCOperand::createExpr(HiExpr));
820   getStreamer().EmitInstruction(Inst, STI);
821   Inst.clear();
822 
823   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
824   Inst.setOpcode(Mips::ADDiu);
825   Inst.addOperand(MCOperand::createReg(Mips::GP));
826   Inst.addOperand(MCOperand::createReg(Mips::GP));
827   Inst.addOperand(MCOperand::createExpr(LoExpr));
828   getStreamer().EmitInstruction(Inst, STI);
829   Inst.clear();
830 
831   // daddu  $gp, $gp, $funcreg
832   Inst.setOpcode(Mips::DADDu);
833   Inst.addOperand(MCOperand::createReg(Mips::GP));
834   Inst.addOperand(MCOperand::createReg(Mips::GP));
835   Inst.addOperand(MCOperand::createReg(RegNo));
836   getStreamer().EmitInstruction(Inst, STI);
837 
838   forbidModuleDirective();
839 }
840 
841 void MipsTargetELFStreamer::emitMipsAbiFlags() {
842   MCAssembler &MCA = getStreamer().getAssembler();
843   MCContext &Context = MCA.getContext();
844   MCStreamer &OS = getStreamer();
845   MCSectionELF *Sec = Context.getELFSection(
846       ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
847   MCA.registerSection(*Sec);
848   Sec->setAlignment(8);
849   OS.SwitchSection(Sec);
850 
851   OS << ABIFlagsSection;
852 }
853