1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target streamer methods.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
28 
29 using namespace llvm;
30 
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32     : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
33   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
34 }
35 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
37 void MipsTargetStreamer::emitDirectiveSetMips16() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
40 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
41 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
46 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
47 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
48 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
49 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
50 void MipsTargetStreamer::emitDirectiveNaN2008() {}
51 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
52 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
53 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
54 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
55                                    unsigned ReturnReg) {}
56 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
57 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
58 }
59 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
60   forbidModuleDirective();
61 }
62 void MipsTargetStreamer::emitDirectiveSetMips0() {}
63 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
64 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
65 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetPop() {}
75 void MipsTargetStreamer::emitDirectiveSetPush() {}
76 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
79 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
80                                               const MCSymbol &Sym, bool IsReg) {
81 }
82 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
83                                                      bool IsO32ABI) {
84   if (!Enabled && !IsO32ABI)
85     report_fatal_error("+nooddspreg is only valid for O32");
86 }
87 
88 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
89                                              formatted_raw_ostream &OS)
90     : MipsTargetStreamer(S), OS(OS) {}
91 
92 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
93   OS << "\t.set\tmicromips\n";
94   forbidModuleDirective();
95 }
96 
97 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
98   OS << "\t.set\tnomicromips\n";
99   forbidModuleDirective();
100 }
101 
102 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
103   OS << "\t.set\tmips16\n";
104   forbidModuleDirective();
105 }
106 
107 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
108   OS << "\t.set\tnomips16\n";
109   MipsTargetStreamer::emitDirectiveSetNoMips16();
110 }
111 
112 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
113   OS << "\t.set\treorder\n";
114   MipsTargetStreamer::emitDirectiveSetReorder();
115 }
116 
117 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
118   OS << "\t.set\tnoreorder\n";
119   forbidModuleDirective();
120 }
121 
122 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
123   OS << "\t.set\tmacro\n";
124   MipsTargetStreamer::emitDirectiveSetMacro();
125 }
126 
127 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
128   OS << "\t.set\tnomacro\n";
129   MipsTargetStreamer::emitDirectiveSetNoMacro();
130 }
131 
132 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
133   OS << "\t.set\tmsa\n";
134   MipsTargetStreamer::emitDirectiveSetMsa();
135 }
136 
137 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
138   OS << "\t.set\tnomsa\n";
139   MipsTargetStreamer::emitDirectiveSetNoMsa();
140 }
141 
142 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
143   OS << "\t.set\tat\n";
144   MipsTargetStreamer::emitDirectiveSetAt();
145 }
146 
147 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
148   OS << "\t.set\tnoat\n";
149   MipsTargetStreamer::emitDirectiveSetNoAt();
150 }
151 
152 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
153   OS << "\t.end\t" << Name << '\n';
154 }
155 
156 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
157   OS << "\t.ent\t" << Symbol.getName() << '\n';
158 }
159 
160 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
161 
162 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
163 
164 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
165   OS << "\t.nan\tlegacy\n";
166 }
167 
168 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
169   OS << "\t.option\tpic0\n";
170 }
171 
172 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
173   OS << "\t.option\tpic2\n";
174 }
175 
176 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
177                                       unsigned ReturnReg) {
178   OS << "\t.frame\t$"
179      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
180      << StackSize << ",$"
181      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
182 }
183 
184 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
185   OS << "\t.set arch=" << Arch << "\n";
186   MipsTargetStreamer::emitDirectiveSetArch(Arch);
187 }
188 
189 void MipsTargetAsmStreamer::emitDirectiveSetMips0() { OS << "\t.set\tmips0\n"; }
190 
191 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
192   OS << "\t.set\tmips1\n";
193   MipsTargetStreamer::emitDirectiveSetMips1();
194 }
195 
196 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
197   OS << "\t.set\tmips2\n";
198   MipsTargetStreamer::emitDirectiveSetMips2();
199 }
200 
201 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
202   OS << "\t.set\tmips3\n";
203   MipsTargetStreamer::emitDirectiveSetMips3();
204 }
205 
206 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
207   OS << "\t.set\tmips4\n";
208   MipsTargetStreamer::emitDirectiveSetMips4();
209 }
210 
211 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
212   OS << "\t.set\tmips5\n";
213   MipsTargetStreamer::emitDirectiveSetMips5();
214 }
215 
216 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
217   OS << "\t.set\tmips32\n";
218   MipsTargetStreamer::emitDirectiveSetMips32();
219 }
220 
221 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
222   OS << "\t.set\tmips32r2\n";
223   MipsTargetStreamer::emitDirectiveSetMips32R2();
224 }
225 
226 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
227   OS << "\t.set\tmips32r6\n";
228   MipsTargetStreamer::emitDirectiveSetMips32R6();
229 }
230 
231 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
232   OS << "\t.set\tmips64\n";
233   MipsTargetStreamer::emitDirectiveSetMips64();
234 }
235 
236 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
237   OS << "\t.set\tmips64r2\n";
238   MipsTargetStreamer::emitDirectiveSetMips64R2();
239 }
240 
241 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
242   OS << "\t.set\tmips64r6\n";
243   MipsTargetStreamer::emitDirectiveSetMips64R6();
244 }
245 
246 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
247   OS << "\t.set\tdsp\n";
248   MipsTargetStreamer::emitDirectiveSetDsp();
249 }
250 
251 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
252   OS << "\t.set\tnodsp\n";
253   MipsTargetStreamer::emitDirectiveSetNoDsp();
254 }
255 
256 void MipsTargetAsmStreamer::emitDirectiveSetPop() { OS << "\t.set\tpop\n"; }
257 
258 void MipsTargetAsmStreamer::emitDirectiveSetPush() { OS << "\t.set\tpush\n"; }
259 
260 // Print a 32 bit hex number with all numbers.
261 static void printHex32(unsigned Value, raw_ostream &OS) {
262   OS << "0x";
263   for (int i = 7; i >= 0; i--)
264     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
265 }
266 
267 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
268                                      int CPUTopSavedRegOff) {
269   OS << "\t.mask \t";
270   printHex32(CPUBitmask, OS);
271   OS << ',' << CPUTopSavedRegOff << '\n';
272 }
273 
274 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
275                                       int FPUTopSavedRegOff) {
276   OS << "\t.fmask\t";
277   printHex32(FPUBitmask, OS);
278   OS << "," << FPUTopSavedRegOff << '\n';
279 }
280 
281 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
282   OS << "\t.cpload\t$"
283      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
284   forbidModuleDirective();
285 }
286 
287 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
288                                                  int RegOrOffset,
289                                                  const MCSymbol &Sym,
290                                                  bool IsReg) {
291   OS << "\t.cpsetup\t$"
292      << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
293 
294   if (IsReg)
295     OS << "$"
296        << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
297   else
298     OS << RegOrOffset;
299 
300   OS << ", ";
301 
302   OS << Sym.getName() << "\n";
303   forbidModuleDirective();
304 }
305 
306 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
307     MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
308   MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
309 
310   StringRef ModuleValue;
311   OS << "\t.module\tfp=";
312   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
313 }
314 
315 void MipsTargetAsmStreamer::emitDirectiveSetFp(
316     MipsABIFlagsSection::FpABIKind Value) {
317   StringRef ModuleValue;
318   OS << "\t.set\tfp=";
319   OS << ABIFlagsSection.getFpABIString(Value) << "\n";
320 }
321 
322 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
323   // No action required for text output.
324 }
325 
326 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
327                                                         bool IsO32ABI) {
328   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
329 
330   OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
331 }
332 
333 // This part is for ELF object output.
334 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
335                                              const MCSubtargetInfo &STI)
336     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
337   MCAssembler &MCA = getStreamer().getAssembler();
338   Triple T(STI.getTargetTriple());
339   Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
340             ? true
341             : false;
342 
343   uint64_t Features = STI.getFeatureBits();
344 
345   // Set the header flags that we can in the constructor.
346   // FIXME: This is a fairly terrible hack. We set the rest
347   // of these in the destructor. The problem here is two-fold:
348   //
349   // a: Some of the eflags can be set/reset by directives.
350   // b: There aren't any usage paths that initialize the ABI
351   //    pointer until after we initialize either an assembler
352   //    or the target machine.
353   // We can fix this by making the target streamer construct
354   // the ABI, but this is fraught with wide ranging dependency
355   // issues as well.
356   unsigned EFlags = MCA.getELFHeaderEFlags();
357 
358   // Architecture
359   if (Features & Mips::FeatureMips64r6)
360     EFlags |= ELF::EF_MIPS_ARCH_64R6;
361   else if (Features & Mips::FeatureMips64r2)
362     EFlags |= ELF::EF_MIPS_ARCH_64R2;
363   else if (Features & Mips::FeatureMips64)
364     EFlags |= ELF::EF_MIPS_ARCH_64;
365   else if (Features & Mips::FeatureMips5)
366     EFlags |= ELF::EF_MIPS_ARCH_5;
367   else if (Features & Mips::FeatureMips4)
368     EFlags |= ELF::EF_MIPS_ARCH_4;
369   else if (Features & Mips::FeatureMips3)
370     EFlags |= ELF::EF_MIPS_ARCH_3;
371   else if (Features & Mips::FeatureMips32r6)
372     EFlags |= ELF::EF_MIPS_ARCH_32R6;
373   else if (Features & Mips::FeatureMips32r2)
374     EFlags |= ELF::EF_MIPS_ARCH_32R2;
375   else if (Features & Mips::FeatureMips32)
376     EFlags |= ELF::EF_MIPS_ARCH_32;
377   else if (Features & Mips::FeatureMips2)
378     EFlags |= ELF::EF_MIPS_ARCH_2;
379   else
380     EFlags |= ELF::EF_MIPS_ARCH_1;
381 
382   // Other options.
383   if (Features & Mips::FeatureNaN2008)
384     EFlags |= ELF::EF_MIPS_NAN2008;
385 
386   // -mabicalls and -mplt are not implemented but we should act as if they were
387   // given.
388   EFlags |= ELF::EF_MIPS_CPIC;
389 
390   MCA.setELFHeaderEFlags(EFlags);
391 }
392 
393 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
394   if (!isMicroMipsEnabled())
395     return;
396   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
397   uint8_t Type = MCELF::GetType(Data);
398   if (Type != ELF::STT_FUNC)
399     return;
400 
401   // The "other" values are stored in the last 6 bits of the second byte
402   // The traditional defines for STO values assume the full byte and thus
403   // the shift to pack it.
404   MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
405 }
406 
407 void MipsTargetELFStreamer::finish() {
408   MCAssembler &MCA = getStreamer().getAssembler();
409   const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
410 
411   // .bss, .text and .data are always at least 16-byte aligned.
412   MCSectionData &TextSectionData =
413       MCA.getOrCreateSectionData(*OFI.getTextSection());
414   MCSectionData &DataSectionData =
415       MCA.getOrCreateSectionData(*OFI.getDataSection());
416   MCSectionData &BSSSectionData =
417       MCA.getOrCreateSectionData(*OFI.getBSSSection());
418 
419   TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
420   DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
421   BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
422 
423   uint64_t Features = STI.getFeatureBits();
424 
425   // Update e_header flags. See the FIXME and comment above in
426   // the constructor for a full rundown on this.
427   unsigned EFlags = MCA.getELFHeaderEFlags();
428 
429   // ABI
430   // N64 does not require any ABI bits.
431   if (getABI().IsO32())
432     EFlags |= ELF::EF_MIPS_ABI_O32;
433   else if (getABI().IsN32())
434     EFlags |= ELF::EF_MIPS_ABI2;
435 
436   if (Features & Mips::FeatureGP64Bit) {
437     if (getABI().IsO32())
438       EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
439   } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
440     EFlags |= ELF::EF_MIPS_32BITMODE;
441 
442   // If we've set the cpic eflag and we're n64, go ahead and set the pic
443   // one as well.
444   if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
445     EFlags |= ELF::EF_MIPS_PIC;
446 
447   MCA.setELFHeaderEFlags(EFlags);
448 
449   // Emit all the option records.
450   // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
451   // .reginfo.
452   MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
453   MEF.EmitMipsOptionRecords();
454 
455   emitMipsAbiFlags();
456 }
457 
458 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
459                                            const MCExpr *Value) {
460   // If on rhs is micromips symbol then mark Symbol as microMips.
461   if (Value->getKind() != MCExpr::SymbolRef)
462     return;
463   const MCSymbol &RhsSym =
464       static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
465   MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
466   uint8_t Type = MCELF::GetType(Data);
467   if ((Type != ELF::STT_FUNC) ||
468       !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
469     return;
470 
471   MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
472   // The "other" values are stored in the last 6 bits of the second byte.
473   // The traditional defines for STO values assume the full byte and thus
474   // the shift to pack it.
475   MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
476 }
477 
478 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
479   return static_cast<MCELFStreamer &>(Streamer);
480 }
481 
482 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
483   MicroMipsEnabled = true;
484 
485   MCAssembler &MCA = getStreamer().getAssembler();
486   unsigned Flags = MCA.getELFHeaderEFlags();
487   Flags |= ELF::EF_MIPS_MICROMIPS;
488   MCA.setELFHeaderEFlags(Flags);
489   forbidModuleDirective();
490 }
491 
492 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
493   MicroMipsEnabled = false;
494   forbidModuleDirective();
495 }
496 
497 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
498   MCAssembler &MCA = getStreamer().getAssembler();
499   unsigned Flags = MCA.getELFHeaderEFlags();
500   Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
501   MCA.setELFHeaderEFlags(Flags);
502   forbidModuleDirective();
503 }
504 
505 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
506   MCAssembler &MCA = getStreamer().getAssembler();
507   unsigned Flags = MCA.getELFHeaderEFlags();
508   Flags |= ELF::EF_MIPS_NOREORDER;
509   MCA.setELFHeaderEFlags(Flags);
510   forbidModuleDirective();
511 }
512 
513 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
514   MCAssembler &MCA = getStreamer().getAssembler();
515   MCContext &Context = MCA.getContext();
516   MCStreamer &OS = getStreamer();
517 
518   const MCSectionELF *Sec = Context.getELFSection(
519       ".pdr", ELF::SHT_PROGBITS, ELF::SHF_ALLOC | ELF::SHT_REL);
520 
521   const MCSymbolRefExpr *ExprRef =
522       MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
523 
524   MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
525   SecData.setAlignment(4);
526 
527   OS.PushSection();
528 
529   OS.SwitchSection(Sec);
530 
531   OS.EmitValueImpl(ExprRef, 4);
532 
533   OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
534   OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4);  // reg_offset
535 
536   OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
537   OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4);  // fpreg_offset
538 
539   OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
540   OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4);    // frame_reg
541   OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4);   // return_reg
542 
543   // The .end directive marks the end of a procedure. Invalidate
544   // the information gathered up until this point.
545   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
546 
547   OS.PopSection();
548 }
549 
550 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
551   GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
552 }
553 
554 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
555   MCAssembler &MCA = getStreamer().getAssembler();
556   unsigned Flags = MCA.getELFHeaderEFlags();
557   Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
558   MCA.setELFHeaderEFlags(Flags);
559 }
560 
561 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
562   MCAssembler &MCA = getStreamer().getAssembler();
563   unsigned Flags = MCA.getELFHeaderEFlags();
564   Flags |= ELF::EF_MIPS_NAN2008;
565   MCA.setELFHeaderEFlags(Flags);
566 }
567 
568 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
569   MCAssembler &MCA = getStreamer().getAssembler();
570   unsigned Flags = MCA.getELFHeaderEFlags();
571   Flags &= ~ELF::EF_MIPS_NAN2008;
572   MCA.setELFHeaderEFlags(Flags);
573 }
574 
575 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
576   MCAssembler &MCA = getStreamer().getAssembler();
577   unsigned Flags = MCA.getELFHeaderEFlags();
578   // This option overrides other PIC options like -KPIC.
579   Pic = false;
580   Flags &= ~ELF::EF_MIPS_PIC;
581   MCA.setELFHeaderEFlags(Flags);
582 }
583 
584 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
585   MCAssembler &MCA = getStreamer().getAssembler();
586   unsigned Flags = MCA.getELFHeaderEFlags();
587   Pic = true;
588   // NOTE: We are following the GAS behaviour here which means the directive
589   // 'pic2' also sets the CPIC bit in the ELF header. This is different from
590   // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
591   // EF_MIPS_CPIC to be mutually exclusive.
592   Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
593   MCA.setELFHeaderEFlags(Flags);
594 }
595 
596 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
597                                       unsigned ReturnReg_) {
598   MCContext &Context = getStreamer().getAssembler().getContext();
599   const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
600 
601   FrameInfoSet = true;
602   FrameReg = RegInfo->getEncodingValue(StackReg);
603   FrameOffset = StackSize;
604   ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
605 }
606 
607 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
608                                      int CPUTopSavedRegOff) {
609   GPRInfoSet = true;
610   GPRBitMask = CPUBitmask;
611   GPROffset = CPUTopSavedRegOff;
612 }
613 
614 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
615                                       int FPUTopSavedRegOff) {
616   FPRInfoSet = true;
617   FPRBitMask = FPUBitmask;
618   FPROffset = FPUTopSavedRegOff;
619 }
620 
621 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
622   // .cpload $reg
623   // This directive expands to:
624   // lui   $gp, %hi(_gp_disp)
625   // addui $gp, $gp, %lo(_gp_disp)
626   // addu  $gp, $gp, $reg
627   // when support for position independent code is enabled.
628   if (!Pic || (getABI().IsN32() || getABI().IsN64()))
629     return;
630 
631   // There's a GNU extension controlled by -mno-shared that allows
632   // locally-binding symbols to be accessed using absolute addresses.
633   // This is currently not supported. When supported -mno-shared makes
634   // .cpload expand to:
635   //   lui     $gp, %hi(__gnu_local_gp)
636   //   addiu   $gp, $gp, %lo(__gnu_local_gp)
637 
638   StringRef SymName("_gp_disp");
639   MCAssembler &MCA = getStreamer().getAssembler();
640   MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
641   MCA.getOrCreateSymbolData(*GP_Disp);
642 
643   MCInst TmpInst;
644   TmpInst.setOpcode(Mips::LUi);
645   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
646   const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
647       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
648   TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
649   getStreamer().EmitInstruction(TmpInst, STI);
650 
651   TmpInst.clear();
652 
653   TmpInst.setOpcode(Mips::ADDiu);
654   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
655   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
656   const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
657       "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
658   TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
659   getStreamer().EmitInstruction(TmpInst, STI);
660 
661   TmpInst.clear();
662 
663   TmpInst.setOpcode(Mips::ADDu);
664   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
665   TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
666   TmpInst.addOperand(MCOperand::CreateReg(RegNo));
667   getStreamer().EmitInstruction(TmpInst, STI);
668 
669   forbidModuleDirective();
670 }
671 
672 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
673                                                  int RegOrOffset,
674                                                  const MCSymbol &Sym,
675                                                  bool IsReg) {
676   // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
677   if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
678     return;
679 
680   MCAssembler &MCA = getStreamer().getAssembler();
681   MCInst Inst;
682 
683   // Either store the old $gp in a register or on the stack
684   if (IsReg) {
685     // move $save, $gpreg
686     Inst.setOpcode(Mips::DADDu);
687     Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
688     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
689     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
690   } else {
691     // sd $gpreg, offset($sp)
692     Inst.setOpcode(Mips::SD);
693     Inst.addOperand(MCOperand::CreateReg(Mips::GP));
694     Inst.addOperand(MCOperand::CreateReg(Mips::SP));
695     Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
696   }
697   getStreamer().EmitInstruction(Inst, STI);
698   Inst.clear();
699 
700   const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
701       Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
702   const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
703       Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
704   // lui $gp, %hi(%neg(%gp_rel(funcSym)))
705   Inst.setOpcode(Mips::LUi);
706   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
707   Inst.addOperand(MCOperand::CreateExpr(HiExpr));
708   getStreamer().EmitInstruction(Inst, STI);
709   Inst.clear();
710 
711   // addiu  $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
712   Inst.setOpcode(Mips::ADDiu);
713   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
714   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
715   Inst.addOperand(MCOperand::CreateExpr(LoExpr));
716   getStreamer().EmitInstruction(Inst, STI);
717   Inst.clear();
718 
719   // daddu  $gp, $gp, $funcreg
720   Inst.setOpcode(Mips::DADDu);
721   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
722   Inst.addOperand(MCOperand::CreateReg(Mips::GP));
723   Inst.addOperand(MCOperand::CreateReg(RegNo));
724   getStreamer().EmitInstruction(Inst, STI);
725 
726   forbidModuleDirective();
727 }
728 
729 void MipsTargetELFStreamer::emitMipsAbiFlags() {
730   MCAssembler &MCA = getStreamer().getAssembler();
731   MCContext &Context = MCA.getContext();
732   MCStreamer &OS = getStreamer();
733   const MCSectionELF *Sec = Context.getELFSection(
734       ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
735   MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
736   ABIShndxSD.setAlignment(8);
737   OS.SwitchSection(Sec);
738 
739   OS << ABIFlagsSection;
740 }
741 
742 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
743                                                         bool IsO32ABI) {
744   MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
745 
746   ABIFlagsSection.OddSPReg = Enabled;
747 }
748