1 //===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the ARMTargetStreamer class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/MC/ConstantPools.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCStreamer.h"
17 
18 using namespace llvm;
19 
20 //
21 // ARMTargetStreamer Implemenation
22 //
23 
24 ARMTargetStreamer::ARMTargetStreamer(MCStreamer &S)
25     : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
26 
27 ARMTargetStreamer::~ARMTargetStreamer() = default;
28 
29 // The constant pool handling is shared by all ARMTargetStreamer
30 // implementations.
31 const MCExpr *ARMTargetStreamer::addConstantPoolEntry(const MCExpr *Expr, SMLoc Loc) {
32   return ConstantPools->addEntry(Streamer, Expr, 4, Loc);
33 }
34 
35 void ARMTargetStreamer::emitCurrentConstantPool() {
36   ConstantPools->emitForCurrentSection(Streamer);
37 }
38 
39 // finish() - write out any non-empty assembler constant pools.
40 void ARMTargetStreamer::finish() { ConstantPools->emitAll(Streamer); }
41 
42 // reset() - Reset any state
43 void ARMTargetStreamer::reset() {}
44 
45 // The remaining callbacks should be handled separately by each
46 // streamer.
47 void ARMTargetStreamer::emitFnStart() {}
48 void ARMTargetStreamer::emitFnEnd() {}
49 void ARMTargetStreamer::emitCantUnwind() {}
50 void ARMTargetStreamer::emitPersonality(const MCSymbol *Personality) {}
51 void ARMTargetStreamer::emitPersonalityIndex(unsigned Index) {}
52 void ARMTargetStreamer::emitHandlerData() {}
53 void ARMTargetStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
54                                   int64_t Offset) {}
55 void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
56 void ARMTargetStreamer::emitPad(int64_t Offset) {}
57 void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList,
58                                     bool isVector) {}
59 void ARMTargetStreamer::emitUnwindRaw(int64_t StackOffset,
60                                       const SmallVectorImpl<uint8_t> &Opcodes) {
61 }
62 void ARMTargetStreamer::switchVendor(StringRef Vendor) {}
63 void ARMTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {}
64 void ARMTargetStreamer::emitTextAttribute(unsigned Attribute,
65                                           StringRef String) {}
66 void ARMTargetStreamer::emitIntTextAttribute(unsigned Attribute,
67                                              unsigned IntValue,
68                                              StringRef StringValue) {}
69 void ARMTargetStreamer::emitArch(unsigned Arch) {}
70 void ARMTargetStreamer::emitArchExtension(unsigned ArchExt) {}
71 void ARMTargetStreamer::emitObjectArch(unsigned Arch) {}
72 void ARMTargetStreamer::emitFPU(unsigned FPU) {}
73 void ARMTargetStreamer::finishAttributeSection() {}
74 void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}
75 void
76 ARMTargetStreamer::AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE) {}
77 void ARMTargetStreamer::emitThumbSet(MCSymbol *Symbol, const MCExpr *Value) {}
78