1 //===-- AArch64TargetMachine.cpp - Define TargetMachine for AArch64 -------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the implementation of the AArch64TargetMachine 11 // methods. Principally just setting up the passes needed to generate correct 12 // code on this architecture. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "AArch64.h" 17 #include "AArch64TargetMachine.h" 18 #include "MCTargetDesc/AArch64MCTargetDesc.h" 19 #include "llvm/CodeGen/Passes.h" 20 #include "llvm/PassManager.h" 21 #include "llvm/Support/TargetRegistry.h" 22 #include "llvm/Transforms/Scalar.h" 23 24 using namespace llvm; 25 26 extern "C" void LLVMInitializeAArch64Target() { 27 RegisterTargetMachine<AArch64leTargetMachine> X(TheAArch64leTarget); 28 RegisterTargetMachine<AArch64beTargetMachine> Y(TheAArch64beTarget); 29 } 30 31 AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT, 32 StringRef CPU, StringRef FS, 33 const TargetOptions &Options, 34 Reloc::Model RM, CodeModel::Model CM, 35 CodeGenOpt::Level OL, 36 bool LittleEndian) 37 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 38 Subtarget(TT, CPU, FS, LittleEndian), 39 InstrInfo(Subtarget), 40 DL(LittleEndian ? 41 "e-m:e-i64:64-i128:128-n32:64-S128" : 42 "E-m:e-i64:64-i128:128-n32:64-S128"), 43 TLInfo(*this), 44 TSInfo(*this), 45 FrameLowering(Subtarget) { 46 initAsmInfo(); 47 } 48 49 void AArch64leTargetMachine::anchor() { } 50 51 AArch64leTargetMachine:: 52 AArch64leTargetMachine(const Target &T, StringRef TT, 53 StringRef CPU, StringRef FS, const TargetOptions &Options, 54 Reloc::Model RM, CodeModel::Model CM, 55 CodeGenOpt::Level OL) 56 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} 57 58 void AArch64beTargetMachine::anchor() { } 59 60 AArch64beTargetMachine:: 61 AArch64beTargetMachine(const Target &T, StringRef TT, 62 StringRef CPU, StringRef FS, const TargetOptions &Options, 63 Reloc::Model RM, CodeModel::Model CM, 64 CodeGenOpt::Level OL) 65 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} 66 67 void AArch64TargetMachine::addAnalysisPasses(PassManagerBase &PM) { 68 // Add first the target-independent BasicTTI pass, then our AArch64 pass. This 69 // allows the AArch64 pass to delegate to the target independent layer when 70 // appropriate. 71 PM.add(createBasicTargetTransformInfoPass(this)); 72 PM.add(createAArch64TargetTransformInfoPass(this)); 73 } 74 75 namespace { 76 /// AArch64 Code Generator Pass Configuration Options. 77 class AArch64PassConfig : public TargetPassConfig { 78 public: 79 AArch64PassConfig(AArch64TargetMachine *TM, PassManagerBase &PM) 80 : TargetPassConfig(TM, PM) {} 81 82 AArch64TargetMachine &getAArch64TargetMachine() const { 83 return getTM<AArch64TargetMachine>(); 84 } 85 86 const AArch64Subtarget &getAArch64Subtarget() const { 87 return *getAArch64TargetMachine().getSubtargetImpl(); 88 } 89 90 bool addPreISel() override; 91 bool addInstSelector() override; 92 bool addPreEmitPass() override; 93 }; 94 } // namespace 95 96 bool AArch64PassConfig::addPreISel() { 97 if (TM->getOptLevel() != CodeGenOpt::None) 98 addPass(createGlobalMergePass(TM)); 99 100 return false; 101 } 102 103 TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) { 104 return new AArch64PassConfig(this, PM); 105 } 106 107 bool AArch64PassConfig::addPreEmitPass() { 108 addPass(&UnpackMachineBundlesID); 109 addPass(createAArch64BranchFixupPass()); 110 return true; 111 } 112 113 bool AArch64PassConfig::addInstSelector() { 114 addPass(createAArch64ISelDAG(getAArch64TargetMachine(), getOptLevel())); 115 116 // For ELF, cleanup any local-dynamic TLS accesses. 117 if (getAArch64Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None) 118 addPass(createAArch64CleanupLocalDynamicTLSPass()); 119 120 return false; 121 } 122