1 //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information --------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the AArch64 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AArch64Subtarget.h"
15 #include "AArch64RegisterInfo.h"
16 #include "MCTargetDesc/AArch64MCTargetDesc.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/IR/GlobalValue.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Target/TargetSubtargetInfo.h"
21 
22 #define GET_SUBTARGETINFO_TARGET_DESC
23 #define GET_SUBTARGETINFO_CTOR
24 #include "AArch64GenSubtargetInfo.inc"
25 
26 using namespace llvm;
27 
28 enum AlignMode {
29   DefaultAlign,
30   StrictAlign,
31   NoStrictAlign
32 };
33 
34 static cl::opt<AlignMode>
35 Align(cl::desc("Load/store alignment support"),
36       cl::Hidden, cl::init(DefaultAlign),
37       cl::values(
38           clEnumValN(DefaultAlign,  "aarch64-default-align",
39                      "Generate unaligned accesses only on hardware/OS "
40                      "combinations that are known to support them"),
41           clEnumValN(StrictAlign,   "aarch64-strict-align",
42                      "Disallow all unaligned memory accesses"),
43           clEnumValN(NoStrictAlign, "aarch64-no-strict-align",
44                      "Allow unaligned memory accesses"),
45           clEnumValEnd));
46 
47 // Pin the vtable to this file.
48 void AArch64Subtarget::anchor() {}
49 
50 AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS,
51                                    bool LittleEndian)
52     : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
53       HasFPARMv8(false), HasNEON(false), HasCrypto(false), TargetTriple(TT),
54       CPUString(CPU), IsLittleEndian(LittleEndian) {
55 
56   initializeSubtargetFeatures(CPU, FS);
57 }
58 
59 void AArch64Subtarget::initializeSubtargetFeatures(StringRef CPU,
60                                                    StringRef FS) {
61   AllowsUnalignedMem = false;
62 
63   if (CPU.empty())
64     CPUString = "generic";
65 
66   std::string FullFS = FS;
67   if (CPUString == "generic") {
68     // Enable FP by default.
69     if (FullFS.empty())
70       FullFS = "+fp-armv8";
71     else
72       FullFS = "+fp-armv8," + FullFS;
73   }
74 
75   ParseSubtargetFeatures(CPU, FullFS);
76 
77   switch (Align) {
78     case DefaultAlign:
79       // Linux targets support unaligned accesses on AARCH64
80       AllowsUnalignedMem = isTargetLinux();
81       break;
82     case StrictAlign:
83       AllowsUnalignedMem = false;
84       break;
85     case NoStrictAlign:
86       AllowsUnalignedMem = true;
87       break;
88   }
89 }
90 
91 bool AArch64Subtarget::GVIsIndirectSymbol(const GlobalValue *GV,
92                                           Reloc::Model RelocM) const {
93   if (RelocM == Reloc::Static)
94     return false;
95 
96   return !GV->hasLocalLinkage() && !GV->hasHiddenVisibility();
97 }
98