1 //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the AArch64 specific subclass of TargetSubtarget.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AArch64InstrInfo.h"
15 #include "AArch64PBQPRegAlloc.h"
16 #include "AArch64Subtarget.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/CodeGen/MachineScheduler.h"
19 #include "llvm/IR/GlobalValue.h"
20 #include "llvm/Support/TargetRegistry.h"
21 
22 using namespace llvm;
23 
24 #define DEBUG_TYPE "aarch64-subtarget"
25 
26 #define GET_SUBTARGETINFO_CTOR
27 #define GET_SUBTARGETINFO_TARGET_DESC
28 #include "AArch64GenSubtargetInfo.inc"
29 
30 static cl::opt<bool>
31 EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
32                      "converter pass"), cl::init(true), cl::Hidden);
33 
34 AArch64Subtarget &
35 AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
36   // Determine default and user-specified characteristics
37 
38   if (CPUString.empty())
39     CPUString = "generic";
40 
41   ParseSubtargetFeatures(CPUString, FS);
42   return *this;
43 }
44 
45 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
46                                    const std::string &CPU,
47                                    const std::string &FS,
48                                    const TargetMachine &TM, bool LittleEndian)
49     : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
50       HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
51       HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
52       TargetTriple(TT),
53       // This nested ternary is horrible, but DL needs to be properly
54       // initialized
55       // before TLInfo is constructed.
56       DL(isTargetMachO()
57              ? "e-m:o-i64:64-i128:128-n32:64-S128"
58              : (LittleEndian ? "e-m:e-i64:64-i128:128-n32:64-S128"
59                              : "E-m:e-i64:64-i128:128-n32:64-S128")),
60       FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS)),
61       TSInfo(&DL), TLInfo(TM) {}
62 
63 /// ClassifyGlobalReference - Find the target operand flags that describe
64 /// how a global value should be referenced for the current subtarget.
65 unsigned char
66 AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
67                                         const TargetMachine &TM) const {
68 
69   // Determine whether this is a reference to a definition or a declaration.
70   // Materializable GVs (in JIT lazy compilation mode) do not require an extra
71   // load from stub.
72   bool isDecl = GV->hasAvailableExternallyLinkage();
73   if (GV->isDeclaration() && !GV->isMaterializable())
74     isDecl = true;
75 
76   // MachO large model always goes via a GOT, simply to get a single 8-byte
77   // absolute relocation on all global addresses.
78   if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
79     return AArch64II::MO_GOT;
80 
81   // The small code mode's direct accesses use ADRP, which cannot necessarily
82   // produce the value 0 (if the code is above 4GB).
83   if (TM.getCodeModel() == CodeModel::Small &&
84       GV->isWeakForLinker() && isDecl) {
85     // In PIC mode use the GOT, but in absolute mode use a constant pool load.
86     if (TM.getRelocationModel() == Reloc::Static)
87         return AArch64II::MO_CONSTPOOL;
88     else
89         return AArch64II::MO_GOT;
90   }
91 
92   // If symbol visibility is hidden, the extra load is not needed if
93   // the symbol is definitely defined in the current translation unit.
94 
95   // The handling of non-hidden symbols in PIC mode is rather target-dependent:
96   //   + On MachO, if the symbol is defined in this module the GOT can be
97   //     skipped.
98   //   + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
99   //     defined could end up in unexpected places. Use a GOT.
100   if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
101     if (isTargetMachO())
102       return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
103                                                : AArch64II::MO_NO_FLAG;
104     else
105       // No need to go through the GOT for local symbols on ELF.
106       return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
107   }
108 
109   return AArch64II::MO_NO_FLAG;
110 }
111 
112 /// This function returns the name of a function which has an interface
113 /// like the non-standard bzero function, if such a function exists on
114 /// the current subtarget and it is considered prefereable over
115 /// memset with zero passed as the second argument. Otherwise it
116 /// returns null.
117 const char *AArch64Subtarget::getBZeroEntry() const {
118   // Prefer bzero on Darwin only.
119   if(isTargetDarwin())
120     return "bzero";
121 
122   return nullptr;
123 }
124 
125 void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
126                                          MachineInstr *begin, MachineInstr *end,
127                                          unsigned NumRegionInstrs) const {
128   // LNT run (at least on Cyclone) showed reasonably significant gains for
129   // bi-directional scheduling. 253.perlbmk.
130   Policy.OnlyTopDown = false;
131   Policy.OnlyBottomUp = false;
132 }
133 
134 bool AArch64Subtarget::enableEarlyIfConversion() const {
135   return EnableEarlyIfConvert;
136 }
137 
138 std::unique_ptr<PBQPRAConstraint>
139 AArch64Subtarget::getCustomPBQPConstraints() const {
140   if (!isCortexA57())
141     return nullptr;
142 
143   return llvm::make_unique<A57ChainingConstraint>();
144 }
145