1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/ADT/APFloat.h"
14 #include "llvm/ADT/APInt.h"
15 #include "llvm/ADT/None.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/CodeGen/ISDOpcodes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/SelectionDAG.h"
23 #include "llvm/CodeGen/SelectionDAGNodes.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetLowering.h"
26 #include "llvm/CodeGen/TargetRegisterInfo.h"
27 #include "llvm/CodeGen/TargetSubtargetInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/ModuleSlotTracker.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/MachineValueType.h"
44 #include "llvm/Support/Printable.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "SDNodeDbgValue.h"
49 #include <cstdint>
50 #include <iterator>
51 
52 using namespace llvm;
53 
54 static cl::opt<bool>
55 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
56                   cl::desc("Display more information when dumping selection "
57                            "DAG nodes."));
58 
59 std::string SDNode::getOperationName(const SelectionDAG *G) const {
60   switch (getOpcode()) {
61   default:
62     if (getOpcode() < ISD::BUILTIN_OP_END)
63       return "<<Unknown DAG Node>>";
64     if (isMachineOpcode()) {
65       if (G)
66         if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
67           if (getMachineOpcode() < TII->getNumOpcodes())
68             return std::string(TII->getName(getMachineOpcode()));
69       return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
70     }
71     if (G) {
72       const TargetLowering &TLI = G->getTargetLoweringInfo();
73       const char *Name = TLI.getTargetNodeName(getOpcode());
74       if (Name) return Name;
75       return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
76     }
77     return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
78 
79 #ifndef NDEBUG
80   case ISD::DELETED_NODE:               return "<<Deleted Node!>>";
81 #endif
82   case ISD::PREFETCH:                   return "Prefetch";
83   case ISD::ATOMIC_FENCE:               return "AtomicFence";
84   case ISD::ATOMIC_CMP_SWAP:            return "AtomicCmpSwap";
85   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86   case ISD::ATOMIC_SWAP:                return "AtomicSwap";
87   case ISD::ATOMIC_LOAD_ADD:            return "AtomicLoadAdd";
88   case ISD::ATOMIC_LOAD_SUB:            return "AtomicLoadSub";
89   case ISD::ATOMIC_LOAD_AND:            return "AtomicLoadAnd";
90   case ISD::ATOMIC_LOAD_CLR:            return "AtomicLoadClr";
91   case ISD::ATOMIC_LOAD_OR:             return "AtomicLoadOr";
92   case ISD::ATOMIC_LOAD_XOR:            return "AtomicLoadXor";
93   case ISD::ATOMIC_LOAD_NAND:           return "AtomicLoadNand";
94   case ISD::ATOMIC_LOAD_MIN:            return "AtomicLoadMin";
95   case ISD::ATOMIC_LOAD_MAX:            return "AtomicLoadMax";
96   case ISD::ATOMIC_LOAD_UMIN:           return "AtomicLoadUMin";
97   case ISD::ATOMIC_LOAD_UMAX:           return "AtomicLoadUMax";
98   case ISD::ATOMIC_LOAD_FADD:           return "AtomicLoadFAdd";
99   case ISD::ATOMIC_LOAD:                return "AtomicLoad";
100   case ISD::ATOMIC_STORE:               return "AtomicStore";
101   case ISD::PCMARKER:                   return "PCMarker";
102   case ISD::READCYCLECOUNTER:           return "ReadCycleCounter";
103   case ISD::SRCVALUE:                   return "SrcValue";
104   case ISD::MDNODE_SDNODE:              return "MDNode";
105   case ISD::EntryToken:                 return "EntryToken";
106   case ISD::TokenFactor:                return "TokenFactor";
107   case ISD::AssertSext:                 return "AssertSext";
108   case ISD::AssertZext:                 return "AssertZext";
109   case ISD::AssertAlign:                return "AssertAlign";
110 
111   case ISD::BasicBlock:                 return "BasicBlock";
112   case ISD::VALUETYPE:                  return "ValueType";
113   case ISD::Register:                   return "Register";
114   case ISD::RegisterMask:               return "RegisterMask";
115   case ISD::Constant:
116     if (cast<ConstantSDNode>(this)->isOpaque())
117       return "OpaqueConstant";
118     return "Constant";
119   case ISD::ConstantFP:                 return "ConstantFP";
120   case ISD::GlobalAddress:              return "GlobalAddress";
121   case ISD::GlobalTLSAddress:           return "GlobalTLSAddress";
122   case ISD::FrameIndex:                 return "FrameIndex";
123   case ISD::JumpTable:                  return "JumpTable";
124   case ISD::GLOBAL_OFFSET_TABLE:        return "GLOBAL_OFFSET_TABLE";
125   case ISD::RETURNADDR:                 return "RETURNADDR";
126   case ISD::ADDROFRETURNADDR:           return "ADDROFRETURNADDR";
127   case ISD::FRAMEADDR:                  return "FRAMEADDR";
128   case ISD::SPONENTRY:                  return "SPONENTRY";
129   case ISD::LOCAL_RECOVER:              return "LOCAL_RECOVER";
130   case ISD::READ_REGISTER:              return "READ_REGISTER";
131   case ISD::WRITE_REGISTER:             return "WRITE_REGISTER";
132   case ISD::FRAME_TO_ARGS_OFFSET:       return "FRAME_TO_ARGS_OFFSET";
133   case ISD::EH_DWARF_CFA:               return "EH_DWARF_CFA";
134   case ISD::EH_RETURN:                  return "EH_RETURN";
135   case ISD::EH_SJLJ_SETJMP:             return "EH_SJLJ_SETJMP";
136   case ISD::EH_SJLJ_LONGJMP:            return "EH_SJLJ_LONGJMP";
137   case ISD::EH_SJLJ_SETUP_DISPATCH:     return "EH_SJLJ_SETUP_DISPATCH";
138   case ISD::ConstantPool:               return "ConstantPool";
139   case ISD::TargetIndex:                return "TargetIndex";
140   case ISD::ExternalSymbol:             return "ExternalSymbol";
141   case ISD::BlockAddress:               return "BlockAddress";
142   case ISD::INTRINSIC_WO_CHAIN:
143   case ISD::INTRINSIC_VOID:
144   case ISD::INTRINSIC_W_CHAIN: {
145     unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
146     unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
147     if (IID < Intrinsic::num_intrinsics)
148       return Intrinsic::getName((Intrinsic::ID)IID, None);
149     else if (!G)
150       return "Unknown intrinsic";
151     else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
152       return TII->getName(IID);
153     llvm_unreachable("Invalid intrinsic ID");
154   }
155 
156   case ISD::BUILD_VECTOR:               return "BUILD_VECTOR";
157   case ISD::TargetConstant:
158     if (cast<ConstantSDNode>(this)->isOpaque())
159       return "OpaqueTargetConstant";
160     return "TargetConstant";
161   case ISD::TargetConstantFP:           return "TargetConstantFP";
162   case ISD::TargetGlobalAddress:        return "TargetGlobalAddress";
163   case ISD::TargetGlobalTLSAddress:     return "TargetGlobalTLSAddress";
164   case ISD::TargetFrameIndex:           return "TargetFrameIndex";
165   case ISD::TargetJumpTable:            return "TargetJumpTable";
166   case ISD::TargetConstantPool:         return "TargetConstantPool";
167   case ISD::TargetExternalSymbol:       return "TargetExternalSymbol";
168   case ISD::MCSymbol:                   return "MCSymbol";
169   case ISD::TargetBlockAddress:         return "TargetBlockAddress";
170 
171   case ISD::CopyToReg:                  return "CopyToReg";
172   case ISD::CopyFromReg:                return "CopyFromReg";
173   case ISD::UNDEF:                      return "undef";
174   case ISD::VSCALE:                     return "vscale";
175   case ISD::MERGE_VALUES:               return "merge_values";
176   case ISD::INLINEASM:                  return "inlineasm";
177   case ISD::INLINEASM_BR:               return "inlineasm_br";
178   case ISD::EH_LABEL:                   return "eh_label";
179   case ISD::ANNOTATION_LABEL:           return "annotation_label";
180   case ISD::HANDLENODE:                 return "handlenode";
181 
182   // Unary operators
183   case ISD::FABS:                       return "fabs";
184   case ISD::FMINNUM:                    return "fminnum";
185   case ISD::STRICT_FMINNUM:             return "strict_fminnum";
186   case ISD::FMAXNUM:                    return "fmaxnum";
187   case ISD::STRICT_FMAXNUM:             return "strict_fmaxnum";
188   case ISD::FMINNUM_IEEE:               return "fminnum_ieee";
189   case ISD::FMAXNUM_IEEE:               return "fmaxnum_ieee";
190   case ISD::FMINIMUM:                   return "fminimum";
191   case ISD::STRICT_FMINIMUM:            return "strict_fminimum";
192   case ISD::FMAXIMUM:                   return "fmaximum";
193   case ISD::STRICT_FMAXIMUM:            return "strict_fmaximum";
194   case ISD::FNEG:                       return "fneg";
195   case ISD::FSQRT:                      return "fsqrt";
196   case ISD::STRICT_FSQRT:               return "strict_fsqrt";
197   case ISD::FCBRT:                      return "fcbrt";
198   case ISD::FSIN:                       return "fsin";
199   case ISD::STRICT_FSIN:                return "strict_fsin";
200   case ISD::FCOS:                       return "fcos";
201   case ISD::STRICT_FCOS:                return "strict_fcos";
202   case ISD::FSINCOS:                    return "fsincos";
203   case ISD::FTRUNC:                     return "ftrunc";
204   case ISD::STRICT_FTRUNC:              return "strict_ftrunc";
205   case ISD::FFLOOR:                     return "ffloor";
206   case ISD::STRICT_FFLOOR:              return "strict_ffloor";
207   case ISD::FCEIL:                      return "fceil";
208   case ISD::STRICT_FCEIL:               return "strict_fceil";
209   case ISD::FRINT:                      return "frint";
210   case ISD::STRICT_FRINT:               return "strict_frint";
211   case ISD::FNEARBYINT:                 return "fnearbyint";
212   case ISD::STRICT_FNEARBYINT:          return "strict_fnearbyint";
213   case ISD::FROUND:                     return "fround";
214   case ISD::STRICT_FROUND:              return "strict_fround";
215   case ISD::FROUNDEVEN:                 return "froundeven";
216   case ISD::STRICT_FROUNDEVEN:          return "strict_froundeven";
217   case ISD::FEXP:                       return "fexp";
218   case ISD::STRICT_FEXP:                return "strict_fexp";
219   case ISD::FEXP2:                      return "fexp2";
220   case ISD::STRICT_FEXP2:               return "strict_fexp2";
221   case ISD::FLOG:                       return "flog";
222   case ISD::STRICT_FLOG:                return "strict_flog";
223   case ISD::FLOG2:                      return "flog2";
224   case ISD::STRICT_FLOG2:               return "strict_flog2";
225   case ISD::FLOG10:                     return "flog10";
226   case ISD::STRICT_FLOG10:              return "strict_flog10";
227 
228   // Binary operators
229   case ISD::ADD:                        return "add";
230   case ISD::SUB:                        return "sub";
231   case ISD::MUL:                        return "mul";
232   case ISD::MULHU:                      return "mulhu";
233   case ISD::MULHS:                      return "mulhs";
234   case ISD::SDIV:                       return "sdiv";
235   case ISD::UDIV:                       return "udiv";
236   case ISD::SREM:                       return "srem";
237   case ISD::UREM:                       return "urem";
238   case ISD::SMUL_LOHI:                  return "smul_lohi";
239   case ISD::UMUL_LOHI:                  return "umul_lohi";
240   case ISD::SDIVREM:                    return "sdivrem";
241   case ISD::UDIVREM:                    return "udivrem";
242   case ISD::AND:                        return "and";
243   case ISD::OR:                         return "or";
244   case ISD::XOR:                        return "xor";
245   case ISD::SHL:                        return "shl";
246   case ISD::SRA:                        return "sra";
247   case ISD::SRL:                        return "srl";
248   case ISD::ROTL:                       return "rotl";
249   case ISD::ROTR:                       return "rotr";
250   case ISD::FSHL:                       return "fshl";
251   case ISD::FSHR:                       return "fshr";
252   case ISD::FADD:                       return "fadd";
253   case ISD::STRICT_FADD:                return "strict_fadd";
254   case ISD::FSUB:                       return "fsub";
255   case ISD::STRICT_FSUB:                return "strict_fsub";
256   case ISD::FMUL:                       return "fmul";
257   case ISD::STRICT_FMUL:                return "strict_fmul";
258   case ISD::FDIV:                       return "fdiv";
259   case ISD::STRICT_FDIV:                return "strict_fdiv";
260   case ISD::FMA:                        return "fma";
261   case ISD::STRICT_FMA:                 return "strict_fma";
262   case ISD::FMAD:                       return "fmad";
263   case ISD::FREM:                       return "frem";
264   case ISD::STRICT_FREM:                return "strict_frem";
265   case ISD::FCOPYSIGN:                  return "fcopysign";
266   case ISD::FGETSIGN:                   return "fgetsign";
267   case ISD::FCANONICALIZE:              return "fcanonicalize";
268   case ISD::FPOW:                       return "fpow";
269   case ISD::STRICT_FPOW:                return "strict_fpow";
270   case ISD::SMIN:                       return "smin";
271   case ISD::SMAX:                       return "smax";
272   case ISD::UMIN:                       return "umin";
273   case ISD::UMAX:                       return "umax";
274 
275   case ISD::FPOWI:                      return "fpowi";
276   case ISD::STRICT_FPOWI:               return "strict_fpowi";
277   case ISD::SETCC:                      return "setcc";
278   case ISD::SETCCCARRY:                 return "setcccarry";
279   case ISD::STRICT_FSETCC:              return "strict_fsetcc";
280   case ISD::STRICT_FSETCCS:             return "strict_fsetccs";
281   case ISD::SELECT:                     return "select";
282   case ISD::VSELECT:                    return "vselect";
283   case ISD::SELECT_CC:                  return "select_cc";
284   case ISD::INSERT_VECTOR_ELT:          return "insert_vector_elt";
285   case ISD::EXTRACT_VECTOR_ELT:         return "extract_vector_elt";
286   case ISD::CONCAT_VECTORS:             return "concat_vectors";
287   case ISD::INSERT_SUBVECTOR:           return "insert_subvector";
288   case ISD::EXTRACT_SUBVECTOR:          return "extract_subvector";
289   case ISD::SCALAR_TO_VECTOR:           return "scalar_to_vector";
290   case ISD::VECTOR_SHUFFLE:             return "vector_shuffle";
291   case ISD::SPLAT_VECTOR:               return "splat_vector";
292   case ISD::CARRY_FALSE:                return "carry_false";
293   case ISD::ADDC:                       return "addc";
294   case ISD::ADDE:                       return "adde";
295   case ISD::ADDCARRY:                   return "addcarry";
296   case ISD::SADDO_CARRY:                return "saddo_carry";
297   case ISD::SADDO:                      return "saddo";
298   case ISD::UADDO:                      return "uaddo";
299   case ISD::SSUBO:                      return "ssubo";
300   case ISD::USUBO:                      return "usubo";
301   case ISD::SMULO:                      return "smulo";
302   case ISD::UMULO:                      return "umulo";
303   case ISD::SUBC:                       return "subc";
304   case ISD::SUBE:                       return "sube";
305   case ISD::SUBCARRY:                   return "subcarry";
306   case ISD::SSUBO_CARRY:                return "ssubo_carry";
307   case ISD::SHL_PARTS:                  return "shl_parts";
308   case ISD::SRA_PARTS:                  return "sra_parts";
309   case ISD::SRL_PARTS:                  return "srl_parts";
310 
311   case ISD::SADDSAT:                    return "saddsat";
312   case ISD::UADDSAT:                    return "uaddsat";
313   case ISD::SSUBSAT:                    return "ssubsat";
314   case ISD::USUBSAT:                    return "usubsat";
315   case ISD::SSHLSAT:                    return "sshlsat";
316   case ISD::USHLSAT:                    return "ushlsat";
317 
318   case ISD::SMULFIX:                    return "smulfix";
319   case ISD::SMULFIXSAT:                 return "smulfixsat";
320   case ISD::UMULFIX:                    return "umulfix";
321   case ISD::UMULFIXSAT:                 return "umulfixsat";
322 
323   case ISD::SDIVFIX:                    return "sdivfix";
324   case ISD::SDIVFIXSAT:                 return "sdivfixsat";
325   case ISD::UDIVFIX:                    return "udivfix";
326   case ISD::UDIVFIXSAT:                 return "udivfixsat";
327 
328   // Conversion operators.
329   case ISD::SIGN_EXTEND:                return "sign_extend";
330   case ISD::ZERO_EXTEND:                return "zero_extend";
331   case ISD::ANY_EXTEND:                 return "any_extend";
332   case ISD::SIGN_EXTEND_INREG:          return "sign_extend_inreg";
333   case ISD::ANY_EXTEND_VECTOR_INREG:    return "any_extend_vector_inreg";
334   case ISD::SIGN_EXTEND_VECTOR_INREG:   return "sign_extend_vector_inreg";
335   case ISD::ZERO_EXTEND_VECTOR_INREG:   return "zero_extend_vector_inreg";
336   case ISD::TRUNCATE:                   return "truncate";
337   case ISD::FP_ROUND:                   return "fp_round";
338   case ISD::STRICT_FP_ROUND:            return "strict_fp_round";
339   case ISD::FLT_ROUNDS_:                return "flt_rounds";
340   case ISD::FP_EXTEND:                  return "fp_extend";
341   case ISD::STRICT_FP_EXTEND:           return "strict_fp_extend";
342 
343   case ISD::SINT_TO_FP:                 return "sint_to_fp";
344   case ISD::STRICT_SINT_TO_FP:          return "strict_sint_to_fp";
345   case ISD::UINT_TO_FP:                 return "uint_to_fp";
346   case ISD::STRICT_UINT_TO_FP:          return "strict_uint_to_fp";
347   case ISD::FP_TO_SINT:                 return "fp_to_sint";
348   case ISD::STRICT_FP_TO_SINT:          return "strict_fp_to_sint";
349   case ISD::FP_TO_UINT:                 return "fp_to_uint";
350   case ISD::STRICT_FP_TO_UINT:          return "strict_fp_to_uint";
351   case ISD::BITCAST:                    return "bitcast";
352   case ISD::ADDRSPACECAST:              return "addrspacecast";
353   case ISD::FP16_TO_FP:                 return "fp16_to_fp";
354   case ISD::STRICT_FP16_TO_FP:          return "strict_fp16_to_fp";
355   case ISD::FP_TO_FP16:                 return "fp_to_fp16";
356   case ISD::STRICT_FP_TO_FP16:          return "strict_fp_to_fp16";
357   case ISD::LROUND:                     return "lround";
358   case ISD::STRICT_LROUND:              return "strict_lround";
359   case ISD::LLROUND:                    return "llround";
360   case ISD::STRICT_LLROUND:             return "strict_llround";
361   case ISD::LRINT:                      return "lrint";
362   case ISD::STRICT_LRINT:               return "strict_lrint";
363   case ISD::LLRINT:                     return "llrint";
364   case ISD::STRICT_LLRINT:              return "strict_llrint";
365 
366     // Control flow instructions
367   case ISD::BR:                         return "br";
368   case ISD::BRIND:                      return "brind";
369   case ISD::BR_JT:                      return "br_jt";
370   case ISD::BRCOND:                     return "brcond";
371   case ISD::BR_CC:                      return "br_cc";
372   case ISD::CALLSEQ_START:              return "callseq_start";
373   case ISD::CALLSEQ_END:                return "callseq_end";
374 
375     // EH instructions
376   case ISD::CATCHRET:                   return "catchret";
377   case ISD::CLEANUPRET:                 return "cleanupret";
378 
379     // Other operators
380   case ISD::LOAD:                       return "load";
381   case ISD::STORE:                      return "store";
382   case ISD::MLOAD:                      return "masked_load";
383   case ISD::MSTORE:                     return "masked_store";
384   case ISD::MGATHER:                    return "masked_gather";
385   case ISD::MSCATTER:                   return "masked_scatter";
386   case ISD::VAARG:                      return "vaarg";
387   case ISD::VACOPY:                     return "vacopy";
388   case ISD::VAEND:                      return "vaend";
389   case ISD::VASTART:                    return "vastart";
390   case ISD::DYNAMIC_STACKALLOC:         return "dynamic_stackalloc";
391   case ISD::EXTRACT_ELEMENT:            return "extract_element";
392   case ISD::BUILD_PAIR:                 return "build_pair";
393   case ISD::STACKSAVE:                  return "stacksave";
394   case ISD::STACKRESTORE:               return "stackrestore";
395   case ISD::TRAP:                       return "trap";
396   case ISD::DEBUGTRAP:                  return "debugtrap";
397   case ISD::LIFETIME_START:             return "lifetime.start";
398   case ISD::LIFETIME_END:               return "lifetime.end";
399   case ISD::GC_TRANSITION_START:        return "gc_transition.start";
400   case ISD::GC_TRANSITION_END:          return "gc_transition.end";
401   case ISD::GET_DYNAMIC_AREA_OFFSET:    return "get.dynamic.area.offset";
402   case ISD::FREEZE:                     return "freeze";
403   case ISD::PREALLOCATED_SETUP:
404     return "call_setup";
405   case ISD::PREALLOCATED_ARG:
406     return "call_alloc";
407 
408   // Bit manipulation
409   case ISD::ABS:                        return "abs";
410   case ISD::BITREVERSE:                 return "bitreverse";
411   case ISD::BSWAP:                      return "bswap";
412   case ISD::CTPOP:                      return "ctpop";
413   case ISD::CTTZ:                       return "cttz";
414   case ISD::CTTZ_ZERO_UNDEF:            return "cttz_zero_undef";
415   case ISD::CTLZ:                       return "ctlz";
416   case ISD::CTLZ_ZERO_UNDEF:            return "ctlz_zero_undef";
417   case ISD::PARITY:                     return "parity";
418 
419   // Trampolines
420   case ISD::INIT_TRAMPOLINE:            return "init_trampoline";
421   case ISD::ADJUST_TRAMPOLINE:          return "adjust_trampoline";
422 
423   case ISD::CONDCODE:
424     switch (cast<CondCodeSDNode>(this)->get()) {
425     default: llvm_unreachable("Unknown setcc condition!");
426     case ISD::SETOEQ:                   return "setoeq";
427     case ISD::SETOGT:                   return "setogt";
428     case ISD::SETOGE:                   return "setoge";
429     case ISD::SETOLT:                   return "setolt";
430     case ISD::SETOLE:                   return "setole";
431     case ISD::SETONE:                   return "setone";
432 
433     case ISD::SETO:                     return "seto";
434     case ISD::SETUO:                    return "setuo";
435     case ISD::SETUEQ:                   return "setueq";
436     case ISD::SETUGT:                   return "setugt";
437     case ISD::SETUGE:                   return "setuge";
438     case ISD::SETULT:                   return "setult";
439     case ISD::SETULE:                   return "setule";
440     case ISD::SETUNE:                   return "setune";
441 
442     case ISD::SETEQ:                    return "seteq";
443     case ISD::SETGT:                    return "setgt";
444     case ISD::SETGE:                    return "setge";
445     case ISD::SETLT:                    return "setlt";
446     case ISD::SETLE:                    return "setle";
447     case ISD::SETNE:                    return "setne";
448 
449     case ISD::SETTRUE:                  return "settrue";
450     case ISD::SETTRUE2:                 return "settrue2";
451     case ISD::SETFALSE:                 return "setfalse";
452     case ISD::SETFALSE2:                return "setfalse2";
453     }
454   case ISD::VECREDUCE_FADD:             return "vecreduce_fadd";
455   case ISD::VECREDUCE_SEQ_FADD:         return "vecreduce_seq_fadd";
456   case ISD::VECREDUCE_FMUL:             return "vecreduce_fmul";
457   case ISD::VECREDUCE_SEQ_FMUL:         return "vecreduce_seq_fmul";
458   case ISD::VECREDUCE_ADD:              return "vecreduce_add";
459   case ISD::VECREDUCE_MUL:              return "vecreduce_mul";
460   case ISD::VECREDUCE_AND:              return "vecreduce_and";
461   case ISD::VECREDUCE_OR:               return "vecreduce_or";
462   case ISD::VECREDUCE_XOR:              return "vecreduce_xor";
463   case ISD::VECREDUCE_SMAX:             return "vecreduce_smax";
464   case ISD::VECREDUCE_SMIN:             return "vecreduce_smin";
465   case ISD::VECREDUCE_UMAX:             return "vecreduce_umax";
466   case ISD::VECREDUCE_UMIN:             return "vecreduce_umin";
467   case ISD::VECREDUCE_FMAX:             return "vecreduce_fmax";
468   case ISD::VECREDUCE_FMIN:             return "vecreduce_fmin";
469   }
470 }
471 
472 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
473   switch (AM) {
474   default:              return "";
475   case ISD::PRE_INC:    return "<pre-inc>";
476   case ISD::PRE_DEC:    return "<pre-dec>";
477   case ISD::POST_INC:   return "<post-inc>";
478   case ISD::POST_DEC:   return "<post-dec>";
479   }
480 }
481 
482 static Printable PrintNodeId(const SDNode &Node) {
483   return Printable([&Node](raw_ostream &OS) {
484 #ifndef NDEBUG
485     OS << 't' << Node.PersistentId;
486 #else
487     OS << (const void*)&Node;
488 #endif
489   });
490 }
491 
492 // Print the MMO with more information from the SelectionDAG.
493 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
494                             const MachineFunction *MF, const Module *M,
495                             const MachineFrameInfo *MFI,
496                             const TargetInstrInfo *TII, LLVMContext &Ctx) {
497   ModuleSlotTracker MST(M);
498   if (MF)
499     MST.incorporateFunction(MF->getFunction());
500   SmallVector<StringRef, 0> SSNs;
501   MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
502 }
503 
504 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
505                             const SelectionDAG *G) {
506   if (G) {
507     const MachineFunction *MF = &G->getMachineFunction();
508     return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
509                            &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(),
510                            *G->getContext());
511   } else {
512     LLVMContext Ctx;
513     return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
514                            /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
515   }
516 }
517 
518 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
519 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
520 
521 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
522   print(dbgs(), G);
523   dbgs() << '\n';
524 }
525 #endif
526 
527 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
528   for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
529     if (i) OS << ",";
530     if (getValueType(i) == MVT::Other)
531       OS << "ch";
532     else
533       OS << getValueType(i).getEVTString();
534   }
535 }
536 
537 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
538   if (getFlags().hasNoUnsignedWrap())
539     OS << " nuw";
540 
541   if (getFlags().hasNoSignedWrap())
542     OS << " nsw";
543 
544   if (getFlags().hasExact())
545     OS << " exact";
546 
547   if (getFlags().hasNoNaNs())
548     OS << " nnan";
549 
550   if (getFlags().hasNoInfs())
551     OS << " ninf";
552 
553   if (getFlags().hasNoSignedZeros())
554     OS << " nsz";
555 
556   if (getFlags().hasAllowReciprocal())
557     OS << " arcp";
558 
559   if (getFlags().hasAllowContract())
560     OS << " contract";
561 
562   if (getFlags().hasApproximateFuncs())
563     OS << " afn";
564 
565   if (getFlags().hasAllowReassociation())
566     OS << " reassoc";
567 
568   if (getFlags().hasNoFPExcept())
569     OS << " nofpexcept";
570 
571   if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
572     if (!MN->memoperands_empty()) {
573       OS << "<";
574       OS << "Mem:";
575       for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
576            e = MN->memoperands_end(); i != e; ++i) {
577         printMemOperand(OS, **i, G);
578         if (std::next(i) != e)
579           OS << " ";
580       }
581       OS << ">";
582     }
583   } else if (const ShuffleVectorSDNode *SVN =
584                dyn_cast<ShuffleVectorSDNode>(this)) {
585     OS << "<";
586     for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
587       int Idx = SVN->getMaskElt(i);
588       if (i) OS << ",";
589       if (Idx < 0)
590         OS << "u";
591       else
592         OS << Idx;
593     }
594     OS << ">";
595   } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
596     OS << '<' << CSDN->getAPIntValue() << '>';
597   } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
598     if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
599       OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
600     else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
601       OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
602     else {
603       OS << "<APFloat(";
604       CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
605       OS << ")>";
606     }
607   } else if (const GlobalAddressSDNode *GADN =
608              dyn_cast<GlobalAddressSDNode>(this)) {
609     int64_t offset = GADN->getOffset();
610     OS << '<';
611     GADN->getGlobal()->printAsOperand(OS);
612     OS << '>';
613     if (offset > 0)
614       OS << " + " << offset;
615     else
616       OS << " " << offset;
617     if (unsigned int TF = GADN->getTargetFlags())
618       OS << " [TF=" << TF << ']';
619   } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
620     OS << "<" << FIDN->getIndex() << ">";
621   } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
622     OS << "<" << JTDN->getIndex() << ">";
623     if (unsigned int TF = JTDN->getTargetFlags())
624       OS << " [TF=" << TF << ']';
625   } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
626     int offset = CP->getOffset();
627     if (CP->isMachineConstantPoolEntry())
628       OS << "<" << *CP->getMachineCPVal() << ">";
629     else
630       OS << "<" << *CP->getConstVal() << ">";
631     if (offset > 0)
632       OS << " + " << offset;
633     else
634       OS << " " << offset;
635     if (unsigned int TF = CP->getTargetFlags())
636       OS << " [TF=" << TF << ']';
637   } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
638     OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
639     if (unsigned TF = TI->getTargetFlags())
640       OS << " [TF=" << TF << ']';
641   } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
642     OS << "<";
643     const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
644     if (LBB)
645       OS << LBB->getName() << " ";
646     OS << (const void*)BBDN->getBasicBlock() << ">";
647   } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
648     OS << ' ' << printReg(R->getReg(),
649                           G ? G->getSubtarget().getRegisterInfo() : nullptr);
650   } else if (const ExternalSymbolSDNode *ES =
651              dyn_cast<ExternalSymbolSDNode>(this)) {
652     OS << "'" << ES->getSymbol() << "'";
653     if (unsigned int TF = ES->getTargetFlags())
654       OS << " [TF=" << TF << ']';
655   } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
656     if (M->getValue())
657       OS << "<" << M->getValue() << ">";
658     else
659       OS << "<null>";
660   } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
661     if (MD->getMD())
662       OS << "<" << MD->getMD() << ">";
663     else
664       OS << "<null>";
665   } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
666     OS << ":" << N->getVT().getEVTString();
667   }
668   else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
669     OS << "<";
670 
671     printMemOperand(OS, *LD->getMemOperand(), G);
672 
673     bool doExt = true;
674     switch (LD->getExtensionType()) {
675     default: doExt = false; break;
676     case ISD::EXTLOAD:  OS << ", anyext"; break;
677     case ISD::SEXTLOAD: OS << ", sext"; break;
678     case ISD::ZEXTLOAD: OS << ", zext"; break;
679     }
680     if (doExt)
681       OS << " from " << LD->getMemoryVT().getEVTString();
682 
683     const char *AM = getIndexedModeName(LD->getAddressingMode());
684     if (*AM)
685       OS << ", " << AM;
686 
687     OS << ">";
688   } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
689     OS << "<";
690     printMemOperand(OS, *ST->getMemOperand(), G);
691 
692     if (ST->isTruncatingStore())
693       OS << ", trunc to " << ST->getMemoryVT().getEVTString();
694 
695     const char *AM = getIndexedModeName(ST->getAddressingMode());
696     if (*AM)
697       OS << ", " << AM;
698 
699     OS << ">";
700   } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
701     OS << "<";
702 
703     printMemOperand(OS, *MLd->getMemOperand(), G);
704 
705     bool doExt = true;
706     switch (MLd->getExtensionType()) {
707     default: doExt = false; break;
708     case ISD::EXTLOAD:  OS << ", anyext"; break;
709     case ISD::SEXTLOAD: OS << ", sext"; break;
710     case ISD::ZEXTLOAD: OS << ", zext"; break;
711     }
712     if (doExt)
713       OS << " from " << MLd->getMemoryVT().getEVTString();
714 
715     const char *AM = getIndexedModeName(MLd->getAddressingMode());
716     if (*AM)
717       OS << ", " << AM;
718 
719     if (MLd->isExpandingLoad())
720       OS << ", expanding";
721 
722     OS << ">";
723   } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
724     OS << "<";
725     printMemOperand(OS, *MSt->getMemOperand(), G);
726 
727     if (MSt->isTruncatingStore())
728       OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
729 
730     const char *AM = getIndexedModeName(MSt->getAddressingMode());
731     if (*AM)
732       OS << ", " << AM;
733 
734     if (MSt->isCompressingStore())
735       OS << ", compressing";
736 
737     OS << ">";
738   } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
739     OS << "<";
740     printMemOperand(OS, *M->getMemOperand(), G);
741     OS << ">";
742   } else if (const BlockAddressSDNode *BA =
743                dyn_cast<BlockAddressSDNode>(this)) {
744     int64_t offset = BA->getOffset();
745     OS << "<";
746     BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
747     OS << ", ";
748     BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
749     OS << ">";
750     if (offset > 0)
751       OS << " + " << offset;
752     else
753       OS << " " << offset;
754     if (unsigned int TF = BA->getTargetFlags())
755       OS << " [TF=" << TF << ']';
756   } else if (const AddrSpaceCastSDNode *ASC =
757                dyn_cast<AddrSpaceCastSDNode>(this)) {
758     OS << '['
759        << ASC->getSrcAddressSpace()
760        << " -> "
761        << ASC->getDestAddressSpace()
762        << ']';
763   } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
764     if (LN->hasOffset())
765       OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
766   }
767 
768   if (VerboseDAGDumping) {
769     if (unsigned Order = getIROrder())
770         OS << " [ORD=" << Order << ']';
771 
772     if (getNodeId() != -1)
773       OS << " [ID=" << getNodeId() << ']';
774     if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
775       OS << " # D:" << isDivergent();
776 
777     if (G && !G->GetDbgValues(this).empty()) {
778       OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
779       for (SDDbgValue *Dbg : G->GetDbgValues(this))
780         if (!Dbg->isInvalidated())
781           Dbg->print(OS);
782     } else if (getHasDebugValue())
783       OS << " [NoOfDbgValues>0]";
784   }
785 }
786 
787 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
788   OS << " DbgVal(Order=" << getOrder() << ')';
789   if (isInvalidated()) OS << "(Invalidated)";
790   if (isEmitted()) OS << "(Emitted)";
791   switch (getKind()) {
792   case SDNODE:
793     if (getSDNode())
794       OS << "(SDNODE=" << PrintNodeId(*getSDNode()) << ':' <<  getResNo() << ')';
795     else
796       OS << "(SDNODE)";
797     break;
798   case CONST:
799     OS << "(CONST)";
800     break;
801   case FRAMEIX:
802     OS << "(FRAMEIX=" << getFrameIx() << ')';
803     break;
804   case VREG:
805     OS << "(VREG=" << getVReg() << ')';
806     break;
807   }
808   if (isIndirect()) OS << "(Indirect)";
809   OS << ":\"" << Var->getName() << '"';
810 #ifndef NDEBUG
811   if (Expr->getNumElements())
812     Expr->dump();
813 #endif
814 }
815 
816 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
817 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
818   if (isInvalidated())
819     return;
820   print(dbgs());
821   dbgs() << "\n";
822 }
823 #endif
824 
825 /// Return true if this node is so simple that we should just print it inline
826 /// if it appears as an operand.
827 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
828   // Avoid lots of cluttering when inline printing nodes with associated
829   // DbgValues in verbose mode.
830   if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
831     return false;
832   if (Node.getOpcode() == ISD::EntryToken)
833     return false;
834   return Node.getNumOperands() == 0;
835 }
836 
837 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
838 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
839   for (const SDValue &Op : N->op_values()) {
840     if (shouldPrintInline(*Op.getNode(), G))
841       continue;
842     if (Op.getNode()->hasOneUse())
843       DumpNodes(Op.getNode(), indent+2, G);
844   }
845 
846   dbgs().indent(indent);
847   N->dump(G);
848 }
849 
850 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
851   dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
852 
853   for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
854        I != E; ++I) {
855     const SDNode *N = &*I;
856     if (!N->hasOneUse() && N != getRoot().getNode() &&
857         (!shouldPrintInline(*N, this) || N->use_empty()))
858       DumpNodes(N, 2, this);
859   }
860 
861   if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
862   dbgs() << "\n";
863 
864   if (VerboseDAGDumping) {
865     if (DbgBegin() != DbgEnd())
866       dbgs() << "SDDbgValues:\n";
867     for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
868       Dbg->dump();
869     if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
870       dbgs() << "Byval SDDbgValues:\n";
871     for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
872       Dbg->dump();
873   }
874   dbgs() << "\n";
875 }
876 #endif
877 
878 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
879   OS << PrintNodeId(*this) << ": ";
880   print_types(OS, G);
881   OS << " = " << getOperationName(G);
882   print_details(OS, G);
883 }
884 
885 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
886                          const SDValue Value) {
887   if (!Value.getNode()) {
888     OS << "<null>";
889     return false;
890   } else if (shouldPrintInline(*Value.getNode(), G)) {
891     OS << Value->getOperationName(G) << ':';
892     Value->print_types(OS, G);
893     Value->print_details(OS, G);
894     return true;
895   } else {
896     OS << PrintNodeId(*Value.getNode());
897     if (unsigned RN = Value.getResNo())
898       OS << ':' << RN;
899     return false;
900   }
901 }
902 
903 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
904 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
905 
906 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
907                        const SelectionDAG *G, VisitedSDNodeSet &once) {
908   if (!once.insert(N).second) // If we've been here before, return now.
909     return;
910 
911   // Dump the current SDNode, but don't end the line yet.
912   OS.indent(indent);
913   N->printr(OS, G);
914 
915   // Having printed this SDNode, walk the children:
916   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
917     if (i) OS << ",";
918     OS << " ";
919 
920     const SDValue Op = N->getOperand(i);
921     bool printedInline = printOperand(OS, G, Op);
922     if (printedInline)
923       once.insert(Op.getNode());
924   }
925 
926   OS << "\n";
927 
928   // Dump children that have grandchildren on their own line(s).
929   for (const SDValue &Op : N->op_values())
930     DumpNodesr(OS, Op.getNode(), indent+2, G, once);
931 }
932 
933 LLVM_DUMP_METHOD void SDNode::dumpr() const {
934   VisitedSDNodeSet once;
935   DumpNodesr(dbgs(), this, 0, nullptr, once);
936 }
937 
938 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
939   VisitedSDNodeSet once;
940   DumpNodesr(dbgs(), this, 0, G, once);
941 }
942 #endif
943 
944 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
945                                   const SelectionDAG *G, unsigned depth,
946                                   unsigned indent) {
947   if (depth == 0)
948     return;
949 
950   OS.indent(indent);
951 
952   N->print(OS, G);
953 
954   if (depth < 1)
955     return;
956 
957   for (const SDValue &Op : N->op_values()) {
958     // Don't follow chain operands.
959     if (Op.getValueType() == MVT::Other)
960       continue;
961     OS << '\n';
962     printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2);
963   }
964 }
965 
966 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
967                             unsigned depth) const {
968   printrWithDepthHelper(OS, this, G, depth, 0);
969 }
970 
971 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
972   // Don't print impossibly deep things.
973   printrWithDepth(OS, G, 10);
974 }
975 
976 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
977 LLVM_DUMP_METHOD
978 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
979   printrWithDepth(dbgs(), G, depth);
980 }
981 
982 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
983   // Don't print impossibly deep things.
984   dumprWithDepth(G, 10);
985 }
986 #endif
987 
988 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
989   printr(OS, G);
990   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
991     if (i) OS << ", "; else OS << " ";
992     printOperand(OS, G, getOperand(i));
993   }
994   if (DebugLoc DL = getDebugLoc()) {
995     OS << ", ";
996     DL.print(OS);
997   }
998 }
999